1# Simulator main loop for IQ2000. -*- C -*- 2# Copyright (C) 1998-2024 Free Software Foundation, Inc. 3# Contributed by Cygnus Solutions. 4# 5# This file is part of the GNU Simulators. 6# 7# This program is free software; you can redistribute it and/or modify 8# it under the terms of the GNU General Public License as published by 9# the Free Software Foundation; either version 3 of the License, or 10# (at your option) any later version. 11# 12# This program is distributed in the hope that it will be useful, 13# but WITHOUT ANY WARRANTY; without even the implied warranty of 14# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15# GNU General Public License for more details. 16# 17# You should have received a copy of the GNU General Public License 18# along with this program. If not, see <http://www.gnu.org/licenses/>. 19 20# Syntax: 21# /bin/sh mainloop.in command 22# 23# Command is one of: 24# 25# init 26# support 27# extract-{simple,scache,pbb} 28# {full,fast}-exec-{simple,scache,pbb} 29# 30# A target need only provide a "full" version of one of simple,scache,pbb. 31# If the target wants it can also provide a fast version of same. 32# It can't provide more than this, however for illustration's sake the IQ2000 33# port provides examples of all. 34 35# ??? After a few more ports are done, revisit. 36# Will eventually need to machine generate a lot of this. 37 38case "x$1" in 39 40xsupport) 41 42cat <<EOF 43#line $LINENO "$0" 44#include <stdlib.h> 45 46static INLINE const IDESC * 47extract (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, ARGBUF *abuf, 48 int fast_p) 49{ 50 const IDESC *id = @cpu@_decode (current_cpu, pc, insn, insn, abuf); 51 @cpu@_fill_argbuf (current_cpu, abuf, id, pc, fast_p); 52 if (! fast_p) 53 { 54 int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); 55 int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); 56 @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); 57 } 58 return id; 59} 60 61static INLINE SEM_PC 62execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) 63{ 64 SEM_PC vpc; 65 66 /* Force R0 to zero before every insn. */ 67 @cpu@_h_gr_set (current_cpu, 0, 0); 68 69 if (fast_p) 70 { 71#if ! WITH_SEM_SWITCH_FAST 72#if WITH_SCACHE 73 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); 74#else 75 vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); 76#endif 77#else 78 abort (); 79#endif /* WITH_SEM_SWITCH_FAST */ 80 } 81 else 82 { 83#if ! WITH_SEM_SWITCH_FULL 84 ARGBUF *abuf = &sc->argbuf; 85 const IDESC *idesc = abuf->idesc; 86#if WITH_SCACHE_PBB 87 int virtual_p = CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_VIRTUAL); 88#else 89 int virtual_p = 0; 90#endif 91 92 if (! virtual_p) 93 { 94 /* FIXME: call x-before */ 95 if (ARGBUF_PROFILE_P (abuf)) 96 PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); 97 /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ 98 if (PROFILE_MODEL_P (current_cpu) 99 && ARGBUF_PROFILE_P (abuf)) 100 @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); 101 CGEN_TRACE_INSN_INIT (current_cpu, abuf, 1); 102 CGEN_TRACE_INSN (current_cpu, idesc->idata, 103 (const struct argbuf *) abuf, abuf->addr); 104 } 105#if WITH_SCACHE 106 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); 107#else 108 vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); 109#endif 110 if (! virtual_p) 111 { 112 /* FIXME: call x-after */ 113 if (PROFILE_MODEL_P (current_cpu) 114 && ARGBUF_PROFILE_P (abuf)) 115 { 116 int cycles; 117 118 cycles = (*idesc->timing->model_fn) (current_cpu, sc); 119 @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); 120 } 121 CGEN_TRACE_INSN_FINI (current_cpu, abuf, 1); 122 } 123#else 124 abort (); 125#endif /* WITH_SEM_SWITCH_FULL */ 126 } 127 128 return vpc; 129} 130 131EOF 132;; 133 134xinit) 135;; 136 137xextract-simple | xextract-scache) 138 139# Inputs: current_cpu, vpc, sc, FAST_P 140# Outputs: sc filled in 141 142cat <<EOF 143#line $LINENO "$0" 144{ 145 CGEN_INSN_INT insn = GETIMEMUSI (current_cpu, CPU2INSN(vpc)); 146 extract (current_cpu, vpc, insn, SEM_ARGBUF (sc), FAST_P); 147 SEM_SKIP_COMPILE (current_cpu, sc, 1); 148} 149EOF 150 151;; 152 153xextract-pbb) 154 155# Inputs: current_cpu, pc, sc, max_insns, FAST_P 156# Outputs: sc, pc 157# sc must be left pointing past the last created entry. 158# pc must be left pointing past the last created entry. 159# If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called 160# to record the vpc of the cti insn. 161# SET_INSN_COUNT(n) must be called to record number of real insns. 162 163cat <<EOF 164#line $LINENO "$0" 165{ 166 const IDESC *idesc; 167 int icount = 0; 168 169 /* Is the CTI instruction at the end of the PBB a likely branch? */ 170 int likely_cti; 171 172 while (max_insns > 0) 173 { 174 USI insn = GETIMEMUSI (current_cpu, CPU2INSN(pc)); 175 176 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); 177 SEM_SKIP_COMPILE (current_cpu, sc, 1); 178 ++sc; 179 --max_insns; 180 ++icount; 181 pc += idesc->length; 182 183 if (IDESC_CTI_P (idesc)) 184 { 185 /* Likely branches annul their delay slot if the branch is 186 not taken by using the (skip ..) rtx. We'll rely on 187 that. */ 188 likely_cti = (IDESC_SKIP_P (idesc)); 189 190 SET_CTI_VPC (sc - 1); 191 192 if (CGEN_ATTR_VALUE (NULL, idesc->attrs, CGEN_INSN_DELAY_SLOT)) 193 { 194 insn = GETIMEMUSI (current_cpu, CPU2INSN(pc)); 195 idesc = extract (current_cpu, pc, insn, &sc->argbuf, FAST_P); 196 197 if (likely_cti && IDESC_CTI_P (idesc)) 198 { 199 /* malformed program */ 200 sim_io_eprintf (CPU_STATE (current_cpu), 201 "malformed program, \`%s' insn in branch likely delay slot\n", 202 CGEN_INSN_NAME (idesc->idata)); 203 } 204 else 205 { 206 ++sc; 207 --max_insns; 208 ++icount; 209 pc += idesc->length; 210 } 211 } 212 break; 213 } 214 } 215 216 Finish: 217 SET_INSN_COUNT (icount); 218} 219EOF 220 221;; 222 223xfull-exec-* | xfast-exec-*) 224 225# Inputs: current_cpu, sc, FAST_P 226# Outputs: vpc 227# vpc contains the address of the next insn to execute 228 229cat <<EOF 230#line $LINENO "$0" 231{ 232#if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) 233#define DEFINE_SWITCH 234#include "sem-switch.c" 235#else 236 vpc = execute (current_cpu, vpc, FAST_P); 237#endif 238} 239EOF 240 241;; 242 243*) 244 echo "Invalid argument to mainloop.in: $1" >&2 245 exit 1 246 ;; 247 248esac 249