14e98e3e1Schristos /* Generic register read/write. 2*88241920Schristos Copyright (C) 1998-2024 Free Software Foundation, Inc. 34e98e3e1Schristos Contributed by Cygnus Solutions. 44e98e3e1Schristos 54e98e3e1Schristos This file is part of GDB, the GNU debugger. 64e98e3e1Schristos 74e98e3e1Schristos This program is free software; you can redistribute it and/or modify 84e98e3e1Schristos it under the terms of the GNU General Public License as published by 94e98e3e1Schristos the Free Software Foundation; either version 3 of the License, or 104e98e3e1Schristos (at your option) any later version. 114e98e3e1Schristos 124e98e3e1Schristos This program is distributed in the hope that it will be useful, 134e98e3e1Schristos but WITHOUT ANY WARRANTY; without even the implied warranty of 144e98e3e1Schristos MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 154e98e3e1Schristos GNU General Public License for more details. 164e98e3e1Schristos 174e98e3e1Schristos You should have received a copy of the GNU General Public License 184e98e3e1Schristos along with this program. If not, see <http://www.gnu.org/licenses/>. */ 194e98e3e1Schristos 204b169a6bSchristos /* This must come before any other includes. */ 214b169a6bSchristos #include "defs.h" 224b169a6bSchristos 234e98e3e1Schristos #include "sim-main.h" 244e98e3e1Schristos #include "sim-assert.h" 254e98e3e1Schristos 264e98e3e1Schristos /* Generic implementation of sim_fetch_register for simulators using 274e98e3e1Schristos CPU_REG_FETCH. 284e98e3e1Schristos The contents of BUF are in target byte order. */ 294e98e3e1Schristos /* ??? Obviously the interface needs to be extended to handle multiple 304e98e3e1Schristos cpus. */ 314e98e3e1Schristos 324e98e3e1Schristos int 334b169a6bSchristos sim_fetch_register (SIM_DESC sd, int rn, void *buf, int length) 344e98e3e1Schristos { 354e98e3e1Schristos SIM_CPU *cpu = STATE_CPU (sd, 0); 364e98e3e1Schristos 374e98e3e1Schristos SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); 384e98e3e1Schristos return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length); 394e98e3e1Schristos } 404e98e3e1Schristos 414e98e3e1Schristos /* Generic implementation of sim_store_register for simulators using 424e98e3e1Schristos CPU_REG_STORE. 434e98e3e1Schristos The contents of BUF are in target byte order. */ 444e98e3e1Schristos /* ??? Obviously the interface needs to be extended to handle multiple 454e98e3e1Schristos cpus. */ 464e98e3e1Schristos 474e98e3e1Schristos int 484b169a6bSchristos sim_store_register (SIM_DESC sd, int rn, const void *buf, int length) 494e98e3e1Schristos { 504e98e3e1Schristos SIM_CPU *cpu = STATE_CPU (sd, 0); 514e98e3e1Schristos 524e98e3e1Schristos SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); 534e98e3e1Schristos return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length); 544e98e3e1Schristos } 55