1 /* Generic register read/write. 2 Copyright (C) 1998-2024 Free Software Foundation, Inc. 3 Contributed by Cygnus Solutions. 4 5 This file is part of GDB, the GNU debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 /* This must come before any other includes. */ 21 #include "defs.h" 22 23 #include "sim-main.h" 24 #include "sim-assert.h" 25 26 /* Generic implementation of sim_fetch_register for simulators using 27 CPU_REG_FETCH. 28 The contents of BUF are in target byte order. */ 29 /* ??? Obviously the interface needs to be extended to handle multiple 30 cpus. */ 31 32 int 33 sim_fetch_register (SIM_DESC sd, int rn, void *buf, int length) 34 { 35 SIM_CPU *cpu = STATE_CPU (sd, 0); 36 37 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); 38 return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length); 39 } 40 41 /* Generic implementation of sim_store_register for simulators using 42 CPU_REG_STORE. 43 The contents of BUF are in target byte order. */ 44 /* ??? Obviously the interface needs to be extended to handle multiple 45 cpus. */ 46 47 int 48 sim_store_register (SIM_DESC sd, int rn, const void *buf, int length) 49 { 50 SIM_CPU *cpu = STATE_CPU (sd, 0); 51 52 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); 53 return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length); 54 } 55