1 /* CPU support. 2 Copyright (C) 1998-2024 Free Software Foundation, Inc. 3 Contributed by Cygnus Solutions. 4 5 This file is part of GDB, the GNU debugger. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 /* This file is intended to be included by sim-base.h. 21 22 This file provides an interface between the simulator framework and 23 the selected cpu. */ 24 25 #ifndef SIM_CPU_H 26 #define SIM_CPU_H 27 28 /* Type of function to return an insn name. */ 29 typedef const char * (CPU_INSN_NAME_FN) (sim_cpu *, int); 30 31 #ifdef CGEN_ARCH 32 # include "cgen-cpu.h" 33 #endif 34 35 /* Types for register access functions. 36 These routines implement the sim_{fetch,store}_register interface. */ 37 typedef int (CPUREG_FETCH_FN) (sim_cpu *, int, void *, int); 38 typedef int (CPUREG_STORE_FN) (sim_cpu *, int, const void *, int); 39 40 /* Types for PC access functions. 41 Some simulators require a functional interface to access the program 42 counter [a macro is insufficient as the PC is kept in a cpu-specific part 43 of the sim_cpu struct]. */ 44 typedef sim_cia (PC_FETCH_FN) (sim_cpu *); 45 typedef void (PC_STORE_FN) (sim_cpu *, sim_cia); 46 47 /* Pseudo baseclass for each cpu. */ 48 49 struct _sim_cpu { 50 /* Backlink to main state struct. */ 51 SIM_DESC state; 52 #define CPU_STATE(cpu) ((cpu)->state) 53 54 /* Processor index within the SD_DESC */ 55 int index; 56 #define CPU_INDEX(cpu) ((cpu)->index) 57 58 /* The name of the cpu. */ 59 const char *name; 60 #define CPU_NAME(cpu) ((cpu)->name) 61 62 /* Options specific to this cpu. */ 63 struct option_list *options; 64 #define CPU_OPTIONS(cpu) ((cpu)->options) 65 66 /* Processor specific core data */ 67 sim_cpu_core core; 68 #define CPU_CORE(cpu) (& (cpu)->core) 69 70 /* Number of instructions (used to iterate over CPU_INSN_NAME). */ 71 unsigned int max_insns; 72 #define CPU_MAX_INSNS(cpu) ((cpu)->max_insns) 73 74 /* Function to return the name of an insn. */ 75 CPU_INSN_NAME_FN *insn_name; 76 #define CPU_INSN_NAME(cpu) ((cpu)->insn_name) 77 78 /* Trace data. See sim-trace.h. */ 79 TRACE_DATA trace_data; 80 #define CPU_TRACE_DATA(cpu) (& (cpu)->trace_data) 81 82 /* Maximum number of debuggable entities. 83 This debugging is not intended for normal use. 84 It is only enabled when the simulator is configured with --with-debug 85 which shouldn't normally be specified. */ 86 #ifndef MAX_DEBUG_VALUES 87 #define MAX_DEBUG_VALUES 4 88 #endif 89 90 /* Boolean array of specified debugging flags. */ 91 char debug_flags[MAX_DEBUG_VALUES]; 92 #define CPU_DEBUG_FLAGS(cpu) ((cpu)->debug_flags) 93 /* Standard values. */ 94 #define DEBUG_INSN_IDX 0 95 #define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */ 96 97 /* Debugging output goes to this or stderr if NULL. 98 We can't store `stderr' here as stderr goes through a callback. */ 99 FILE *debug_file; 100 #define CPU_DEBUG_FILE(cpu) ((cpu)->debug_file) 101 102 /* Profile data. See sim-profile.h. */ 103 PROFILE_DATA profile_data; 104 #define CPU_PROFILE_DATA(cpu) (& (cpu)->profile_data) 105 106 /* Machine tables for this cpu. See sim-model.h. */ 107 const SIM_MACH *mach; 108 #define CPU_MACH(cpu) ((cpu)->mach) 109 /* The selected model. */ 110 const SIM_MODEL *model; 111 #define CPU_MODEL(cpu) ((cpu)->model) 112 /* Model data (profiling state, etc.). */ 113 void *model_data; 114 #define CPU_MODEL_DATA(cpu) ((cpu)->model_data) 115 116 /* Routines to fetch/store registers. */ 117 CPUREG_FETCH_FN *reg_fetch; 118 #define CPU_REG_FETCH(c) ((c)->reg_fetch) 119 CPUREG_STORE_FN *reg_store; 120 #define CPU_REG_STORE(c) ((c)->reg_store) 121 PC_FETCH_FN *pc_fetch; 122 #define CPU_PC_FETCH(c) ((c)->pc_fetch) 123 PC_STORE_FN *pc_store; 124 #define CPU_PC_STORE(c) ((c)->pc_store) 125 126 #ifdef CGEN_ARCH 127 /* Static parts of cgen. */ 128 CGEN_CPU cgen_cpu; 129 #define CPU_CGEN_CPU(cpu) ((cpu)->cgen_cpu) 130 #endif 131 132 /* Pointer for sim target to store arbitrary cpu data. Normally the 133 target should define a struct and use it here. */ 134 void *arch_data; 135 #define CPU_ARCH_DATA(cpu) ((cpu)->arch_data) 136 }; 137 138 /* Create all cpus. */ 139 extern SIM_RC sim_cpu_alloc_all_extra (SIM_DESC, int, size_t); 140 #define sim_cpu_alloc_all(state, ncpus) sim_cpu_alloc_all_extra (state, ncpus, 0) 141 /* Create a cpu. */ 142 extern sim_cpu *sim_cpu_alloc_extra (SIM_DESC, size_t); 143 #define sim_cpu_alloc(sd) sim_cpu_alloc_extra (sd, 0) 144 /* Release resources held by all cpus. */ 145 extern void sim_cpu_free_all (SIM_DESC); 146 /* Release resources held by a cpu. */ 147 extern void sim_cpu_free (sim_cpu *); 148 149 /* Return a pointer to the cpu data for CPU_NAME, or NULL if not found. */ 150 extern sim_cpu *sim_cpu_lookup (SIM_DESC, const char *); 151 152 /* Return prefix to use in cpu specific messages. */ 153 extern const char *sim_cpu_msg_prefix (sim_cpu *); 154 /* Cover fn to sim_io_eprintf. */ 155 extern void sim_io_eprintf_cpu (sim_cpu *, const char *, ...) 156 ATTRIBUTE_PRINTF (2, 3); 157 158 /* Get/set a pc value. */ 159 #define CPU_PC_GET(cpu) ((* CPU_PC_FETCH (cpu)) (cpu)) 160 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) 161 /* External interface to accessing the pc. */ 162 sim_cia sim_pc_get (sim_cpu *); 163 void sim_pc_set (sim_cpu *, sim_cia); 164 165 #endif /* SIM_CPU_H */ 166