1 /* Blackfin External Bus Interface Unit (EBIU) SDRAM Controller (SDC) Model. 2 3 Copyright (C) 2010-2024 Free Software Foundation, Inc. 4 Contributed by Analog Devices, Inc. 5 6 This file is part of simulators. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21 /* This must come before any other includes. */ 22 #include "defs.h" 23 24 #include "sim-main.h" 25 #include "devices.h" 26 #include "dv-bfin_ebiu_sdc.h" 27 28 struct bfin_ebiu_sdc 29 { 30 bu32 base; 31 int type; 32 bu32 reg_size, bank_size; 33 34 /* Order after here is important -- matches hardware MMR layout. */ 35 bu32 sdgctl; 36 bu32 sdbctl; /* 16bit on most parts ... */ 37 bu16 BFIN_MMR_16(sdrrc); 38 bu16 BFIN_MMR_16(sdstat); 39 }; 40 #define mmr_base() offsetof(struct bfin_ebiu_sdc, sdgctl) 41 #define mmr_offset(mmr) (offsetof(struct bfin_ebiu_sdc, mmr) - mmr_base()) 42 43 static const char * const mmr_names[] = 44 { 45 "EBIU_SDGCTL", "EBIU_SDBCTL", "EBIU_SDRRC", "EBIU_SDSTAT", 46 }; 47 #define mmr_name(off) mmr_names[(off) / 4] 48 49 static unsigned 50 bfin_ebiu_sdc_io_write_buffer (struct hw *me, const void *source, 51 int space, address_word addr, unsigned nr_bytes) 52 { 53 struct bfin_ebiu_sdc *sdc = hw_data (me); 54 bu32 mmr_off; 55 bu32 value; 56 bu16 *value16p; 57 bu32 *value32p; 58 void *valuep; 59 60 /* Invalid access mode is higher priority than missing register. */ 61 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) 62 return 0; 63 64 if (nr_bytes == 4) 65 value = dv_load_4 (source); 66 else 67 value = dv_load_2 (source); 68 69 mmr_off = addr - sdc->base; 70 valuep = (void *)((uintptr_t)sdc + mmr_base() + mmr_off); 71 value16p = valuep; 72 value32p = valuep; 73 74 HW_TRACE_WRITE (); 75 76 switch (mmr_off) 77 { 78 case mmr_offset(sdgctl): 79 /* XXX: SRFS should make external mem unreadable. */ 80 *value32p = value; 81 break; 82 case mmr_offset(sdbctl): 83 if (sdc->type == 561) 84 { 85 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, true)) 86 return 0; 87 *value32p = value; 88 } 89 else 90 { 91 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 92 return 0; 93 *value16p = value; 94 } 95 break; 96 case mmr_offset(sdrrc): 97 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 98 return 0; 99 *value16p = value; 100 break; 101 case mmr_offset(sdstat): 102 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, true)) 103 return 0; 104 /* XXX: Some bits are W1C ... */ 105 break; 106 } 107 108 return nr_bytes; 109 } 110 111 static unsigned 112 bfin_ebiu_sdc_io_read_buffer (struct hw *me, void *dest, 113 int space, address_word addr, unsigned nr_bytes) 114 { 115 struct bfin_ebiu_sdc *sdc = hw_data (me); 116 bu32 mmr_off; 117 bu32 *value32p; 118 bu16 *value16p; 119 void *valuep; 120 121 /* Invalid access mode is higher priority than missing register. */ 122 if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) 123 return 0; 124 125 mmr_off = addr - sdc->base; 126 valuep = (void *)((uintptr_t)sdc + mmr_base() + mmr_off); 127 value16p = valuep; 128 value32p = valuep; 129 130 HW_TRACE_READ (); 131 132 switch (mmr_off) 133 { 134 case mmr_offset(sdgctl): 135 dv_store_4 (dest, *value32p); 136 break; 137 case mmr_offset(sdbctl): 138 if (sdc->type == 561) 139 { 140 if (!dv_bfin_mmr_require_32 (me, addr, nr_bytes, false)) 141 return 0; 142 dv_store_4 (dest, *value32p); 143 } 144 else 145 { 146 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) 147 return 0; 148 dv_store_2 (dest, *value16p); 149 } 150 break; 151 case mmr_offset(sdrrc): 152 case mmr_offset(sdstat): 153 if (!dv_bfin_mmr_require_16 (me, addr, nr_bytes, false)) 154 return 0; 155 dv_store_2 (dest, *value16p); 156 break; 157 } 158 159 return nr_bytes; 160 } 161 162 static void 163 attach_bfin_ebiu_sdc_regs (struct hw *me, struct bfin_ebiu_sdc *sdc) 164 { 165 address_word attach_address; 166 int attach_space; 167 unsigned attach_size; 168 reg_property_spec reg; 169 170 if (hw_find_property (me, "reg") == NULL) 171 hw_abort (me, "Missing \"reg\" property"); 172 173 if (!hw_find_reg_array_property (me, "reg", 0, ®)) 174 hw_abort (me, "\"reg\" property must contain three addr/size entries"); 175 176 hw_unit_address_to_attach_address (hw_parent (me), 177 ®.address, 178 &attach_space, &attach_address, me); 179 hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); 180 181 if (attach_size != BFIN_MMR_EBIU_SDC_SIZE) 182 hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EBIU_SDC_SIZE); 183 184 hw_attach_address (hw_parent (me), 185 0, attach_space, attach_address, attach_size, me); 186 187 sdc->base = attach_address; 188 } 189 190 static void 191 bfin_ebiu_sdc_finish (struct hw *me) 192 { 193 struct bfin_ebiu_sdc *sdc; 194 195 sdc = HW_ZALLOC (me, struct bfin_ebiu_sdc); 196 197 set_hw_data (me, sdc); 198 set_hw_io_read_buffer (me, bfin_ebiu_sdc_io_read_buffer); 199 set_hw_io_write_buffer (me, bfin_ebiu_sdc_io_write_buffer); 200 201 attach_bfin_ebiu_sdc_regs (me, sdc); 202 203 sdc->type = hw_find_integer_property (me, "type"); 204 205 /* Initialize the SDC. */ 206 sdc->sdgctl = 0xE0088849; 207 sdc->sdbctl = 0x00000000; 208 sdc->sdrrc = 0x081A; 209 sdc->sdstat = 0x0008; 210 211 /* XXX: We boot with 64M external memory by default ... */ 212 sdc->sdbctl |= EBE | EBSZ_64 | EBCAW_10; 213 } 214 215 const struct hw_descriptor dv_bfin_ebiu_sdc_descriptor[] = 216 { 217 {"bfin_ebiu_sdc", bfin_ebiu_sdc_finish,}, 218 {NULL, NULL}, 219 }; 220