1 /* Instruction opcode table for mt. 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5 Copyright 1996-2010 Free Software Foundation, Inc. 6 7 This file is part of the GNU Binutils and/or GDB, the GNU debugger. 8 9 This file is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License along 20 with this program; if not, write to the Free Software Foundation, Inc., 21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. 22 23 */ 24 25 #include "sysdep.h" 26 #include "ansidecl.h" 27 #include "bfd.h" 28 #include "symcat.h" 29 #include "mt-desc.h" 30 #include "mt-opc.h" 31 #include "libiberty.h" 32 33 /* -- opc.c */ 34 #include "safe-ctype.h" 35 36 /* Special check to ensure that instruction exists for given machine. */ 37 38 int 39 mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) 40 { 41 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 42 43 /* No mach attribute? Assume it's supported for all machs. */ 44 if (machs == 0) 45 return 1; 46 47 return ((machs & cd->machs) != 0); 48 } 49 50 /* A better hash function for instruction mnemonics. */ 51 52 unsigned int 53 mt_asm_hash (const char* insn) 54 { 55 unsigned int hash; 56 const char* m = insn; 57 58 for (hash = 0; *m && ! ISSPACE (*m); m++) 59 hash = (hash * 23) ^ (0x1F & TOLOWER (*m)); 60 61 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */ 62 63 return hash % CGEN_ASM_HASH_SIZE; 64 } 65 66 67 /* -- asm.c */ 68 /* The hash functions are recorded here to help keep assembler code out of 69 the disassembler and vice versa. */ 70 71 static int asm_hash_insn_p (const CGEN_INSN *); 72 static unsigned int asm_hash_insn (const char *); 73 static int dis_hash_insn_p (const CGEN_INSN *); 74 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT); 75 76 /* Instruction formats. */ 77 78 #define F(f) & mt_cgen_ifld_table[MT_##f] 79 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = { 80 0, 0, 0x0, { { 0 } } 81 }; 82 83 static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = { 84 32, 32, 0xff000fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } } 85 }; 86 87 static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = { 88 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16S) }, { 0 } } 89 }; 90 91 static const CGEN_IFMT ifmt_addui ATTRIBUTE_UNUSED = { 92 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } } 93 }; 94 95 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = { 96 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU24) }, { 0 } } 97 }; 98 99 static const CGEN_IFMT ifmt_ldui ATTRIBUTE_UNUSED = { 100 32, 32, 0xfff00000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_DR) }, { F (F_IMM16U) }, { 0 } } 101 }; 102 103 static const CGEN_IFMT ifmt_brlt ATTRIBUTE_UNUSED = { 104 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } } 105 }; 106 107 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = { 108 32, 32, 0xffff0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } } 109 }; 110 111 static const CGEN_IFMT ifmt_jal ATTRIBUTE_UNUSED = { 112 32, 32, 0xff0f0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } } 113 }; 114 115 static const CGEN_IFMT ifmt_dbnz ATTRIBUTE_UNUSED = { 116 32, 32, 0xff0f0000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_IMM16S) }, { 0 } } 117 }; 118 119 static const CGEN_IFMT ifmt_ei ATTRIBUTE_UNUSED = { 120 32, 32, 0xffffffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } } 121 }; 122 123 static const CGEN_IFMT ifmt_si ATTRIBUTE_UNUSED = { 124 32, 32, 0xffff0fff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_UU4B) }, { F (F_UU4A) }, { F (F_DRRR) }, { F (F_UU12) }, { 0 } } 125 }; 126 127 static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = { 128 32, 32, 0xff0fffff, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU16) }, { 0 } } 129 }; 130 131 static const CGEN_IFMT ifmt_stw ATTRIBUTE_UNUSED = { 132 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16S) }, { 0 } } 133 }; 134 135 static const CGEN_IFMT ifmt_ldctxt ATTRIBUTE_UNUSED = { 136 32, 32, 0xff000e00, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_RC) }, { F (F_RCNUM) }, { F (F_UU_3_11) }, { F (F_CONTNUM) }, { 0 } } 137 }; 138 139 static const CGEN_IFMT ifmt_ldfb ATTRIBUTE_UNUSED = { 140 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_IMM16U) }, { 0 } } 141 }; 142 143 static const CGEN_IFMT ifmt_fbcb ATTRIBUTE_UNUSED = { 144 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_4_15) }, { F (F_RC) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 145 }; 146 147 static const CGEN_IFMT ifmt_mfbcb ATTRIBUTE_UNUSED = { 148 32, 32, 0xfc00f000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_4_15) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 149 }; 150 151 static const CGEN_IFMT ifmt_fbcci ATTRIBUTE_UNUSED = { 152 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 153 }; 154 155 static const CGEN_IFMT ifmt_mfbcci ATTRIBUTE_UNUSED = { 156 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 157 }; 158 159 static const CGEN_IFMT ifmt_fbcbdr ATTRIBUTE_UNUSED = { 160 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_BALL2) }, { F (F_BRC2) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 161 }; 162 163 static const CGEN_IFMT ifmt_rcfbcb ATTRIBUTE_UNUSED = { 164 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_BALL) }, { F (F_BRC) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 165 }; 166 167 static const CGEN_IFMT ifmt_mrcfbcb ATTRIBUTE_UNUSED = { 168 32, 32, 0xfcc08000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_UU_2_23) }, { F (F_TYPE) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ROWNUM) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 169 }; 170 171 static const CGEN_IFMT ifmt_cbcast ATTRIBUTE_UNUSED = { 172 32, 32, 0xfc000380, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_UU_3_9) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 173 }; 174 175 static const CGEN_IFMT ifmt_dupcbcast ATTRIBUTE_UNUSED = { 176 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MASK) }, { F (F_CELL) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 177 }; 178 179 static const CGEN_IFMT ifmt_wfbi ATTRIBUTE_UNUSED = { 180 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_BANKADDR) }, { F (F_ROWNUM1) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 181 }; 182 183 static const CGEN_IFMT ifmt_wfb ATTRIBUTE_UNUSED = { 184 32, 32, 0xff000040, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_UU_2_25) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_UU_1_6) }, { F (F_CTXDISP) }, { 0 } } 185 }; 186 187 static const CGEN_IFMT ifmt_rcrisc ATTRIBUTE_UNUSED = { 188 32, 32, 0xfc080000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_UU_1_19) }, { F (F_COLNUM) }, { F (F_DRRR) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 189 }; 190 191 static const CGEN_IFMT ifmt_fbcbinc ATTRIBUTE_UNUSED = { 192 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RBBC) }, { F (F_SR1) }, { F (F_INCAMT) }, { F (F_RC1) }, { F (F_CBRB) }, { F (F_CELL) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 193 }; 194 195 static const CGEN_IFMT ifmt_rcxmode ATTRIBUTE_UNUSED = { 196 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_XMODE) }, { F (F_MASK1) }, { F (F_SR2) }, { F (F_FBDISP) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 197 }; 198 199 static const CGEN_IFMT ifmt_interleaver ATTRIBUTE_UNUSED = { 200 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_MODE) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_ID) }, { F (F_SIZE) }, { 0 } } 201 }; 202 203 static const CGEN_IFMT ifmt_wfbinc ATTRIBUTE_UNUSED = { 204 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 205 }; 206 207 static const CGEN_IFMT ifmt_mwfbinc ATTRIBUTE_UNUSED = { 208 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_FBINCR) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 209 }; 210 211 static const CGEN_IFMT ifmt_wfbincr ATTRIBUTE_UNUSED = { 212 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 213 }; 214 215 static const CGEN_IFMT ifmt_mwfbincr ATTRIBUTE_UNUSED = { 216 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_RDA) }, { F (F_WR) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 217 }; 218 219 static const CGEN_IFMT ifmt_fbcbincs ATTRIBUTE_UNUSED = { 220 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_A23) }, { F (F_CR) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 221 }; 222 223 static const CGEN_IFMT ifmt_mfbcbincs ATTRIBUTE_UNUSED = { 224 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_CBS) }, { F (F_INCR) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 225 }; 226 227 static const CGEN_IFMT ifmt_fbcbincrs ATTRIBUTE_UNUSED = { 228 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_BALL) }, { F (F_COLNUM) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 229 }; 230 231 static const CGEN_IFMT ifmt_mfbcbincrs ATTRIBUTE_UNUSED = { 232 32, 32, 0xfc008000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_PERM) }, { F (F_SR1) }, { F (F_SR2) }, { F (F_UU_1_15) }, { F (F_CBX) }, { F (F_CCB) }, { F (F_CDB) }, { F (F_ROWNUM2) }, { F (F_DUP) }, { F (F_CTXDISP) }, { 0 } } 233 }; 234 235 static const CGEN_IFMT ifmt_loop ATTRIBUTE_UNUSED = { 236 32, 32, 0xff0fff00, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_SR1) }, { F (F_UU4A) }, { F (F_UU8) }, { F (F_LOOPO) }, { 0 } } 237 }; 238 239 static const CGEN_IFMT ifmt_loopi ATTRIBUTE_UNUSED = { 240 32, 32, 0xff000000, { { F (F_MSYS) }, { F (F_OPC) }, { F (F_IMM) }, { F (F_IMM16L) }, { F (F_LOOPO) }, { 0 } } 241 }; 242 243 static const CGEN_IFMT ifmt_dfbc ATTRIBUTE_UNUSED = { 244 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_RC3) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 245 }; 246 247 static const CGEN_IFMT ifmt_dwfb ATTRIBUTE_UNUSED = { 248 32, 32, 0xfc000080, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_CB1INCR) }, { F (F_CB2INCR) }, { F (F_UU1) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 249 }; 250 251 static const CGEN_IFMT ifmt_dfbr ATTRIBUTE_UNUSED = { 252 32, 32, 0xfc000000, { { F (F_MSYS) }, { F (F_MSOPC) }, { F (F_CB1SEL) }, { F (F_CB2SEL) }, { F (F_SR2) }, { F (F_LENGTH) }, { F (F_ROWNUM1) }, { F (F_ROWNUM2) }, { F (F_RC2) }, { F (F_CTXDISP) }, { 0 } } 253 }; 254 255 #undef F 256 257 #define A(a) (1 << CGEN_INSN_##a) 258 #define OPERAND(op) MT_OPERAND_##op 259 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 260 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 261 262 /* The instruction table. */ 263 264 static const CGEN_OPCODE mt_cgen_insn_opcode_table[MAX_INSNS] = 265 { 266 /* Special null first entry. 267 A `num' value of zero is thus invalid. 268 Also, the special `invalid' insn resides here. */ 269 { { 0, 0, 0, 0 }, {{0}}, 0, {0}}, 270 /* add $frdrrr,$frsr1,$frsr2 */ 271 { 272 { 0, 0, 0, 0 }, 273 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 274 & ifmt_add, { 0x0 } 275 }, 276 /* addu $frdrrr,$frsr1,$frsr2 */ 277 { 278 { 0, 0, 0, 0 }, 279 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 280 & ifmt_add, { 0x2000000 } 281 }, 282 /* addi $frdr,$frsr1,#$imm16 */ 283 { 284 { 0, 0, 0, 0 }, 285 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 286 & ifmt_addi, { 0x1000000 } 287 }, 288 /* addui $frdr,$frsr1,#$imm16z */ 289 { 290 { 0, 0, 0, 0 }, 291 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 292 & ifmt_addui, { 0x3000000 } 293 }, 294 /* sub $frdrrr,$frsr1,$frsr2 */ 295 { 296 { 0, 0, 0, 0 }, 297 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 298 & ifmt_add, { 0x4000000 } 299 }, 300 /* subu $frdrrr,$frsr1,$frsr2 */ 301 { 302 { 0, 0, 0, 0 }, 303 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 304 & ifmt_add, { 0x6000000 } 305 }, 306 /* subi $frdr,$frsr1,#$imm16 */ 307 { 308 { 0, 0, 0, 0 }, 309 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 310 & ifmt_addi, { 0x5000000 } 311 }, 312 /* subui $frdr,$frsr1,#$imm16z */ 313 { 314 { 0, 0, 0, 0 }, 315 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 316 & ifmt_addui, { 0x7000000 } 317 }, 318 /* mul $frdrrr,$frsr1,$frsr2 */ 319 { 320 { 0, 0, 0, 0 }, 321 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 322 & ifmt_add, { 0x8000000 } 323 }, 324 /* muli $frdr,$frsr1,#$imm16 */ 325 { 326 { 0, 0, 0, 0 }, 327 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 328 & ifmt_addi, { 0x9000000 } 329 }, 330 /* and $frdrrr,$frsr1,$frsr2 */ 331 { 332 { 0, 0, 0, 0 }, 333 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 334 & ifmt_add, { 0x10000000 } 335 }, 336 /* andi $frdr,$frsr1,#$imm16z */ 337 { 338 { 0, 0, 0, 0 }, 339 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 340 & ifmt_addui, { 0x11000000 } 341 }, 342 /* or $frdrrr,$frsr1,$frsr2 */ 343 { 344 { 0, 0, 0, 0 }, 345 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 346 & ifmt_add, { 0x12000000 } 347 }, 348 /* nop */ 349 { 350 { 0, 0, 0, 0 }, 351 { { MNEM, 0 } }, 352 & ifmt_nop, { 0x12000000 } 353 }, 354 /* ori $frdr,$frsr1,#$imm16z */ 355 { 356 { 0, 0, 0, 0 }, 357 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 358 & ifmt_addui, { 0x13000000 } 359 }, 360 /* xor $frdrrr,$frsr1,$frsr2 */ 361 { 362 { 0, 0, 0, 0 }, 363 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 364 & ifmt_add, { 0x14000000 } 365 }, 366 /* xori $frdr,$frsr1,#$imm16z */ 367 { 368 { 0, 0, 0, 0 }, 369 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 370 & ifmt_addui, { 0x15000000 } 371 }, 372 /* nand $frdrrr,$frsr1,$frsr2 */ 373 { 374 { 0, 0, 0, 0 }, 375 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 376 & ifmt_add, { 0x16000000 } 377 }, 378 /* nandi $frdr,$frsr1,#$imm16z */ 379 { 380 { 0, 0, 0, 0 }, 381 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 382 & ifmt_addui, { 0x17000000 } 383 }, 384 /* nor $frdrrr,$frsr1,$frsr2 */ 385 { 386 { 0, 0, 0, 0 }, 387 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 388 & ifmt_add, { 0x18000000 } 389 }, 390 /* nori $frdr,$frsr1,#$imm16z */ 391 { 392 { 0, 0, 0, 0 }, 393 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 394 & ifmt_addui, { 0x19000000 } 395 }, 396 /* xnor $frdrrr,$frsr1,$frsr2 */ 397 { 398 { 0, 0, 0, 0 }, 399 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 400 & ifmt_add, { 0x1a000000 } 401 }, 402 /* xnori $frdr,$frsr1,#$imm16z */ 403 { 404 { 0, 0, 0, 0 }, 405 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16Z), 0 } }, 406 & ifmt_addui, { 0x1b000000 } 407 }, 408 /* ldui $frdr,#$imm16z */ 409 { 410 { 0, 0, 0, 0 }, 411 { { MNEM, ' ', OP (FRDR), ',', '#', OP (IMM16Z), 0 } }, 412 & ifmt_ldui, { 0x1d000000 } 413 }, 414 /* lsl $frdrrr,$frsr1,$frsr2 */ 415 { 416 { 0, 0, 0, 0 }, 417 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 418 & ifmt_add, { 0x20000000 } 419 }, 420 /* lsli $frdr,$frsr1,#$imm16 */ 421 { 422 { 0, 0, 0, 0 }, 423 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 424 & ifmt_addi, { 0x21000000 } 425 }, 426 /* lsr $frdrrr,$frsr1,$frsr2 */ 427 { 428 { 0, 0, 0, 0 }, 429 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 430 & ifmt_add, { 0x22000000 } 431 }, 432 /* lsri $frdr,$frsr1,#$imm16 */ 433 { 434 { 0, 0, 0, 0 }, 435 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 436 & ifmt_addi, { 0x23000000 } 437 }, 438 /* asr $frdrrr,$frsr1,$frsr2 */ 439 { 440 { 0, 0, 0, 0 }, 441 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), ',', OP (FRSR2), 0 } }, 442 & ifmt_add, { 0x24000000 } 443 }, 444 /* asri $frdr,$frsr1,#$imm16 */ 445 { 446 { 0, 0, 0, 0 }, 447 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 448 & ifmt_addi, { 0x25000000 } 449 }, 450 /* brlt $frsr1,$frsr2,$imm16o */ 451 { 452 { 0, 0, 0, 0 }, 453 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } }, 454 & ifmt_brlt, { 0x31000000 } 455 }, 456 /* brle $frsr1,$frsr2,$imm16o */ 457 { 458 { 0, 0, 0, 0 }, 459 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } }, 460 & ifmt_brlt, { 0x33000000 } 461 }, 462 /* breq $frsr1,$frsr2,$imm16o */ 463 { 464 { 0, 0, 0, 0 }, 465 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } }, 466 & ifmt_brlt, { 0x35000000 } 467 }, 468 /* brne $frsr1,$frsr2,$imm16o */ 469 { 470 { 0, 0, 0, 0 }, 471 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', OP (IMM16O), 0 } }, 472 & ifmt_brlt, { 0x3b000000 } 473 }, 474 /* jmp $imm16o */ 475 { 476 { 0, 0, 0, 0 }, 477 { { MNEM, ' ', OP (IMM16O), 0 } }, 478 & ifmt_jmp, { 0x37000000 } 479 }, 480 /* jal $frdrrr,$frsr1 */ 481 { 482 { 0, 0, 0, 0 }, 483 { { MNEM, ' ', OP (FRDRRR), ',', OP (FRSR1), 0 } }, 484 & ifmt_jal, { 0x38000000 } 485 }, 486 /* dbnz $frsr1,$imm16o */ 487 { 488 { 0, 0, 0, 0 }, 489 { { MNEM, ' ', OP (FRSR1), ',', OP (IMM16O), 0 } }, 490 & ifmt_dbnz, { 0x3d000000 } 491 }, 492 /* ei */ 493 { 494 { 0, 0, 0, 0 }, 495 { { MNEM, 0 } }, 496 & ifmt_ei, { 0x60000000 } 497 }, 498 /* di */ 499 { 500 { 0, 0, 0, 0 }, 501 { { MNEM, 0 } }, 502 & ifmt_ei, { 0x62000000 } 503 }, 504 /* si $frdrrr */ 505 { 506 { 0, 0, 0, 0 }, 507 { { MNEM, ' ', OP (FRDRRR), 0 } }, 508 & ifmt_si, { 0x64000000 } 509 }, 510 /* reti $frsr1 */ 511 { 512 { 0, 0, 0, 0 }, 513 { { MNEM, ' ', OP (FRSR1), 0 } }, 514 & ifmt_reti, { 0x66000000 } 515 }, 516 /* ldw $frdr,$frsr1,#$imm16 */ 517 { 518 { 0, 0, 0, 0 }, 519 { { MNEM, ' ', OP (FRDR), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 520 & ifmt_addi, { 0x41000000 } 521 }, 522 /* stw $frsr2,$frsr1,#$imm16 */ 523 { 524 { 0, 0, 0, 0 }, 525 { { MNEM, ' ', OP (FRSR2), ',', OP (FRSR1), ',', '#', OP (IMM16), 0 } }, 526 & ifmt_stw, { 0x43000000 } 527 }, 528 /* break */ 529 { 530 { 0, 0, 0, 0 }, 531 { { MNEM, 0 } }, 532 & ifmt_nop, { 0x68000000 } 533 }, 534 /* iflush */ 535 { 536 { 0, 0, 0, 0 }, 537 { { MNEM, 0 } }, 538 & ifmt_nop, { 0x6a000000 } 539 }, 540 /* ldctxt $frsr1,$frsr2,#$rc,#$rcnum,#$contnum */ 541 { 542 { 0, 0, 0, 0 }, 543 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RC), ',', '#', OP (RCNUM), ',', '#', OP (CONTNUM), 0 } }, 544 & ifmt_ldctxt, { 0x80000000 } 545 }, 546 /* ldfb $frsr1,$frsr2,#$imm16z */ 547 { 548 { 0, 0, 0, 0 }, 549 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } }, 550 & ifmt_ldfb, { 0x84000000 } 551 }, 552 /* stfb $frsr1,$frsr2,#$imm16z */ 553 { 554 { 0, 0, 0, 0 }, 555 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (IMM16Z), 0 } }, 556 & ifmt_ldfb, { 0x88000000 } 557 }, 558 /* fbcb $frsr1,#$rbbc,#$ball,#$brc,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 559 { 560 { 0, 0, 0, 0 }, 561 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 562 & ifmt_fbcb, { 0x8c000000 } 563 }, 564 /* mfbcb $frsr1,#$rbbc,$frsr2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 565 { 566 { 0, 0, 0, 0 }, 567 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 568 & ifmt_mfbcb, { 0x90000000 } 569 }, 570 /* fbcci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 571 { 572 { 0, 0, 0, 0 }, 573 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 574 & ifmt_fbcci, { 0x94000000 } 575 }, 576 /* fbrci $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 577 { 578 { 0, 0, 0, 0 }, 579 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 580 & ifmt_fbcci, { 0x98000000 } 581 }, 582 /* fbcri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 583 { 584 { 0, 0, 0, 0 }, 585 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 586 & ifmt_fbcci, { 0x9c000000 } 587 }, 588 /* fbrri $frsr1,#$rbbc,#$ball,#$brc,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 589 { 590 { 0, 0, 0, 0 }, 591 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 592 & ifmt_fbcci, { 0xa0000000 } 593 }, 594 /* mfbcci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 595 { 596 { 0, 0, 0, 0 }, 597 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 598 & ifmt_mfbcci, { 0xa4000000 } 599 }, 600 /* mfbrci $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 601 { 602 { 0, 0, 0, 0 }, 603 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 604 & ifmt_mfbcci, { 0xa8000000 } 605 }, 606 /* mfbcri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 607 { 608 { 0, 0, 0, 0 }, 609 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 610 & ifmt_mfbcci, { 0xac000000 } 611 }, 612 /* mfbrri $frsr1,#$rbbc,$frsr2,#$fbdisp,#$cell,#$dup,#$ctxdisp */ 613 { 614 { 0, 0, 0, 0 }, 615 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 616 & ifmt_mfbcci, { 0xb0000000 } 617 }, 618 /* fbcbdr $frsr1,#$rbbc,$frsr2,#$ball2,#$brc2,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 619 { 620 { 0, 0, 0, 0 }, 621 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', OP (FRSR2), ',', '#', OP (BALL2), ',', '#', OP (BRC2), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 622 & ifmt_fbcbdr, { 0xb4000000 } 623 }, 624 /* rcfbcb #$rbbc,#$type,#$ball,#$brc,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 625 { 626 { 0, 0, 0, 0 }, 627 { { MNEM, ' ', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (BALL), ',', '#', OP (BRC), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 628 & ifmt_rcfbcb, { 0xb8000000 } 629 }, 630 /* mrcfbcb $frsr2,#$rbbc,#$type,#$rownum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 631 { 632 { 0, 0, 0, 0 }, 633 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RBBC), ',', '#', OP (TYPE), ',', '#', OP (ROWNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 634 & ifmt_mrcfbcb, { 0xbc000000 } 635 }, 636 /* cbcast #$mask,#$rc2,#$ctxdisp */ 637 { 638 { 0, 0, 0, 0 }, 639 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 640 & ifmt_cbcast, { 0xc0000000 } 641 }, 642 /* dupcbcast #$mask,#$cell,#$rc2,#$ctxdisp */ 643 { 644 { 0, 0, 0, 0 }, 645 { { MNEM, ' ', '#', OP (MASK), ',', '#', OP (CELL), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 646 & ifmt_dupcbcast, { 0xc4000000 } 647 }, 648 /* wfbi #$bankaddr,#$rownum1,#$cell,#$dup,#$ctxdisp */ 649 { 650 { 0, 0, 0, 0 }, 651 { { MNEM, ' ', '#', OP (BANKADDR), ',', '#', OP (ROWNUM1), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 652 & ifmt_wfbi, { 0xc8000000 } 653 }, 654 /* wfb $frsr1,$frsr2,#$fbdisp,#$rownum2,#$ctxdisp */ 655 { 656 { 0, 0, 0, 0 }, 657 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (CTXDISP), 0 } }, 658 & ifmt_wfb, { 0xcc000000 } 659 }, 660 /* rcrisc $frdrrr,#$rbbc,$frsr1,#$colnum,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 661 { 662 { 0, 0, 0, 0 }, 663 { { MNEM, ' ', OP (FRDRRR), ',', '#', OP (RBBC), ',', OP (FRSR1), ',', '#', OP (COLNUM), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 664 & ifmt_rcrisc, { 0xd0000000 } 665 }, 666 /* fbcbinc $frsr1,#$rbbc,#$incamt,#$rc1,#$cbrb,#$cell,#$dup,#$ctxdisp */ 667 { 668 { 0, 0, 0, 0 }, 669 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RBBC), ',', '#', OP (INCAMT), ',', '#', OP (RC1), ',', '#', OP (CBRB), ',', '#', OP (CELL), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 670 & ifmt_fbcbinc, { 0xd4000000 } 671 }, 672 /* rcxmode $frsr2,#$rda,#$wr,#$xmode,#$mask1,#$fbdisp,#$rownum2,#$rc2,#$ctxdisp */ 673 { 674 { 0, 0, 0, 0 }, 675 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (XMODE), ',', '#', OP (MASK1), ',', '#', OP (FBDISP), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 676 & ifmt_rcxmode, { 0xd8000000 } 677 }, 678 /* intlvr $frsr1,#$mode,$frsr2,#$id,#$size */ 679 { 680 { 0, 0, 0, 0 }, 681 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (MODE), ',', OP (FRSR2), ',', '#', OP (ID), ',', '#', OP (SIZE), 0 } }, 682 & ifmt_interleaver, { 0xdc000000 } 683 }, 684 /* wfbinc #$rda,#$wr,#$fbincr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */ 685 { 686 { 0, 0, 0, 0 }, 687 { { MNEM, ' ', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 688 & ifmt_wfbinc, { 0xe0000000 } 689 }, 690 /* mwfbinc $frsr2,#$rda,#$wr,#$fbincr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */ 691 { 692 { 0, 0, 0, 0 }, 693 { { MNEM, ' ', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (FBINCR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 694 & ifmt_mwfbinc, { 0xe4000000 } 695 }, 696 /* wfbincr $frsr1,#$rda,#$wr,#$ball,#$colnum,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */ 697 { 698 { 0, 0, 0, 0 }, 699 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 700 & ifmt_wfbincr, { 0xe8000000 } 701 }, 702 /* mwfbincr $frsr1,$frsr2,#$rda,#$wr,#$length,#$rownum1,#$rownum2,#$dup,#$ctxdisp */ 703 { 704 { 0, 0, 0, 0 }, 705 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RDA), ',', '#', OP (WR), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 706 & ifmt_mwfbincr, { 0xec000000 } 707 }, 708 /* fbcbincs #$perm,#$a23,#$cr,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */ 709 { 710 { 0, 0, 0, 0 }, 711 { { MNEM, ' ', '#', OP (PERM), ',', '#', OP (A23), ',', '#', OP (CR), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 712 & ifmt_fbcbincs, { 0xf0000000 } 713 }, 714 /* mfbcbincs $frsr1,#$perm,#$cbs,#$incr,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */ 715 { 716 { 0, 0, 0, 0 }, 717 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (CBS), ',', '#', OP (INCR), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 718 & ifmt_mfbcbincs, { 0xf4000000 } 719 }, 720 /* fbcbincrs $frsr1,#$perm,#$ball,#$colnum,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */ 721 { 722 { 0, 0, 0, 0 }, 723 { { MNEM, ' ', OP (FRSR1), ',', '#', OP (PERM), ',', '#', OP (BALL), ',', '#', OP (COLNUM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 724 & ifmt_fbcbincrs, { 0xf8000000 } 725 }, 726 /* mfbcbincrs $frsr1,$frsr2,#$perm,#$cbx,#$ccb,#$cdb,#$rownum2,#$dup,#$ctxdisp */ 727 { 728 { 0, 0, 0, 0 }, 729 { { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (PERM), ',', '#', OP (CBX), ',', '#', OP (CCB), ',', '#', OP (CDB), ',', '#', OP (ROWNUM2), ',', '#', OP (DUP), ',', '#', OP (CTXDISP), 0 } }, 730 & ifmt_mfbcbincrs, { 0xfc000000 } 731 }, 732 /* loop $frsr1,$loopsize */ 733 { 734 { 0, 0, 0, 0 }, 735 { { MNEM, ' ', OP (FRSR1), ',', OP (LOOPSIZE), 0 } }, 736 & ifmt_loop, { 0x3e000000 } 737 }, 738 /* loopi #$imm16l,$loopsize */ 739 { 740 { 0, 0, 0, 0 }, 741 { { MNEM, ' ', '#', OP (IMM16L), ',', OP (LOOPSIZE), 0 } }, 742 & ifmt_loopi, { 0x3f000000 } 743 }, 744 /* dfbc #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */ 745 { 746 { 0, 0, 0, 0 }, 747 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 748 & ifmt_dfbc, { 0x80000000 } 749 }, 750 /* dwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc2,#$ctxdisp */ 751 { 752 { 0, 0, 0, 0 }, 753 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 754 & ifmt_dwfb, { 0x84000000 } 755 }, 756 /* fbwfb #$cb1sel,#$cb2sel,#$cb1incr,#$cb2incr,#$rc3,#$rc2,#$ctxdisp */ 757 { 758 { 0, 0, 0, 0 }, 759 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', '#', OP (CB1INCR), ',', '#', OP (CB2INCR), ',', '#', OP (RC3), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 760 & ifmt_dfbc, { 0x88000000 } 761 }, 762 /* dfbr #$cb1sel,#$cb2sel,$frsr2,#$length,#$rownum1,#$rownum2,#$rc2,#$ctxdisp */ 763 { 764 { 0, 0, 0, 0 }, 765 { { MNEM, ' ', '#', OP (CB1SEL), ',', '#', OP (CB2SEL), ',', OP (FRSR2), ',', '#', OP (LENGTH), ',', '#', OP (ROWNUM1), ',', '#', OP (ROWNUM2), ',', '#', OP (RC2), ',', '#', OP (CTXDISP), 0 } }, 766 & ifmt_dfbr, { 0x8c000000 } 767 }, 768 }; 769 770 #undef A 771 #undef OPERAND 772 #undef MNEM 773 #undef OP 774 775 /* Formats for ALIAS macro-insns. */ 776 777 #define F(f) & mt_cgen_ifld_table[MT_##f] 778 #undef F 779 780 /* Each non-simple macro entry points to an array of expansion possibilities. */ 781 782 #define A(a) (1 << CGEN_INSN_##a) 783 #define OPERAND(op) MT_OPERAND_##op 784 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */ 785 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field)) 786 787 /* The macro instruction table. */ 788 789 static const CGEN_IBASE mt_cgen_macro_insn_table[] = 790 { 791 }; 792 793 /* The macro instruction opcode table. */ 794 795 static const CGEN_OPCODE mt_cgen_macro_insn_opcode_table[] = 796 { 797 }; 798 799 #undef A 800 #undef OPERAND 801 #undef MNEM 802 #undef OP 803 804 #ifndef CGEN_ASM_HASH_P 805 #define CGEN_ASM_HASH_P(insn) 1 806 #endif 807 808 #ifndef CGEN_DIS_HASH_P 809 #define CGEN_DIS_HASH_P(insn) 1 810 #endif 811 812 /* Return non-zero if INSN is to be added to the hash table. 813 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */ 814 815 static int 816 asm_hash_insn_p (insn) 817 const CGEN_INSN *insn ATTRIBUTE_UNUSED; 818 { 819 return CGEN_ASM_HASH_P (insn); 820 } 821 822 static int 823 dis_hash_insn_p (insn) 824 const CGEN_INSN *insn; 825 { 826 /* If building the hash table and the NO-DIS attribute is present, 827 ignore. */ 828 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS)) 829 return 0; 830 return CGEN_DIS_HASH_P (insn); 831 } 832 833 #ifndef CGEN_ASM_HASH 834 #define CGEN_ASM_HASH_SIZE 127 835 #ifdef CGEN_MNEMONIC_OPERANDS 836 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) 837 #else 838 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/ 839 #endif 840 #endif 841 842 /* It doesn't make much sense to provide a default here, 843 but while this is under development we do. 844 BUFFER is a pointer to the bytes of the insn, target order. 845 VALUE is the first base_insn_bitsize bits as an int in host order. */ 846 847 #ifndef CGEN_DIS_HASH 848 #define CGEN_DIS_HASH_SIZE 256 849 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf)) 850 #endif 851 852 /* The result is the hash value of the insn. 853 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */ 854 855 static unsigned int 856 asm_hash_insn (mnem) 857 const char * mnem; 858 { 859 return CGEN_ASM_HASH (mnem); 860 } 861 862 /* BUF is a pointer to the bytes of the insn, target order. 863 VALUE is the first base_insn_bitsize bits as an int in host order. */ 864 865 static unsigned int 866 dis_hash_insn (buf, value) 867 const char * buf ATTRIBUTE_UNUSED; 868 CGEN_INSN_INT value ATTRIBUTE_UNUSED; 869 { 870 return CGEN_DIS_HASH (buf, value); 871 } 872 873 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */ 874 875 static void 876 set_fields_bitsize (CGEN_FIELDS *fields, int size) 877 { 878 CGEN_FIELDS_BITSIZE (fields) = size; 879 } 880 881 /* Function to call before using the operand instance table. 882 This plugs the opcode entries and macro instructions into the cpu table. */ 883 884 void 885 mt_cgen_init_opcode_table (CGEN_CPU_DESC cd) 886 { 887 int i; 888 int num_macros = (sizeof (mt_cgen_macro_insn_table) / 889 sizeof (mt_cgen_macro_insn_table[0])); 890 const CGEN_IBASE *ib = & mt_cgen_macro_insn_table[0]; 891 const CGEN_OPCODE *oc = & mt_cgen_macro_insn_opcode_table[0]; 892 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN)); 893 894 /* This test has been added to avoid a warning generated 895 if memset is called with a third argument of value zero. */ 896 if (num_macros >= 1) 897 memset (insns, 0, num_macros * sizeof (CGEN_INSN)); 898 for (i = 0; i < num_macros; ++i) 899 { 900 insns[i].base = &ib[i]; 901 insns[i].opcode = &oc[i]; 902 mt_cgen_build_insn_regex (& insns[i]); 903 } 904 cd->macro_insn_table.init_entries = insns; 905 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE); 906 cd->macro_insn_table.num_init_entries = num_macros; 907 908 oc = & mt_cgen_insn_opcode_table[0]; 909 insns = (CGEN_INSN *) cd->insn_table.init_entries; 910 for (i = 0; i < MAX_INSNS; ++i) 911 { 912 insns[i].opcode = &oc[i]; 913 mt_cgen_build_insn_regex (& insns[i]); 914 } 915 916 cd->sizeof_fields = sizeof (CGEN_FIELDS); 917 cd->set_fields_bitsize = set_fields_bitsize; 918 919 cd->asm_hash_p = asm_hash_insn_p; 920 cd->asm_hash = asm_hash_insn; 921 cd->asm_hash_size = CGEN_ASM_HASH_SIZE; 922 923 cd->dis_hash_p = dis_hash_insn_p; 924 cd->dis_hash = dis_hash_insn; 925 cd->dis_hash_size = CGEN_DIS_HASH_SIZE; 926 } 927