1 /* MIPS ELF support for BFD. 2 Copyright (C) 1993-2024 Free Software Foundation, Inc. 3 4 By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from 5 information in the System V Application Binary Interface, MIPS 6 Processor Supplement. 7 8 This file is part of BFD, the Binary File Descriptor library. 9 10 This program is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3 of the License, or 13 (at your option) any later version. 14 15 This program is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software 22 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 23 MA 02110-1301, USA. */ 24 25 /* This file holds definitions specific to the MIPS ELF ABI. Note 26 that most of this is not actually implemented by BFD. */ 27 28 #ifndef _ELF_MIPS_H 29 #define _ELF_MIPS_H 30 31 #include "elf/reloc-macros.h" 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 /* Relocation types. */ 38 START_RELOC_NUMBERS (elf_mips_reloc_type) 39 RELOC_NUMBER (R_MIPS_NONE, 0) 40 RELOC_NUMBER (R_MIPS_16, 1) 41 RELOC_NUMBER (R_MIPS_32, 2) /* In Elf 64: alias R_MIPS_ADD */ 42 RELOC_NUMBER (R_MIPS_REL32, 3) /* In Elf 64: alias R_MIPS_REL */ 43 RELOC_NUMBER (R_MIPS_26, 4) 44 RELOC_NUMBER (R_MIPS_HI16, 5) 45 RELOC_NUMBER (R_MIPS_LO16, 6) 46 RELOC_NUMBER (R_MIPS_GPREL16, 7) /* In Elf 64: alias R_MIPS_GPREL */ 47 RELOC_NUMBER (R_MIPS_LITERAL, 8) 48 RELOC_NUMBER (R_MIPS_GOT16, 9) /* In Elf 64: alias R_MIPS_GOT */ 49 RELOC_NUMBER (R_MIPS_PC16, 10) 50 RELOC_NUMBER (R_MIPS_CALL16, 11) /* In Elf 64: alias R_MIPS_CALL */ 51 RELOC_NUMBER (R_MIPS_GPREL32, 12) 52 /* The remaining relocs are defined on Irix, although they are not 53 in the MIPS ELF ABI. */ 54 RELOC_NUMBER (R_MIPS_UNUSED1, 13) 55 RELOC_NUMBER (R_MIPS_UNUSED2, 14) 56 RELOC_NUMBER (R_MIPS_UNUSED3, 15) 57 RELOC_NUMBER (R_MIPS_SHIFT5, 16) 58 RELOC_NUMBER (R_MIPS_SHIFT6, 17) 59 RELOC_NUMBER (R_MIPS_64, 18) 60 RELOC_NUMBER (R_MIPS_GOT_DISP, 19) 61 RELOC_NUMBER (R_MIPS_GOT_PAGE, 20) 62 RELOC_NUMBER (R_MIPS_GOT_OFST, 21) 63 RELOC_NUMBER (R_MIPS_GOT_HI16, 22) 64 RELOC_NUMBER (R_MIPS_GOT_LO16, 23) 65 RELOC_NUMBER (R_MIPS_SUB, 24) 66 RELOC_NUMBER (R_MIPS_INSERT_A, 25) 67 RELOC_NUMBER (R_MIPS_INSERT_B, 26) 68 RELOC_NUMBER (R_MIPS_DELETE, 27) 69 RELOC_NUMBER (R_MIPS_HIGHER, 28) 70 RELOC_NUMBER (R_MIPS_HIGHEST, 29) 71 RELOC_NUMBER (R_MIPS_CALL_HI16, 30) 72 RELOC_NUMBER (R_MIPS_CALL_LO16, 31) 73 RELOC_NUMBER (R_MIPS_SCN_DISP, 32) 74 RELOC_NUMBER (R_MIPS_REL16, 33) 75 RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34) 76 RELOC_NUMBER (R_MIPS_PJUMP, 35) 77 RELOC_NUMBER (R_MIPS_RELGOT, 36) 78 RELOC_NUMBER (R_MIPS_JALR, 37) 79 /* TLS relocations. */ 80 RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38) 81 RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39) 82 RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40) 83 RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41) 84 RELOC_NUMBER (R_MIPS_TLS_GD, 42) 85 RELOC_NUMBER (R_MIPS_TLS_LDM, 43) 86 RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44) 87 RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45) 88 RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46) 89 RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47) 90 RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48) 91 RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49) 92 RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50) 93 RELOC_NUMBER (R_MIPS_GLOB_DAT, 51) 94 /* Space to grow */ 95 RELOC_NUMBER (R_MIPS_PC21_S2, 60) 96 RELOC_NUMBER (R_MIPS_PC26_S2, 61) 97 RELOC_NUMBER (R_MIPS_PC18_S3, 62) 98 RELOC_NUMBER (R_MIPS_PC19_S2, 63) 99 RELOC_NUMBER (R_MIPS_PCHI16, 64) 100 RELOC_NUMBER (R_MIPS_PCLO16, 65) 101 FAKE_RELOC (R_MIPS_max, 66) 102 /* These relocs are used for the mips16. */ 103 FAKE_RELOC (R_MIPS16_min, 100) 104 RELOC_NUMBER (R_MIPS16_26, 100) 105 RELOC_NUMBER (R_MIPS16_GPREL, 101) 106 RELOC_NUMBER (R_MIPS16_GOT16, 102) 107 RELOC_NUMBER (R_MIPS16_CALL16, 103) 108 RELOC_NUMBER (R_MIPS16_HI16, 104) 109 RELOC_NUMBER (R_MIPS16_LO16, 105) 110 RELOC_NUMBER (R_MIPS16_TLS_GD, 106) 111 RELOC_NUMBER (R_MIPS16_TLS_LDM, 107) 112 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108) 113 RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109) 114 RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110) 115 RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111) 116 RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112) 117 RELOC_NUMBER (R_MIPS16_PC16_S1, 113) 118 FAKE_RELOC (R_MIPS16_max, 114) 119 /* These relocations are specific to VxWorks. */ 120 RELOC_NUMBER (R_MIPS_COPY, 126) 121 RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127) 122 123 /* These relocations are specific to microMIPS. */ 124 FAKE_RELOC (R_MICROMIPS_min, 130) 125 RELOC_NUMBER (R_MICROMIPS_26_S1, 133) 126 RELOC_NUMBER (R_MICROMIPS_HI16, 134) 127 RELOC_NUMBER (R_MICROMIPS_LO16, 135) 128 RELOC_NUMBER (R_MICROMIPS_GPREL16, 136) /* In Elf 64: 129 alias R_MICROMIPS_GPREL */ 130 RELOC_NUMBER (R_MICROMIPS_LITERAL, 137) 131 RELOC_NUMBER (R_MICROMIPS_GOT16, 138) /* In Elf 64: 132 alias R_MICROMIPS_GOT */ 133 RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139) 134 RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140) 135 RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141) 136 RELOC_NUMBER (R_MICROMIPS_CALL16, 142) /* In Elf 64: 137 alias R_MICROMIPS_CALL */ 138 RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145) 139 RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146) 140 RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147) 141 RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148) 142 RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149) 143 RELOC_NUMBER (R_MICROMIPS_SUB, 150) 144 RELOC_NUMBER (R_MICROMIPS_HIGHER, 151) 145 RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152) 146 RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153) 147 RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154) 148 RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155) 149 RELOC_NUMBER (R_MICROMIPS_JALR, 156) 150 RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157) 151 /* TLS relocations. */ 152 RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162) 153 RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163) 154 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164) 155 RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165) 156 RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166) 157 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169) 158 RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170) 159 /* microMIPS GP- and PC-relative relocations. */ 160 RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172) 161 RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173) 162 FAKE_RELOC (R_MICROMIPS_max, 174) 163 164 /* This was a GNU extension used by embedded-PIC. It was co-opted by 165 mips-linux for exception-handling data. GCC stopped using it in 166 May, 2004, then started using it again for compact unwind tables. */ 167 RELOC_NUMBER (R_MIPS_PC32, 248) 168 RELOC_NUMBER (R_MIPS_EH, 249) 169 /* FIXME: this relocation is used internally by gas. */ 170 RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250) 171 /* These are GNU extensions to enable C++ vtable garbage collection. */ 172 RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253) 173 RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254) 174 END_RELOC_NUMBERS (R_MIPS_maxext) 175 176 /* Processor specific flags for the ELF header e_flags field. */ 177 178 /* At least one .noreorder directive appears in the source. */ 179 #define EF_MIPS_NOREORDER 0x00000001 180 181 /* File contains position independent code. */ 182 #define EF_MIPS_PIC 0x00000002 183 184 /* Code in file uses the standard calling sequence for calling 185 position independent code. */ 186 #define EF_MIPS_CPIC 0x00000004 187 188 /* ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a. */ 189 #define EF_MIPS_XGOT 0x00000008 190 191 /* Code in file uses UCODE (obsolete) */ 192 #define EF_MIPS_UCODE 0x00000010 193 194 /* Code in file uses new ABI (-n32 on Irix 6). */ 195 #define EF_MIPS_ABI2 0x00000020 196 197 /* Process the .MIPS.options section first by ld */ 198 #define EF_MIPS_OPTIONS_FIRST 0x00000080 199 200 /* Indicates code compiled for a 64-bit machine in 32-bit mode 201 (regs are 32-bits wide). */ 202 #define EF_MIPS_32BITMODE 0x00000100 203 204 /* 32-bit machine but FP registers are 64 bit (-mfp64). */ 205 #define EF_MIPS_FP64 0x00000200 206 207 /* Code in file uses the IEEE 754-2008 NaN encoding convention. */ 208 #define EF_MIPS_NAN2008 0x00000400 209 210 /* Architectural Extensions used by this file */ 211 #define EF_MIPS_ARCH_ASE 0x0f000000 212 213 /* Use MDMX multimedia extensions */ 214 #define EF_MIPS_ARCH_ASE_MDMX 0x08000000 215 216 /* Use MIPS-16 ISA extensions */ 217 #define EF_MIPS_ARCH_ASE_M16 0x04000000 218 219 /* Use MICROMIPS ISA extensions. */ 220 #define EF_MIPS_ARCH_ASE_MICROMIPS 0x02000000 221 222 /* Four bit MIPS architecture field. */ 223 #define EF_MIPS_ARCH 0xf0000000 224 225 /* -mips1 code. */ 226 #define EF_MIPS_ARCH_1 0x00000000 227 228 /* -mips2 code. */ 229 #define EF_MIPS_ARCH_2 0x10000000 230 231 /* -mips3 code. */ 232 #define EF_MIPS_ARCH_3 0x20000000 233 234 /* -mips4 code. */ 235 #define EF_MIPS_ARCH_4 0x30000000 236 237 /* -mips5 code. */ 238 #define EF_MIPS_ARCH_5 0x40000000 239 240 /* -mips32 code. */ 241 #define EF_MIPS_ARCH_32 0x50000000 242 243 /* -mips64 code. */ 244 #define EF_MIPS_ARCH_64 0x60000000 245 246 /* -mips32r2 code. */ 247 #define EF_MIPS_ARCH_32R2 0x70000000 248 249 /* -mips64r2 code. */ 250 #define EF_MIPS_ARCH_64R2 0x80000000 251 252 /* -mips32r6 code. */ 253 #define EF_MIPS_ARCH_32R6 0x90000000 254 255 /* -mips64r6 code. */ 256 #define EF_MIPS_ARCH_64R6 0xa0000000 257 258 /* The ABI of the file. Also see EF_MIPS_ABI2 above. */ 259 #define EF_MIPS_ABI 0x0000F000 260 261 /* The original o32 abi. */ 262 #define EF_MIPS_ABI_O32 0x00001000 263 264 /* O32 extended to work on 64 bit architectures */ 265 #define EF_MIPS_ABI_O64 0x00002000 266 267 /* EABI in 32 bit mode */ 268 #define EF_MIPS_ABI_EABI32 0x00003000 269 270 /* EABI in 64 bit mode */ 271 #define EF_MIPS_ABI_EABI64 0x00004000 272 273 /* In order to support backwards compatibility we also 274 define the old versions of some of these constants. */ 275 #define E_MIPS_ARCH_1 EF_MIPS_ARCH_1 276 #define E_MIPS_ARCH_2 EF_MIPS_ARCH_2 277 #define E_MIPS_ARCH_3 EF_MIPS_ARCH_3 278 #define E_MIPS_ARCH_4 EF_MIPS_ARCH_4 279 #define E_MIPS_ARCH_5 EF_MIPS_ARCH_5 280 #define E_MIPS_ARCH_32 EF_MIPS_ARCH_32 281 #define E_MIPS_ARCH_64 EF_MIPS_ARCH_64 282 #define E_MIPS_ARCH_32R2 EF_MIPS_ARCH_32R2 283 #define E_MIPS_ARCH_64R2 EF_MIPS_ARCH_64R2 284 #define E_MIPS_ARCH_32R6 EF_MIPS_ARCH_32R6 285 #define E_MIPS_ARCH_64R6 EF_MIPS_ARCH_64R6 286 #define E_MIPS_ABI_O32 EF_MIPS_ABI_O32 287 #define E_MIPS_ABI_O64 EF_MIPS_ABI_O64 288 #define E_MIPS_ABI_EABI32 EF_MIPS_ABI_EABI32 289 #define E_MIPS_ABI_EABI64 EF_MIPS_ABI_EABI64 290 291 292 /* Machine variant if we know it. This field was invented at Cygnus, 293 but it is hoped that other vendors will adopt it. If some standard 294 is developed, this code should be changed to follow it. */ 295 296 #define EF_MIPS_MACH 0x00FF0000 297 298 /* Cygnus is choosing values between 80 and 9F; 299 00 - 7F should be left for a future standard; 300 the rest are open. */ 301 302 #define EF_MIPS_MACH_3900 0x00810000 303 #define EF_MIPS_MACH_4010 0x00820000 304 #define EF_MIPS_MACH_4100 0x00830000 305 #define EF_MIPS_MACH_ALLEGREX 0x00840000 306 #define EF_MIPS_MACH_4650 0x00850000 307 #define EF_MIPS_MACH_4120 0x00870000 308 #define EF_MIPS_MACH_4111 0x00880000 309 #define EF_MIPS_MACH_SB1 0x008a0000 310 #define EF_MIPS_MACH_OCTEON 0x008b0000 311 #define EF_MIPS_MACH_XLR 0x008c0000 312 #define EF_MIPS_MACH_OCTEON2 0x008d0000 313 #define EF_MIPS_MACH_OCTEON3 0x008e0000 314 #define EF_MIPS_MACH_5400 0x00910000 315 #define EF_MIPS_MACH_5900 0x00920000 316 #define EF_MIPS_MACH_IAMR2 0x00930000 317 #define EF_MIPS_MACH_5500 0x00980000 318 #define EF_MIPS_MACH_9000 0x00990000 319 #define EF_MIPS_MACH_LS2E 0x00A00000 320 #define EF_MIPS_MACH_LS2F 0x00A10000 321 #define EF_MIPS_MACH_GS464 0x00A20000 322 #define EF_MIPS_MACH_GS464E 0x00A30000 323 #define EF_MIPS_MACH_GS264E 0x00A40000 324 325 /* In order to support backwards compatibility we also 326 define the old versions of some of these constants. */ 327 #define E_MIPS_MACH_3900 EF_MIPS_MACH_3900 328 #define E_MIPS_MACH_4010 EF_MIPS_MACH_4010 329 #define E_MIPS_MACH_4100 EF_MIPS_MACH_4100 330 #define E_MIPS_MACH_ALLEGREX EF_MIPS_MACH_ALLEGREX 331 #define E_MIPS_MACH_4650 EF_MIPS_MACH_4650 332 #define E_MIPS_MACH_4120 EF_MIPS_MACH_4120 333 #define E_MIPS_MACH_4111 EF_MIPS_MACH_4111 334 #define E_MIPS_MACH_SB1 EF_MIPS_MACH_SB1 335 #define E_MIPS_MACH_OCTEON EF_MIPS_MACH_OCTEON 336 #define E_MIPS_MACH_XLR EF_MIPS_MACH_XLR 337 #define E_MIPS_MACH_OCTEON2 EF_MIPS_MACH_OCTEON2 338 #define E_MIPS_MACH_OCTEON3 EF_MIPS_MACH_OCTEON3 339 #define E_MIPS_MACH_5400 EF_MIPS_MACH_5400 340 #define E_MIPS_MACH_5900 EF_MIPS_MACH_5900 341 #define E_MIPS_MACH_IAMR2 EF_MIPS_MACH_IAMR2 342 #define E_MIPS_MACH_5500 EF_MIPS_MACH_5500 343 #define E_MIPS_MACH_9000 EF_MIPS_MACH_9000 344 #define E_MIPS_MACH_LS2E EF_MIPS_MACH_LS2E 345 #define E_MIPS_MACH_LS2F EF_MIPS_MACH_LS2F 346 #define E_MIPS_MACH_GS464 EF_MIPS_MACH_GS464 347 #define E_MIPS_MACH_GS464E EF_MIPS_MACH_GS464E 348 #define E_MIPS_MACH_GS264E EF_MIPS_MACH_GS264E 349 350 /* Processor specific section indices. These sections do not actually 351 exist. Symbols with a st_shndx field corresponding to one of these 352 values have a special meaning. */ 353 354 /* Defined and allocated common symbol. Value is virtual address. If 355 relocated, alignment must be preserved. */ 356 #define SHN_MIPS_ACOMMON SHN_LORESERVE 357 358 /* Defined and allocated text symbol. Value is virtual address. 359 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ 360 #define SHN_MIPS_TEXT (SHN_LORESERVE + 1) 361 362 /* Defined and allocated data symbol. Value is virtual address. 363 Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables. */ 364 #define SHN_MIPS_DATA (SHN_LORESERVE + 2) 365 366 /* Small common symbol. */ 367 #define SHN_MIPS_SCOMMON (SHN_LORESERVE + 3) 368 369 /* Small undefined symbol. */ 370 #define SHN_MIPS_SUNDEFINED (SHN_LORESERVE + 4) 371 372 /* Processor specific section types. */ 373 374 /* Section contains the set of dynamic shared objects used when 375 statically linking. */ 376 #define SHT_MIPS_LIBLIST 0x70000000 377 378 /* I'm not sure what this is, but it's used on Irix 5. */ 379 #define SHT_MIPS_MSYM 0x70000001 380 381 /* Section contains list of symbols whose definitions conflict with 382 symbols defined in shared objects. */ 383 #define SHT_MIPS_CONFLICT 0x70000002 384 385 /* Section contains the global pointer table. */ 386 #define SHT_MIPS_GPTAB 0x70000003 387 388 /* Section contains microcode information. The exact format is 389 unspecified. */ 390 #define SHT_MIPS_UCODE 0x70000004 391 392 /* Section contains some sort of debugging information. The exact 393 format is unspecified. It's probably ECOFF symbols. */ 394 #define SHT_MIPS_DEBUG 0x70000005 395 396 /* Section contains register usage information. */ 397 #define SHT_MIPS_REGINFO 0x70000006 398 399 /* ??? */ 400 #define SHT_MIPS_PACKAGE 0x70000007 401 402 /* ??? */ 403 #define SHT_MIPS_PACKSYM 0x70000008 404 405 /* ??? */ 406 #define SHT_MIPS_RELD 0x70000009 407 408 /* Section contains interface information. */ 409 #define SHT_MIPS_IFACE 0x7000000b 410 411 /* Section contains description of contents of another section. */ 412 #define SHT_MIPS_CONTENT 0x7000000c 413 414 /* Section contains miscellaneous options. */ 415 #define SHT_MIPS_OPTIONS 0x7000000d 416 417 /* ??? */ 418 #define SHT_MIPS_SHDR 0x70000010 419 420 /* ??? */ 421 #define SHT_MIPS_FDESC 0x70000011 422 423 /* ??? */ 424 #define SHT_MIPS_EXTSYM 0x70000012 425 426 /* ??? */ 427 #define SHT_MIPS_DENSE 0x70000013 428 429 /* ??? */ 430 #define SHT_MIPS_PDESC 0x70000014 431 432 /* ??? */ 433 #define SHT_MIPS_LOCSYM 0x70000015 434 435 /* ??? */ 436 #define SHT_MIPS_AUXSYM 0x70000016 437 438 /* ??? */ 439 #define SHT_MIPS_OPTSYM 0x70000017 440 441 /* ??? */ 442 #define SHT_MIPS_LOCSTR 0x70000018 443 444 /* ??? */ 445 #define SHT_MIPS_LINE 0x70000019 446 447 /* ??? */ 448 #define SHT_MIPS_RFDESC 0x7000001a 449 450 /* Delta C++: symbol table */ 451 #define SHT_MIPS_DELTASYM 0x7000001b 452 453 /* Delta C++: instance table */ 454 #define SHT_MIPS_DELTAINST 0x7000001c 455 456 /* Delta C++: class table */ 457 #define SHT_MIPS_DELTACLASS 0x7000001d 458 459 /* DWARF debugging section. */ 460 #define SHT_MIPS_DWARF 0x7000001e 461 462 /* Delta C++: declarations */ 463 #define SHT_MIPS_DELTADECL 0x7000001f 464 465 /* List of libraries the binary depends on. Includes a time stamp, version 466 number. */ 467 #define SHT_MIPS_SYMBOL_LIB 0x70000020 468 469 /* Events section. */ 470 #define SHT_MIPS_EVENTS 0x70000021 471 472 /* ??? */ 473 #define SHT_MIPS_TRANSLATE 0x70000022 474 475 /* Special pixie sections */ 476 #define SHT_MIPS_PIXIE 0x70000023 477 478 /* Address translation table (for debug info) */ 479 #define SHT_MIPS_XLATE 0x70000024 480 481 /* SGI internal address translation table (for debug info) */ 482 #define SHT_MIPS_XLATE_DEBUG 0x70000025 483 484 /* Intermediate code */ 485 #define SHT_MIPS_WHIRL 0x70000026 486 487 /* C++ exception handling region info */ 488 #define SHT_MIPS_EH_REGION 0x70000027 489 490 /* Obsolete address translation table (for debug info) */ 491 #define SHT_MIPS_XLATE_OLD 0x70000028 492 493 /* Runtime procedure descriptor table exception information (ucode) ??? */ 494 #define SHT_MIPS_PDR_EXCEPTION 0x70000029 495 496 /* ABI related flags section. */ 497 #define SHT_MIPS_ABIFLAGS 0x7000002a 498 499 /* GNU style symbol hash table with xlat. */ 500 #define SHT_MIPS_XHASH 0x7000002b 501 502 /* A section of type SHT_MIPS_LIBLIST contains an array of the 503 following structure. The sh_link field is the section index of the 504 string table. The sh_info field is the number of entries in the 505 section. */ 506 typedef struct 507 { 508 /* String table index for name of shared object. */ 509 unsigned long l_name; 510 /* Time stamp. */ 511 unsigned long l_time_stamp; 512 /* Checksum of symbol names and common sizes. */ 513 unsigned long l_checksum; 514 /* String table index for version. */ 515 unsigned long l_version; 516 /* Flags. */ 517 unsigned long l_flags; 518 } Elf32_Lib; 519 520 /* The external version of Elf32_Lib. */ 521 typedef struct 522 { 523 unsigned char l_name[4]; 524 unsigned char l_time_stamp[4]; 525 unsigned char l_checksum[4]; 526 unsigned char l_version[4]; 527 unsigned char l_flags[4]; 528 } Elf32_External_Lib; 529 530 /* The l_flags field of an Elf32_Lib structure may contain the 531 following flags. */ 532 533 /* Require an exact match at runtime. */ 534 #define LL_EXACT_MATCH 0x00000001 535 536 /* Ignore version incompatibilities at runtime. */ 537 #define LL_IGNORE_INT_VER 0x00000002 538 539 /* Require matching minor version number. */ 540 #define LL_REQUIRE_MINOR 0x00000004 541 542 /* ??? */ 543 #define LL_EXPORTS 0x00000008 544 545 /* Delay loading of this library until really needed. */ 546 #define LL_DELAY_LOAD 0x00000010 547 548 /* ??? Delta C++ stuff ??? */ 549 #define LL_DELTA 0x00000020 550 551 552 /* A section of type SHT_MIPS_CONFLICT is an array of indices into the 553 .dynsym section. Each element has the following type. */ 554 typedef unsigned long Elf32_Conflict; 555 typedef unsigned char Elf32_External_Conflict[4]; 556 557 typedef unsigned long Elf64_Conflict; 558 typedef unsigned char Elf64_External_Conflict[8]; 559 560 /* A section of type SHT_MIPS_GPTAB contains information about how 561 much GP space would be required for different -G arguments. This 562 information is only used so that the linker can provide informative 563 suggestions as to the best -G value to use. The sh_info field is 564 the index of the section for which this information applies. The 565 contents of the section are an array of the following union. The 566 first element uses the gt_header field. The remaining elements use 567 the gt_entry field. */ 568 typedef union 569 { 570 struct 571 { 572 /* -G value actually used for this object file. */ 573 unsigned long gt_current_g_value; 574 /* Unused. */ 575 unsigned long gt_unused; 576 } gt_header; 577 struct 578 { 579 /* If this -G argument has been used... */ 580 unsigned long gt_g_value; 581 /* ...this many GP section bytes would be required. */ 582 unsigned long gt_bytes; 583 } gt_entry; 584 } Elf32_gptab; 585 586 /* The external version of Elf32_gptab. */ 587 588 typedef union 589 { 590 struct 591 { 592 unsigned char gt_current_g_value[4]; 593 unsigned char gt_unused[4]; 594 } gt_header; 595 struct 596 { 597 unsigned char gt_g_value[4]; 598 unsigned char gt_bytes[4]; 599 } gt_entry; 600 } Elf32_External_gptab; 601 602 /* A section of type SHT_MIPS_REGINFO contains the following 603 structure. */ 604 typedef struct 605 { 606 /* Mask of general purpose registers used. */ 607 uint32_t ri_gprmask; 608 /* Mask of co-processor registers used. */ 609 uint32_t ri_cprmask[4]; 610 /* GP register value for this object file. */ 611 uint32_t ri_gp_value; 612 } Elf32_RegInfo; 613 614 /* The external version of the Elf_RegInfo structure. */ 615 typedef struct 616 { 617 unsigned char ri_gprmask[4]; 618 unsigned char ri_cprmask[4][4]; 619 unsigned char ri_gp_value[4]; 620 } Elf32_External_RegInfo; 621 622 /* MIPS ELF .reginfo swapping routines. */ 623 extern void bfd_mips_elf32_swap_reginfo_in 624 (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *); 625 extern void bfd_mips_elf32_swap_reginfo_out 626 (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *); 627 628 /* Processor specific section flags. */ 629 630 /* This section must be in the global data area. */ 631 #define SHF_MIPS_GPREL 0x10000000 632 633 /* This section should be merged. */ 634 #define SHF_MIPS_MERGE 0x20000000 635 636 /* This section contains address data of size implied by section 637 element size. */ 638 #define SHF_MIPS_ADDR 0x40000000 639 640 /* This section contains string data. */ 641 #define SHF_MIPS_STRING 0x80000000 642 643 /* This section may not be stripped. */ 644 #define SHF_MIPS_NOSTRIP 0x08000000 645 646 /* This section is local to threads. */ 647 #define SHF_MIPS_LOCAL 0x04000000 648 649 /* Linker should generate implicit weak names for this section. */ 650 #define SHF_MIPS_NAMES 0x02000000 651 652 /* Section contais text/data which may be replicated in other sections. 653 Linker should retain only one copy. */ 654 #define SHF_MIPS_NODUPES 0x01000000 655 656 /* Processor specific program header types. */ 657 658 /* Register usage information. Identifies one .reginfo section. */ 659 #define PT_MIPS_REGINFO 0x70000000 660 661 /* Runtime procedure table. */ 662 #define PT_MIPS_RTPROC 0x70000001 663 664 /* .MIPS.options section. */ 665 #define PT_MIPS_OPTIONS 0x70000002 666 667 /* Records ABI related flags. */ 668 #define PT_MIPS_ABIFLAGS 0x70000003 669 670 /* Processor specific dynamic array tags. */ 671 672 /* 32 bit version number for runtime linker interface. */ 673 #define DT_MIPS_RLD_VERSION 0x70000001 674 675 /* Time stamp. */ 676 #define DT_MIPS_TIME_STAMP 0x70000002 677 678 /* Checksum of external strings and common sizes. */ 679 #define DT_MIPS_ICHECKSUM 0x70000003 680 681 /* Index of version string in string table. */ 682 #define DT_MIPS_IVERSION 0x70000004 683 684 /* 32 bits of flags. */ 685 #define DT_MIPS_FLAGS 0x70000005 686 687 /* Base address of the segment. */ 688 #define DT_MIPS_BASE_ADDRESS 0x70000006 689 690 /* ??? */ 691 #define DT_MIPS_MSYM 0x70000007 692 693 /* Address of .conflict section. */ 694 #define DT_MIPS_CONFLICT 0x70000008 695 696 /* Address of .liblist section. */ 697 #define DT_MIPS_LIBLIST 0x70000009 698 699 /* Number of local global offset table entries. */ 700 #define DT_MIPS_LOCAL_GOTNO 0x7000000a 701 702 /* Number of entries in the .conflict section. */ 703 #define DT_MIPS_CONFLICTNO 0x7000000b 704 705 /* Number of entries in the .liblist section. */ 706 #define DT_MIPS_LIBLISTNO 0x70000010 707 708 /* Number of entries in the .dynsym section. */ 709 #define DT_MIPS_SYMTABNO 0x70000011 710 711 /* Index of first external dynamic symbol not referenced locally. */ 712 #define DT_MIPS_UNREFEXTNO 0x70000012 713 714 /* Index of first dynamic symbol in global offset table. */ 715 #define DT_MIPS_GOTSYM 0x70000013 716 717 /* Number of page table entries in global offset table. */ 718 #define DT_MIPS_HIPAGENO 0x70000014 719 720 /* Address of run time loader map, used for debugging. */ 721 #define DT_MIPS_RLD_MAP 0x70000016 722 723 /* Delta C++ class definition. */ 724 #define DT_MIPS_DELTA_CLASS 0x70000017 725 726 /* Number of entries in DT_MIPS_DELTA_CLASS. */ 727 #define DT_MIPS_DELTA_CLASS_NO 0x70000018 728 729 /* Delta C++ class instances. */ 730 #define DT_MIPS_DELTA_INSTANCE 0x70000019 731 732 /* Number of entries in DT_MIPS_DELTA_INSTANCE. */ 733 #define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a 734 735 /* Delta relocations. */ 736 #define DT_MIPS_DELTA_RELOC 0x7000001b 737 738 /* Number of entries in DT_MIPS_DELTA_RELOC. */ 739 #define DT_MIPS_DELTA_RELOC_NO 0x7000001c 740 741 /* Delta symbols that Delta relocations refer to. */ 742 #define DT_MIPS_DELTA_SYM 0x7000001d 743 744 /* Number of entries in DT_MIPS_DELTA_SYM. */ 745 #define DT_MIPS_DELTA_SYM_NO 0x7000001e 746 747 /* Delta symbols that hold class declarations. */ 748 #define DT_MIPS_DELTA_CLASSSYM 0x70000020 749 750 /* Number of entries in DT_MIPS_DELTA_CLASSSYM. */ 751 #define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 752 753 /* Flags indicating information about C++ flavor. */ 754 #define DT_MIPS_CXX_FLAGS 0x70000022 755 756 /* Pixie information (???). */ 757 #define DT_MIPS_PIXIE_INIT 0x70000023 758 759 /* Address of .MIPS.symlib */ 760 #define DT_MIPS_SYMBOL_LIB 0x70000024 761 762 /* The GOT index of the first PTE for a segment */ 763 #define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025 764 765 /* The GOT index of the first PTE for a local symbol */ 766 #define DT_MIPS_LOCAL_GOTIDX 0x70000026 767 768 /* The GOT index of the first PTE for a hidden symbol */ 769 #define DT_MIPS_HIDDEN_GOTIDX 0x70000027 770 771 /* The GOT index of the first PTE for a protected symbol */ 772 #define DT_MIPS_PROTECTED_GOTIDX 0x70000028 773 774 /* Address of `.MIPS.options'. */ 775 #define DT_MIPS_OPTIONS 0x70000029 776 777 /* Address of `.interface'. */ 778 #define DT_MIPS_INTERFACE 0x7000002a 779 780 /* ??? */ 781 #define DT_MIPS_DYNSTR_ALIGN 0x7000002b 782 783 /* Size of the .interface section. */ 784 #define DT_MIPS_INTERFACE_SIZE 0x7000002c 785 786 /* Size of rld_text_resolve function stored in the GOT. */ 787 #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d 788 789 /* Default suffix of DSO to be added by rld on dlopen() calls. */ 790 #define DT_MIPS_PERF_SUFFIX 0x7000002e 791 792 /* Size of compact relocation section (O32). */ 793 #define DT_MIPS_COMPACT_SIZE 0x7000002f 794 795 /* GP value for auxiliary GOTs. */ 796 #define DT_MIPS_GP_VALUE 0x70000030 797 798 /* Address of auxiliary .dynamic. */ 799 #define DT_MIPS_AUX_DYNAMIC 0x70000031 800 801 /* Address of the base of the PLTGOT. */ 802 #define DT_MIPS_PLTGOT 0x70000032 803 804 /* Points to the base of a writable PLT. */ 805 #define DT_MIPS_RWPLT 0x70000034 806 807 /* Relative offset of run time loader map, used for debugging. */ 808 #define DT_MIPS_RLD_MAP_REL 0x70000035 809 810 /* Address of .MIPS.xhash section. */ 811 #define DT_MIPS_XHASH 0x70000036 812 813 /* Flags which may appear in a DT_MIPS_FLAGS entry. */ 814 815 /* No flags. */ 816 #define RHF_NONE 0x00000000 817 818 /* Uses shortcut pointers. */ 819 #define RHF_QUICKSTART 0x00000001 820 821 /* Hash size is not a power of two. */ 822 #define RHF_NOTPOT 0x00000002 823 824 /* Ignore LD_LIBRARY_PATH. */ 825 #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004 826 827 /* DSO address may not be relocated. */ 828 #define RHF_NO_MOVE 0x00000008 829 830 /* SGI specific features. */ 831 #define RHF_SGI_ONLY 0x00000010 832 833 /* Guarantee that .init will finish executing before any non-init 834 code in DSO is called. */ 835 #define RHF_GUARANTEE_INIT 0x00000020 836 837 /* Contains Delta C++ code. */ 838 #define RHF_DELTA_C_PLUS_PLUS 0x00000040 839 840 /* Guarantee that .init will start executing before any non-init 841 code in DSO is called. */ 842 #define RHF_GUARANTEE_START_INIT 0x00000080 843 844 /* Generated by pixie. */ 845 #define RHF_PIXIE 0x00000100 846 847 /* Delay-load DSO by default. */ 848 #define RHF_DEFAULT_DELAY_LOAD 0x00000200 849 850 /* Object may be requickstarted */ 851 #define RHF_REQUICKSTART 0x00000400 852 853 /* Object has been requickstarted */ 854 #define RHF_REQUICKSTARTED 0x00000800 855 856 /* Generated by cord. */ 857 #define RHF_CORD 0x00001000 858 859 /* Object contains no unresolved undef symbols. */ 860 #define RHF_NO_UNRES_UNDEF 0x00002000 861 862 /* Symbol table is in a safe order. */ 863 #define RHF_RLD_ORDER_SAFE 0x00004000 864 865 /* Special values for the st_other field in the symbol table. These 866 are used in an Irix 5 dynamic symbol table. */ 867 868 #define STO_DEFAULT STV_DEFAULT 869 #define STO_INTERNAL STV_INTERNAL 870 #define STO_HIDDEN STV_HIDDEN 871 #define STO_PROTECTED STV_PROTECTED 872 873 /* Two topmost bits denote the MIPS ISA for .text symbols: 874 + 00 -- standard MIPS code, 875 + 10 -- microMIPS code, 876 + 11 -- MIPS16 code; requires the following two bits to be set too. 877 Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC. See below 878 for details. */ 879 #define STO_MIPS_ISA (3 << 6) 880 881 /* The mask spanning the rest of MIPS psABI flags. At most one is expected 882 to be set except for STO_MIPS16. */ 883 #define STO_MIPS_FLAGS (~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1))) 884 885 /* The MIPS psABI was updated in 2008 with support for PLTs and copy 886 relocs. There are therefore two types of nonzero SHN_UNDEF functions: 887 PLT entries and traditional MIPS lazy binding stubs. We mark the former 888 with STO_MIPS_PLT to distinguish them from the latter. */ 889 #define STO_MIPS_PLT 0x8 890 #define ELF_ST_IS_MIPS_PLT(other) \ 891 ((ELF_ST_IS_MIPS16 (other) \ 892 ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS)) \ 893 : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT) 894 #define ELF_ST_SET_MIPS_PLT(other) \ 895 ((ELF_ST_IS_MIPS16 (other) \ 896 ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS)) \ 897 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT) 898 899 /* This value is used to mark PIC functions in an object that mixes 900 PIC and non-PIC. Note that this bit overlaps with STO_MIPS16, 901 although MIPS16 symbols are never considered to be MIPS_PIC. */ 902 #define STO_MIPS_PIC 0x20 903 #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC) 904 #define ELF_ST_SET_MIPS_PIC(other) \ 905 ((ELF_ST_IS_MIPS16 (other) \ 906 ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS)) \ 907 : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC) 908 909 /* This value is used for a mips16 .text symbol. */ 910 #define STO_MIPS16 0xf0 911 #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16) 912 #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16) 913 914 /* This value is used for a microMIPS .text symbol. To distinguish from 915 STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The 916 mask is STO_MIPS_ISA. */ 917 #define STO_MICROMIPS (2 << 6) 918 #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS) 919 #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS) 920 921 /* Whether code compression (either of the MIPS16 or the microMIPS ASEs) 922 has been indicated for a .text symbol. */ 923 #define ELF_ST_IS_COMPRESSED(other) \ 924 (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other)) 925 926 /* This bit is used on Irix to indicate a symbol whose definition 927 is optional - if, at final link time, it cannot be found, no 928 error message should be produced. */ 929 #define STO_OPTIONAL (1 << 2) 930 /* A macro to examine the STO_OPTIONAL bit. */ 931 #define ELF_MIPS_IS_OPTIONAL(other) ((other) & STO_OPTIONAL) 932 933 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. Each 934 relocation entry specifies up to three actual relocations, all at 935 the same address. The first relocation which required a symbol 936 uses the symbol in the r_sym field. The second relocation which 937 requires a symbol uses the symbol in the r_ssym field. If all 938 three relocations require a symbol, the third one uses a zero 939 value. */ 940 941 /* An entry in a 64 bit SHT_REL section. */ 942 943 typedef struct 944 { 945 /* Address of relocation. */ 946 unsigned char r_offset[8]; 947 /* Symbol index. */ 948 unsigned char r_sym[4]; 949 /* Special symbol. */ 950 unsigned char r_ssym[1]; 951 /* Third relocation. */ 952 unsigned char r_type3[1]; 953 /* Second relocation. */ 954 unsigned char r_type2[1]; 955 /* First relocation. */ 956 unsigned char r_type[1]; 957 } Elf64_Mips_External_Rel; 958 959 typedef struct 960 { 961 /* Address of relocation. */ 962 bfd_vma r_offset; 963 /* Symbol index. */ 964 unsigned long r_sym; 965 /* Special symbol. */ 966 unsigned char r_ssym; 967 /* Third relocation. */ 968 unsigned char r_type3; 969 /* Second relocation. */ 970 unsigned char r_type2; 971 /* First relocation. */ 972 unsigned char r_type; 973 } Elf64_Mips_Internal_Rel; 974 975 /* An entry in a 64 bit SHT_RELA section. */ 976 977 typedef struct 978 { 979 /* Address of relocation. */ 980 unsigned char r_offset[8]; 981 /* Symbol index. */ 982 unsigned char r_sym[4]; 983 /* Special symbol. */ 984 unsigned char r_ssym[1]; 985 /* Third relocation. */ 986 unsigned char r_type3[1]; 987 /* Second relocation. */ 988 unsigned char r_type2[1]; 989 /* First relocation. */ 990 unsigned char r_type[1]; 991 /* Addend. */ 992 unsigned char r_addend[8]; 993 } Elf64_Mips_External_Rela; 994 995 typedef struct 996 { 997 /* Address of relocation. */ 998 bfd_vma r_offset; 999 /* Symbol index. */ 1000 unsigned long r_sym; 1001 /* Special symbol. */ 1002 unsigned char r_ssym; 1003 /* Third relocation. */ 1004 unsigned char r_type3; 1005 /* Second relocation. */ 1006 unsigned char r_type2; 1007 /* First relocation. */ 1008 unsigned char r_type; 1009 /* Addend. */ 1010 bfd_signed_vma r_addend; 1011 } Elf64_Mips_Internal_Rela; 1012 1013 /* MIPS ELF 64 relocation info access macros. */ 1014 #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff) 1015 #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff) 1016 #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff) 1017 #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff) 1018 1019 /* Values found in the r_ssym field of a relocation entry. */ 1020 1021 /* No relocation. */ 1022 #define RSS_UNDEF 0 1023 1024 /* Value of GP. */ 1025 #define RSS_GP 1 1026 1027 /* Value of GP in object being relocated. */ 1028 #define RSS_GP0 2 1029 1030 /* Address of location being relocated. */ 1031 #define RSS_LOC 3 1032 1033 /* A SHT_MIPS_OPTIONS section contains a series of options, each of 1034 which starts with this header. */ 1035 1036 typedef struct 1037 { 1038 /* Type of option. */ 1039 unsigned char kind[1]; 1040 /* Size of option descriptor, including header. */ 1041 unsigned char size[1]; 1042 /* Section index of affected section, or 0 for global option. */ 1043 unsigned char section[2]; 1044 /* Information specific to this kind of option. */ 1045 unsigned char info[4]; 1046 } Elf_External_Options; 1047 1048 typedef struct 1049 { 1050 /* Type of option. */ 1051 unsigned char kind; 1052 /* Size of option descriptor, including header. */ 1053 unsigned char size; 1054 /* Section index of affected section, or 0 for global option. */ 1055 uint16_t section; 1056 /* Information specific to this kind of option. */ 1057 uint32_t info; 1058 } Elf_Internal_Options; 1059 1060 /* MIPS ELF option header swapping routines. */ 1061 extern void bfd_mips_elf_swap_options_in 1062 (bfd *, const Elf_External_Options *, Elf_Internal_Options *); 1063 extern void bfd_mips_elf_swap_options_out 1064 (bfd *, const Elf_Internal_Options *, Elf_External_Options *); 1065 1066 /* Values which may appear in the kind field of an Elf_Options 1067 structure. */ 1068 1069 /* Undefined. */ 1070 #define ODK_NULL 0 1071 1072 /* Register usage and GP value. */ 1073 #define ODK_REGINFO 1 1074 1075 /* Exception processing information. */ 1076 #define ODK_EXCEPTIONS 2 1077 1078 /* Section padding information. */ 1079 #define ODK_PAD 3 1080 1081 /* Hardware workarounds performed. */ 1082 #define ODK_HWPATCH 4 1083 1084 /* Fill value used by the linker. */ 1085 #define ODK_FILL 5 1086 1087 /* Reserved space for desktop tools. */ 1088 #define ODK_TAGS 6 1089 1090 /* Hardware workarounds, AND bits when merging. */ 1091 #define ODK_HWAND 7 1092 1093 /* Hardware workarounds, OR bits when merging. */ 1094 #define ODK_HWOR 8 1095 1096 /* GP group to use for text/data sections. */ 1097 #define ODK_GP_GROUP 9 1098 1099 /* ID information. */ 1100 #define ODK_IDENT 10 1101 1102 /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo 1103 structure. In the 64 bit ABI, it is the following structure. The 1104 info field of the options header is not used. */ 1105 1106 typedef struct 1107 { 1108 /* Mask of general purpose registers used. */ 1109 unsigned char ri_gprmask[4]; 1110 /* Padding. */ 1111 unsigned char ri_pad[4]; 1112 /* Mask of co-processor registers used. */ 1113 unsigned char ri_cprmask[4][4]; 1114 /* GP register value for this object file. */ 1115 unsigned char ri_gp_value[8]; 1116 } Elf64_External_RegInfo; 1117 1118 typedef struct 1119 { 1120 /* Mask of general purpose registers used. */ 1121 uint32_t ri_gprmask; 1122 /* Padding. */ 1123 uint32_t ri_pad; 1124 /* Mask of co-processor registers used. */ 1125 uint32_t ri_cprmask[4]; 1126 /* GP register value for this object file. */ 1127 uint64_t ri_gp_value; 1128 } Elf64_Internal_RegInfo; 1129 1130 /* ABI Flags structure version 0. */ 1131 1132 typedef struct 1133 { 1134 /* Version of flags structure. */ 1135 unsigned char version[2]; 1136 /* The level of the ISA: 1-5, 32, 64. */ 1137 unsigned char isa_level[1]; 1138 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ 1139 unsigned char isa_rev[1]; 1140 /* The size of general purpose registers. */ 1141 unsigned char gpr_size[1]; 1142 /* The size of co-processor 1 registers. */ 1143 unsigned char cpr1_size[1]; 1144 /* The size of co-processor 2 registers. */ 1145 unsigned char cpr2_size[1]; 1146 /* The floating-point ABI. */ 1147 unsigned char fp_abi[1]; 1148 /* Processor-specific extension. */ 1149 unsigned char isa_ext[4]; 1150 /* Mask of ASEs used. */ 1151 unsigned char ases[4]; 1152 /* Mask of general flags. */ 1153 unsigned char flags1[4]; 1154 unsigned char flags2[4]; 1155 } Elf_External_ABIFlags_v0; 1156 1157 typedef struct elf_internal_abiflags_v0 1158 { 1159 /* Version of flags structure. */ 1160 unsigned short version; 1161 /* The level of the ISA: 1-5, 32, 64. */ 1162 unsigned char isa_level; 1163 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */ 1164 unsigned char isa_rev; 1165 /* The size of general purpose registers. */ 1166 unsigned char gpr_size; 1167 /* The size of co-processor 1 registers. */ 1168 unsigned char cpr1_size; 1169 /* The size of co-processor 2 registers. */ 1170 unsigned char cpr2_size; 1171 /* The floating-point ABI. */ 1172 unsigned char fp_abi; 1173 /* Processor-specific extension. */ 1174 unsigned long isa_ext; 1175 /* Mask of ASEs used. */ 1176 unsigned long ases; 1177 /* Mask of general flags. */ 1178 unsigned long flags1; 1179 unsigned long flags2; 1180 } Elf_Internal_ABIFlags_v0; 1181 1182 typedef struct 1183 { 1184 /* The hash value computed from the name of the corresponding 1185 dynamic symbol. */ 1186 unsigned char ms_hash_value[4]; 1187 /* Contains both the dynamic relocation index and the symbol flags 1188 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used 1189 to access the individual values. The dynamic relocation index 1190 identifies the first entry in the .rel.dyn section that 1191 references the dynamic symbol corresponding to this msym entry. 1192 If the index is 0, no dynamic relocations are associated with the 1193 symbol. The symbol flags field is reserved for future use. */ 1194 unsigned char ms_info[4]; 1195 } Elf32_External_Msym; 1196 1197 typedef struct 1198 { 1199 /* The hash value computed from the name of the corresponding 1200 dynamic symbol. */ 1201 unsigned long ms_hash_value; 1202 /* Contains both the dynamic relocation index and the symbol flags 1203 field. The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used 1204 to access the individual values. The dynamic relocation index 1205 identifies the first entry in the .rel.dyn section that 1206 references the dynamic symbol corresponding to this msym entry. 1207 If the index is 0, no dynamic relocations are associated with the 1208 symbol. The symbol flags field is reserved for future use. */ 1209 unsigned long ms_info; 1210 } Elf32_Internal_Msym; 1211 1212 #define ELF32_MS_REL_INDEX(i) ((i) >> 8) 1213 #define ELF32_MS_FLAGS(i) (i) & 0xff) 1214 #define ELF32_MS_INFO(r, f) (((r) << 8) + ((f) & 0xff)) 1215 1216 /* MIPS ELF reginfo swapping routines. */ 1217 extern void bfd_mips_elf64_swap_reginfo_in 1218 (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *); 1219 extern void bfd_mips_elf64_swap_reginfo_out 1220 (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *); 1221 1222 /* MIPS ELF flags swapping routines. */ 1223 extern void bfd_mips_elf_swap_abiflags_v0_in 1224 (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *); 1225 extern void bfd_mips_elf_swap_abiflags_v0_out 1226 (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *); 1227 1228 /* Masks for the info work of an ODK_EXCEPTIONS descriptor. */ 1229 #define OEX_FPU_MIN 0x1f /* FPEs which must be enabled. */ 1230 #define OEX_FPU_MAX 0x1f00 /* FPEs which may be enabled. */ 1231 #define OEX_PAGE0 0x10000 /* Page zero must be mapped. */ 1232 #define OEX_SMM 0x20000 /* Force sequential memory mode. */ 1233 #define OEX_FPDBUG 0x40000 /* Force precise floating-point 1234 exceptions (debug mode). */ 1235 #define OEX_DISMISS 0x80000 /* Dismiss invalid address faults. */ 1236 1237 /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX. */ 1238 #define OEX_FPU_INVAL 0x10 /* Invalid operation exception. */ 1239 #define OEX_FPU_DIV0 0x08 /* Division by zero exception. */ 1240 #define OEX_FPU_OFLO 0x04 /* Overflow exception. */ 1241 #define OEX_FPU_UFLO 0x02 /* Underflow exception. */ 1242 #define OEX_FPU_INEX 0x01 /* Inexact exception. */ 1243 1244 /* Masks for the info word of an ODK_PAD descriptor. */ 1245 #define OPAD_PREFIX 0x01 1246 #define OPAD_POSTFIX 0x02 1247 #define OPAD_SYMBOL 0x04 1248 1249 /* Masks for the info word of an ODK_HWPATCH descriptor. */ 1250 #define OHW_R4KEOP 0x00000001 /* R4000 end-of-page patch. */ 1251 #define OHW_R8KPFETCH 0x00000002 /* May need R8000 prefetch patch. */ 1252 #define OHW_R5KEOP 0x00000004 /* R5000 end-of-page patch. */ 1253 #define OHW_R5KCVTL 0x00000008 /* R5000 cvt.[ds].l bug 1254 (clean == 1). */ 1255 #define OHW_R10KLDL 0x00000010 /* Needs R10K misaligned 1256 load patch. */ 1257 1258 /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor. */ 1259 #define OGP_GROUP 0x0000ffff /* GP group number. */ 1260 #define OGP_SELF 0xffff0000 /* Self-contained GP groups. */ 1261 1262 /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor. */ 1263 #define OHWA0_R4KEOP_CHECKED 0x00000001 1264 #define OHWA0_R4KEOP_CLEAN 0x00000002 1265 1266 /* Values for the xxx_size bytes of an ABI flags structure. */ 1267 1268 #define AFL_REG_NONE 0x00 /* No registers. */ 1269 #define AFL_REG_32 0x01 /* 32-bit registers. */ 1270 #define AFL_REG_64 0x02 /* 64-bit registers. */ 1271 #define AFL_REG_128 0x03 /* 128-bit registers. */ 1272 1273 /* Masks for the ases word of an ABI flags structure. */ 1274 1275 #define AFL_ASE_DSP 0x00000001 /* DSP ASE. */ 1276 #define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */ 1277 #define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */ 1278 #define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */ 1279 #define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */ 1280 #define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */ 1281 #define AFL_ASE_MT 0x00000040 /* MT ASE. */ 1282 #define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */ 1283 #define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */ 1284 #define AFL_ASE_MSA 0x00000200 /* MSA ASE. */ 1285 #define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */ 1286 #define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */ 1287 #define AFL_ASE_XPA 0x00001000 /* XPA ASE. */ 1288 #define AFL_ASE_DSPR3 0x00002000 /* DSP R3 ASE. */ 1289 #define AFL_ASE_MIPS16E2 0x00004000 /* MIPS16e2 ASE. */ 1290 #define AFL_ASE_CRC 0x00008000 /* CRC ASE. */ 1291 #define AFL_ASE_RESERVED1 0x00010000 /* Reserved by MIPS Tech for WIP. */ 1292 #define AFL_ASE_GINV 0x00020000 /* GINV ASE. */ 1293 #define AFL_ASE_LOONGSON_MMI 0x00040000 /* Loongson MMI ASE. */ 1294 #define AFL_ASE_LOONGSON_CAM 0x00080000 /* Loongson CAM ASE. */ 1295 #define AFL_ASE_LOONGSON_EXT 0x00100000 /* Loongson EXT instructions. */ 1296 #define AFL_ASE_LOONGSON_EXT2 0x00200000 /* Loongson EXT2 instructions. */ 1297 #define AFL_ASE_MASK 0x003effff /* All ASEs. */ 1298 1299 /* Values for the isa_ext word of an ABI flags structure. */ 1300 1301 #define AFL_EXT_XLR 1 /* RMI Xlr instruction. */ 1302 #define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */ 1303 #define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */ 1304 #define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */ 1305 #define AFL_EXT_5900 6 /* MIPS R5900 instruction. */ 1306 #define AFL_EXT_4650 7 /* MIPS R4650 instruction. */ 1307 #define AFL_EXT_4010 8 /* LSI R4010 instruction. */ 1308 #define AFL_EXT_4100 9 /* NEC VR4100 instruction. */ 1309 #define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */ 1310 #define AFL_EXT_10000 11 /* MIPS R10000 instruction. */ 1311 #define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */ 1312 #define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */ 1313 #define AFL_EXT_4120 14 /* NEC VR4120 instruction. */ 1314 #define AFL_EXT_5400 15 /* NEC VR5400 instruction. */ 1315 #define AFL_EXT_5500 16 /* NEC VR5500 instruction. */ 1316 #define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */ 1317 #define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */ 1318 #define AFL_EXT_OCTEON3 19 /* Cavium Networks Octeon3. */ 1319 #define AFL_EXT_INTERAPTIV_MR2 20 /* Imagination interAptiv MR2. */ 1320 1321 /* Masks for the flags1 word of an ABI flags structure. */ 1322 #define AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */ 1323 1324 extern unsigned int bfd_mips_isa_ext (bfd *); 1325 1326 1327 /* Object attribute tags. */ 1328 enum 1329 { 1330 /* 0-3 are generic. */ 1331 1332 /* Floating-point ABI used by this object file. */ 1333 Tag_GNU_MIPS_ABI_FP = 4, 1334 1335 /* MSA ABI used by this object file. */ 1336 Tag_GNU_MIPS_ABI_MSA = 8, 1337 }; 1338 1339 /* Object attribute values. */ 1340 enum 1341 { 1342 /* Values defined for Tag_GNU_MIPS_ABI_FP. */ 1343 1344 /* Not tagged or not using any ABIs affected by the differences. */ 1345 Val_GNU_MIPS_ABI_FP_ANY = 0, 1346 1347 /* Using hard-float -mdouble-float. */ 1348 Val_GNU_MIPS_ABI_FP_DOUBLE = 1, 1349 1350 /* Using hard-float -msingle-float. */ 1351 Val_GNU_MIPS_ABI_FP_SINGLE = 2, 1352 1353 /* Using soft-float. */ 1354 Val_GNU_MIPS_ABI_FP_SOFT = 3, 1355 1356 /* Using -mips32r2 -mfp64. */ 1357 Val_GNU_MIPS_ABI_FP_OLD_64 = 4, 1358 1359 /* Using -mfpxx */ 1360 Val_GNU_MIPS_ABI_FP_XX = 5, 1361 1362 /* Using -mips32r2 -mfp64. */ 1363 Val_GNU_MIPS_ABI_FP_64 = 6, 1364 1365 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */ 1366 Val_GNU_MIPS_ABI_FP_64A = 7, 1367 1368 /* This is reserved for backward-compatibility with an earlier 1369 implementation of the MIPS NaN2008 functionality. */ 1370 Val_GNU_MIPS_ABI_FP_NAN2008 = 8, 1371 1372 /* Values defined for Tag_GNU_MIPS_ABI_MSA. */ 1373 1374 /* Not tagged or not using any ABIs affected by the differences. */ 1375 Val_GNU_MIPS_ABI_MSA_ANY = 0, 1376 1377 /* Using 128-bit MSA. */ 1378 Val_GNU_MIPS_ABI_MSA_128 = 1, 1379 }; 1380 1381 #ifdef __cplusplus 1382 } 1383 #endif 1384 1385 #endif /* _ELF_MIPS_H */ 1386