1 /* This file is part of the program psim. 2 3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. 17 18 */ 19 20 21 #ifndef _VM_H_ 22 #define _VM_H_ 23 24 typedef struct _vm vm; 25 typedef struct _vm_data_map vm_data_map; 26 typedef struct _vm_instruction_map vm_instruction_map; 27 28 29 /* each PowerPC requires two virtual memory maps */ 30 31 INLINE_VM\ 32 (vm *) vm_create 33 (core *memory); 34 35 INLINE_VM\ 36 (vm_data_map *) vm_create_data_map 37 (vm *memory); 38 39 INLINE_VM\ 40 (vm_instruction_map *) vm_create_instruction_map 41 (vm *memory); 42 43 44 /* address translation, if the translation is invalid 45 these will not return */ 46 47 INLINE_VM\ 48 (unsigned_word) vm_real_data_addr 49 (vm_data_map *data_map, 50 unsigned_word ea, 51 int is_read, 52 cpu *processor, 53 unsigned_word cia); 54 55 INLINE_VM\ 56 (unsigned_word) vm_real_instruction_addr 57 (vm_instruction_map *instruction_map, 58 cpu *processor, 59 unsigned_word cia); 60 61 62 /* generic block transfers. Dependant on the presence of the 63 PROCESSOR arg, either returns the number of bytes transfered or (if 64 PROCESSOR is non NULL) aborts the simulation */ 65 66 INLINE_VM\ 67 (int) vm_data_map_read_buffer 68 (vm_data_map *map, 69 void *target, 70 unsigned_word addr, 71 unsigned len, 72 cpu *processor, 73 unsigned_word cia); 74 75 INLINE_VM\ 76 (int) vm_data_map_write_buffer 77 (vm_data_map *map, 78 const void *source, 79 unsigned_word addr, 80 unsigned len, 81 int violate_read_only_section, 82 cpu *processor, 83 unsigned_word cia); 84 85 86 /* fetch the next instruction from memory */ 87 88 INLINE_VM\ 89 (instruction_word) vm_instruction_map_read 90 (vm_instruction_map *instruction_map, 91 cpu *processor, 92 unsigned_word cia); 93 94 95 /* read data from memory */ 96 97 #define DECLARE_VM_DATA_MAP_READ_N(N) \ 98 INLINE_VM\ 99 (unsigned_##N) vm_data_map_read_##N \ 100 (vm_data_map *map, \ 101 unsigned_word ea, \ 102 cpu *processor, \ 103 unsigned_word cia); 104 105 DECLARE_VM_DATA_MAP_READ_N(1) 106 DECLARE_VM_DATA_MAP_READ_N(2) 107 DECLARE_VM_DATA_MAP_READ_N(4) 108 DECLARE_VM_DATA_MAP_READ_N(8) 109 DECLARE_VM_DATA_MAP_READ_N(word) 110 111 112 /* write data to memory */ 113 114 #define DECLARE_VM_DATA_MAP_WRITE_N(N) \ 115 INLINE_VM\ 116 (void) vm_data_map_write_##N \ 117 (vm_data_map *map, \ 118 unsigned_word addr, \ 119 unsigned_##N val, \ 120 cpu *processor, \ 121 unsigned_word cia); 122 123 DECLARE_VM_DATA_MAP_WRITE_N(1) 124 DECLARE_VM_DATA_MAP_WRITE_N(2) 125 DECLARE_VM_DATA_MAP_WRITE_N(4) 126 DECLARE_VM_DATA_MAP_WRITE_N(8) 127 DECLARE_VM_DATA_MAP_WRITE_N(word) 128 129 130 /* update vm data structures due to a synchronization point */ 131 132 INLINE_VM\ 133 (void) vm_synchronize_context 134 (vm *memory, 135 spreg *sprs, 136 sreg *srs, 137 msreg msr, 138 /**/ 139 cpu *processor, 140 unsigned_word cia); 141 142 143 /* update vm data structures due to a TLB operation */ 144 145 INLINE_VM\ 146 (void) vm_page_tlb_invalidate_entry 147 (vm *memory, 148 unsigned_word ea); 149 150 INLINE_VM\ 151 (void) vm_page_tlb_invalidate_all 152 (vm *memory); 153 154 #endif 155