1 /* This file is part of the program psim. 2 3 Copyright 1994, 1995, 1996, 1997, 2003 Andrew Cagney 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, see <http://www.gnu.org/licenses/>. 17 18 */ 19 20 #include "ansidecl.h" 21 22 /* Additional, and optional expressions. */ 23 #ifdef WITH_ALTIVEC 24 #include "altivec_expression.h" 25 #endif 26 #ifdef WITH_E500 27 #include "e500_expression.h" 28 #endif 29 30 /* 32bit target expressions: 31 32 Each calculation is performed three times using each of the 33 int64_t, uint64_t and long integer types. The macro ALU_END 34 (in _ALU_RESULT_VAL) then selects which of the three alternative 35 results will be used in the final assignment of the target 36 register. As this selection is determined at compile time by 37 fields in the instruction (OE, EA, Rc) the compiler has sufficient 38 information to firstly simplify the selection code into a single 39 case and then back anotate the equations and hence eliminate any 40 resulting dead code. That dead code being the calculations that, 41 as it turned out were not in the end needed. 42 43 64bit arrithemetic is used firstly because it allows the use of 44 gcc's efficient long long operators (typically efficiently output 45 inline) and secondly because the resultant answer will contain in 46 the low 32bits the answer while in the high 32bits is either carry 47 or status information. */ 48 49 /* 64bit target expressions: 50 51 Unfortunatly 128bit arrithemetic isn't that common. Consequently 52 the 32/64 bit trick can not be used. Instead all calculations are 53 required to retain carry/overflow information in separate 54 variables. Even with this restriction it is still possible for the 55 trick of letting the compiler discard the calculation of unneeded 56 values */ 57 58 59 /* Macro's to type cast 32bit constants to 64bits */ 60 #define SIGNED64(val) ((int64_t)(int32_t)(val)) 61 #define UNSIGNED64(val) ((uint64_t)(uint32_t)(val)) 62 63 64 /* Start a section of ALU code */ 65 66 #define ALU_BEGIN(val) \ 67 { \ 68 signed_word alu_val; \ 69 uint64_t alu_carry_val; \ 70 int64_t alu_overflow_val; \ 71 ALU_SET(val) 72 73 74 /* assign the result to the target register */ 75 76 #define ALU_END(TARG,CA,OE,Rc) \ 77 { /* select the result to use */ \ 78 signed_word const alu_result = _ALU_RESULT_VAL(CA,OE,Rc); \ 79 /* determine the overflow bit if needed */ \ 80 if (OE) { \ 81 if ((((uint64_t)(alu_overflow_val & BIT64(0))) \ 82 >> 32) \ 83 == (alu_overflow_val & BIT64(32))) \ 84 XER &= (~xer_overflow); \ 85 else \ 86 XER |= (xer_summary_overflow | xer_overflow); \ 87 } \ 88 /* Update the carry bit if needed */ \ 89 if (CA) { \ 90 XER = ((XER & ~xer_carry) \ 91 | SHUFFLED32((alu_carry_val >> 32), 31, xer_carry_bit)); \ 92 /* if (alu_carry_val & BIT64(31)) \ 93 XER |= (xer_carry); \ 94 else \ 95 XER &= (~xer_carry); */ \ 96 } \ 97 TRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", \ 98 (long)alu_result, (long)alu_result, (long)XER)); \ 99 /* Update the Result Conditions if needed */ \ 100 CR0_COMPARE(alu_result, 0, Rc); \ 101 /* assign targ same */ \ 102 TARG = alu_result; \ 103 }} 104 105 /* select the result from the different options */ 106 107 #define _ALU_RESULT_VAL(CA,OE,Rc) (WITH_TARGET_WORD_BITSIZE == 64 \ 108 ? alu_val \ 109 : (OE \ 110 ? alu_overflow_val \ 111 : (CA \ 112 ? alu_carry_val \ 113 : alu_val))) 114 115 116 /* More basic alu operations */ 117 #if (WITH_TARGET_WORD_BITSIZE == 64) 118 #define ALU_SET(val) \ 119 do { \ 120 alu_val = val; \ 121 alu_carry_val = ((uint64_t)alu_val) >> 32; \ 122 alu_overflow_val = ((int64_t)alu_val) >> 32; \ 123 } while (0) 124 #endif 125 #if (WITH_TARGET_WORD_BITSIZE == 32) 126 #define ALU_SET(val) \ 127 do { \ 128 alu_val = val; \ 129 alu_carry_val = (uint32_t)(alu_val); \ 130 alu_overflow_val = (int32_t)(alu_val); \ 131 } while (0) 132 #endif 133 134 #if (WITH_TARGET_WORD_BITSIZE == 64) 135 #define ALU_ADD(val) \ 136 do { \ 137 uint64_t alu_lo = (UNSIGNED64(alu_val) \ 138 + UNSIGNED64(val)); \ 139 signed alu_carry = ((alu_lo & BIT(31)) != 0); \ 140 alu_carry_val = (alu_carry_val \ 141 + UNSIGNED64(EXTRACTED(val, 0, 31)) \ 142 + alu_carry); \ 143 alu_overflow_val = (alu_overflow_val \ 144 + SIGNED64(EXTRACTED(val, 0, 31)) \ 145 + alu_carry); \ 146 alu_val = alu_val + val; \ 147 } while (0) 148 #endif 149 #if (WITH_TARGET_WORD_BITSIZE == 32) 150 #define ALU_ADD(val) \ 151 do { \ 152 alu_val += val; \ 153 alu_carry_val += (uint32_t)(val); \ 154 alu_overflow_val += (int32_t)(val); \ 155 } while (0) 156 #endif 157 158 159 #if (WITH_TARGET_WORD_BITSIZE == 64) 160 #define ALU_ADD_CA \ 161 do { \ 162 signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \ 163 ALU_ADD(carry); \ 164 } while (0) 165 #endif 166 #if (WITH_TARGET_WORD_BITSIZE == 32) 167 #define ALU_ADD_CA \ 168 do { \ 169 signed carry = MASKED32(XER, xer_carry_bit, xer_carry_bit) != 0; \ 170 ALU_ADD(carry); \ 171 } while (0) 172 #endif 173 174 175 #if 0 176 #if (WITH_TARGET_WORD_BITSIZE == 64) 177 #endif 178 #if (WITH_TARGET_WORD_BITSIZE == 32) 179 #define ALU_SUB(val) \ 180 do { \ 181 alu_val -= val; \ 182 alu_carry_val -= (uint32_t)(val); \ 183 alu_overflow_val -= (int32_t)(val); \ 184 } while (0) 185 #endif 186 #endif 187 188 #if (WITH_TARGET_WORD_BITSIZE == 64) 189 #endif 190 #if (WITH_TARGET_WORD_BITSIZE == 32) 191 #define ALU_OR(val) \ 192 do { \ 193 alu_val |= val; \ 194 alu_carry_val = (uint32_t)(alu_val); \ 195 alu_overflow_val = (int32_t)(alu_val); \ 196 } while (0) 197 #endif 198 199 200 #if (WITH_TARGET_WORD_BITSIZE == 64) 201 #endif 202 #if (WITH_TARGET_WORD_BITSIZE == 32) 203 #define ALU_XOR(val) \ 204 do { \ 205 alu_val ^= val; \ 206 alu_carry_val = (uint32_t)(alu_val); \ 207 alu_overflow_val = (int32_t)(alu_val); \ 208 } while (0) 209 #endif 210 211 212 #if 0 213 #if (WITH_TARGET_WORD_BITSIZE == 64) 214 #endif 215 #if (WITH_TARGET_WORD_BITSIZE == 32) 216 #define ALU_NEGATE \ 217 do { \ 218 alu_val = -alu_val; \ 219 alu_carry_val = -alu_carry_val; \ 220 alu_overflow_val = -alu_overflow_val; \ 221 } while(0) 222 #endif 223 #endif 224 225 226 #if (WITH_TARGET_WORD_BITSIZE == 64) 227 #endif 228 #if (WITH_TARGET_WORD_BITSIZE == 32) 229 #define ALU_AND(val) \ 230 do { \ 231 alu_val &= val; \ 232 alu_carry_val = (uint32_t)(alu_val); \ 233 alu_overflow_val = (int32_t)(alu_val); \ 234 } while (0) 235 #endif 236 237 238 #if (WITH_TARGET_WORD_BITSIZE == 64) 239 #define ALU_NOT \ 240 do { \ 241 int64_t new_alu_val = ~alu_val; \ 242 ALU_SET(new_alu_val); \ 243 } while (0) 244 #endif 245 #if (WITH_TARGET_WORD_BITSIZE == 32) 246 #define ALU_NOT \ 247 do { \ 248 signed new_alu_val = ~alu_val; \ 249 ALU_SET(new_alu_val); \ 250 } while(0) 251 #endif 252 253 254 /* Macros for updating the condition register */ 255 256 #define CR1_UPDATE(Rc) \ 257 do { \ 258 if (Rc) { \ 259 CR_SET(1, EXTRACTED32(FPSCR, fpscr_fx_bit, fpscr_ox_bit)); \ 260 } \ 261 } while (0) 262 263 264 #define _DO_CR_COMPARE(LHS, RHS) \ 265 (((LHS) < (RHS)) \ 266 ? cr_i_negative \ 267 : (((LHS) > (RHS)) \ 268 ? cr_i_positive \ 269 : cr_i_zero)) 270 271 #define CR_SET(REG, VAL) MBLIT32(CR, REG*4, REG*4+3, VAL) 272 #define CR_FIELD(REG) EXTRACTED32(CR, REG*4, REG*4+3) 273 #define CR_SET_XER_SO(REG, VAL) \ 274 do { \ 275 creg new_bits = ((XER & xer_summary_overflow) \ 276 ? (cr_i_summary_overflow | VAL) \ 277 : VAL); \ 278 CR_SET(REG, new_bits); \ 279 } while(0) 280 281 #define CR_COMPARE(REG, LHS, RHS) \ 282 do { \ 283 creg new_bits = ((XER & xer_summary_overflow) \ 284 ? (cr_i_summary_overflow | _DO_CR_COMPARE(LHS,RHS)) \ 285 : _DO_CR_COMPARE(LHS,RHS)); \ 286 CR_SET(REG, new_bits); \ 287 } while (0) 288 289 #define CR0_COMPARE(LHS, RHS, Rc) \ 290 do { \ 291 if (Rc) { \ 292 CR_COMPARE(0, LHS, RHS); \ 293 TRACE(trace_alu, \ 294 ("CR=0x%08lx, LHS=%ld, RHS=%ld\n", \ 295 (unsigned long)CR, (long)LHS, (long)RHS)); \ 296 } \ 297 } while (0) 298 299 300 301 /* Bring data in from the cold */ 302 303 #define MEM(SIGN, EA, NR_BYTES) \ 304 ((SIGN##_##NR_BYTES) vm_data_map_read_##NR_BYTES(cpu_data_map(processor), EA, \ 305 processor, cia)) \ 306 307 #define STORE(EA, NR_BYTES, VAL) \ 308 do { \ 309 vm_data_map_write_##NR_BYTES(cpu_data_map(processor), EA, VAL, \ 310 processor, cia); \ 311 } while (0) 312 313 314 315 /* some FPSCR update macros. */ 316 317 #define FPSCR_BEGIN \ 318 { \ 319 fpscreg old_fpscr ATTRIBUTE_UNUSED = FPSCR 320 321 #define FPSCR_END(Rc) { \ 322 /* always update VX */ \ 323 if ((FPSCR & fpscr_vx_bits)) \ 324 FPSCR |= fpscr_vx; \ 325 else \ 326 FPSCR &= ~fpscr_vx; \ 327 /* always update FEX */ \ 328 if (((FPSCR & fpscr_vx) && (FPSCR & fpscr_ve)) \ 329 || ((FPSCR & fpscr_ox) && (FPSCR & fpscr_oe)) \ 330 || ((FPSCR & fpscr_ux) && (FPSCR & fpscr_ue)) \ 331 || ((FPSCR & fpscr_zx) && (FPSCR & fpscr_ze)) \ 332 || ((FPSCR & fpscr_xx) && (FPSCR & fpscr_xe))) \ 333 FPSCR |= fpscr_fex; \ 334 else \ 335 FPSCR &= ~fpscr_fex; \ 336 CR1_UPDATE(Rc); \ 337 /* interrupt enabled? */ \ 338 if ((MSR & (msr_floating_point_exception_mode_0 \ 339 | msr_floating_point_exception_mode_1)) \ 340 && (FPSCR & fpscr_fex)) \ 341 program_interrupt(processor, cia, \ 342 floating_point_enabled_program_interrupt); \ 343 }} 344 345 #define FPSCR_SET(REG, VAL) MBLIT32(FPSCR, REG*4, REG*4+3, VAL) 346 #define FPSCR_FIELD(REG) EXTRACTED32(FPSCR, REG*4, REG*4+3) 347 348 #define FPSCR_SET_FPCC(VAL) MBLIT32(FPSCR, fpscr_fpcc_bit, fpscr_fpcc_bit+3, VAL) 349 350 /* Handle various exceptions */ 351 352 #define FPSCR_OR_VX(VAL) \ 353 do { \ 354 /* NOTE: VAL != 0 */ \ 355 FPSCR |= (VAL); \ 356 FPSCR |= fpscr_fx; \ 357 } while (0) 358 359 #define FPSCR_SET_OX(COND) \ 360 do { \ 361 if (COND) { \ 362 FPSCR |= fpscr_ox; \ 363 FPSCR |= fpscr_fx; \ 364 } \ 365 else \ 366 FPSCR &= ~fpscr_ox; \ 367 } while (0) 368 369 #define FPSCR_SET_UX(COND) \ 370 do { \ 371 if (COND) { \ 372 FPSCR |= fpscr_ux; \ 373 FPSCR |= fpscr_fx; \ 374 } \ 375 else \ 376 FPSCR &= ~fpscr_ux; \ 377 } while (0) 378 379 #define FPSCR_SET_ZX(COND) \ 380 do { \ 381 if (COND) { \ 382 FPSCR |= fpscr_zx; \ 383 FPSCR |= fpscr_fx; \ 384 } \ 385 else \ 386 FPSCR &= ~fpscr_zx; \ 387 } while (0) 388 389 #define FPSCR_SET_XX(COND) \ 390 do { \ 391 if (COND) { \ 392 FPSCR |= fpscr_xx; \ 393 FPSCR |= fpscr_fx; \ 394 } \ 395 } while (0) 396 397 /* Note: code using SET_FI must also explicitly call SET_XX */ 398 399 #define FPSCR_SET_FR(COND) do { \ 400 if (COND) \ 401 FPSCR |= fpscr_fr; \ 402 else \ 403 FPSCR &= ~fpscr_fr; \ 404 } while (0) 405 406 #define FPSCR_SET_FI(COND) \ 407 do { \ 408 if (COND) { \ 409 FPSCR |= fpscr_fi; \ 410 } \ 411 else \ 412 FPSCR &= ~fpscr_fi; \ 413 } while (0) 414 415 #define FPSCR_SET_FPRF(VAL) \ 416 do { \ 417 FPSCR = (FPSCR & ~fpscr_fprf) | (VAL); \ 418 } while (0) 419