1 /* Disassembler code for CRIS. 2 Copyright (C) 2000-2022 Free Software Foundation, Inc. 3 Contributed by Axis Communications AB, Lund, Sweden. 4 Written by Hans-Peter Nilsson. 5 6 This file is part of the GNU opcodes library. 7 8 This library is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 It is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "sysdep.h" 24 #include "dis-asm.h" 25 #include "opcode/cris.h" 26 #include "libiberty.h" 27 28 /* No instruction will be disassembled longer than this. In theory, and 29 in silicon, address prefixes can be cascaded. In practice, cascading 30 is not used by GCC, and not supported by the assembler. */ 31 #ifndef MAX_BYTES_PER_CRIS_INSN 32 #define MAX_BYTES_PER_CRIS_INSN 8 33 #endif 34 35 /* Whether or not to decode prefixes, folding it into the following 36 instruction. FIXME: Make this optional later. */ 37 #ifndef PARSE_PREFIX 38 #define PARSE_PREFIX 1 39 #endif 40 41 /* Sometimes we prefix all registers with this character. */ 42 #define REGISTER_PREFIX_CHAR '$' 43 44 /* Whether or not to trace the following sequence: 45 sub* X,r%d 46 bound* Y,r%d 47 adds.w [pc+r%d.w],pc 48 49 This is the assembly form of a switch-statement in C. 50 The "sub is optional. If there is none, then X will be zero. 51 X is the value of the first case, 52 Y is the number of cases (including default). 53 54 This results in case offsets printed on the form: 55 case N: -> case_address 56 where N is an estimation on the corresponding 'case' operand in C, 57 and case_address is where execution of that case continues after the 58 sequence presented above. 59 60 The old style of output was to print the offsets as instructions, 61 which made it hard to follow "case"-constructs in the disassembly, 62 and caused a lot of annoying warnings about undefined instructions. 63 64 FIXME: Make this optional later. */ 65 #ifndef TRACE_CASE 66 #define TRACE_CASE (disdata->trace_case) 67 #endif 68 69 enum cris_disass_family 70 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 }; 71 72 /* Stored in the disasm_info->private_data member. */ 73 struct cris_disasm_data 74 { 75 /* Whether to print something less confusing if we find something 76 matching a switch-construct. */ 77 bool trace_case; 78 79 /* Whether this code is flagged as crisv32. FIXME: Should be an enum 80 that includes "compatible". */ 81 enum cris_disass_family distype; 82 }; 83 84 /* Value of first element in switch. */ 85 static long case_offset = 0; 86 87 /* How many more case-offsets to print. */ 88 static long case_offset_counter = 0; 89 90 /* Number of case offsets. */ 91 static long no_of_case_offsets = 0; 92 93 /* Candidate for next case_offset. */ 94 static long last_immediate = 0; 95 96 static int cris_constraint 97 (const char *, unsigned, unsigned, struct cris_disasm_data *); 98 99 /* Parse disassembler options and store state in info. FIXME: For the 100 time being, we abuse static variables. */ 101 102 static bool 103 cris_parse_disassembler_options (disassemble_info *info, 104 enum cris_disass_family distype) 105 { 106 struct cris_disasm_data *disdata; 107 108 info->private_data = calloc (1, sizeof (struct cris_disasm_data)); 109 disdata = (struct cris_disasm_data *) info->private_data; 110 if (disdata == NULL) 111 return false; 112 113 /* Default true. */ 114 disdata->trace_case 115 = (info->disassembler_options == NULL 116 || (strcmp (info->disassembler_options, "nocase") != 0)); 117 118 disdata->distype = distype; 119 return true; 120 } 121 122 static const struct cris_spec_reg * 123 spec_reg_info (unsigned int sreg, enum cris_disass_family distype) 124 { 125 int i; 126 127 for (i = 0; cris_spec_regs[i].name != NULL; i++) 128 { 129 if (cris_spec_regs[i].number == sreg) 130 { 131 if (distype == cris_dis_v32) 132 switch (cris_spec_regs[i].applicable_version) 133 { 134 case cris_ver_warning: 135 case cris_ver_version_all: 136 case cris_ver_v3p: 137 case cris_ver_v8p: 138 case cris_ver_v10p: 139 case cris_ver_v32p: 140 /* No ambiguous sizes or register names with CRISv32. */ 141 if (cris_spec_regs[i].warning == NULL) 142 return &cris_spec_regs[i]; 143 default: 144 ; 145 } 146 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p) 147 return &cris_spec_regs[i]; 148 } 149 } 150 151 return NULL; 152 } 153 154 /* Return the number of bits in the argument. */ 155 156 static int 157 number_of_bits (unsigned int val) 158 { 159 int bits; 160 161 for (bits = 0; val != 0; val &= val - 1) 162 bits++; 163 164 return bits; 165 } 166 167 /* Get an entry in the opcode-table. */ 168 169 static const struct cris_opcode * 170 get_opcode_entry (unsigned int insn, 171 unsigned int prefix_insn, 172 struct cris_disasm_data *disdata) 173 { 174 /* For non-prefixed insns, we keep a table of pointers, indexed by the 175 insn code. Each entry is initialized when found to be NULL. */ 176 static const struct cris_opcode **opc_table = NULL; 177 178 const struct cris_opcode *max_matchedp = NULL; 179 const struct cris_opcode **prefix_opc_table = NULL; 180 181 /* We hold a table for each prefix that need to be handled differently. */ 182 static const struct cris_opcode **dip_prefixes = NULL; 183 static const struct cris_opcode **bdapq_m1_prefixes = NULL; 184 static const struct cris_opcode **bdapq_m2_prefixes = NULL; 185 static const struct cris_opcode **bdapq_m4_prefixes = NULL; 186 static const struct cris_opcode **rest_prefixes = NULL; 187 188 /* Allocate and clear the opcode-table. */ 189 if (opc_table == NULL) 190 { 191 opc_table = malloc (65536 * sizeof (opc_table[0])); 192 if (opc_table == NULL) 193 return NULL; 194 195 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *)); 196 197 dip_prefixes 198 = malloc (65536 * sizeof (const struct cris_opcode **)); 199 if (dip_prefixes == NULL) 200 return NULL; 201 202 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0])); 203 204 bdapq_m1_prefixes 205 = malloc (65536 * sizeof (const struct cris_opcode **)); 206 if (bdapq_m1_prefixes == NULL) 207 return NULL; 208 209 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0])); 210 211 bdapq_m2_prefixes 212 = malloc (65536 * sizeof (const struct cris_opcode **)); 213 if (bdapq_m2_prefixes == NULL) 214 return NULL; 215 216 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0])); 217 218 bdapq_m4_prefixes 219 = malloc (65536 * sizeof (const struct cris_opcode **)); 220 if (bdapq_m4_prefixes == NULL) 221 return NULL; 222 223 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0])); 224 225 rest_prefixes 226 = malloc (65536 * sizeof (const struct cris_opcode **)); 227 if (rest_prefixes == NULL) 228 return NULL; 229 230 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0])); 231 } 232 233 /* Get the right table if this is a prefix. 234 This code is connected to cris_constraints in that it knows what 235 prefixes play a role in recognition of patterns; the necessary 236 state is reflected by which table is used. If constraints 237 involving match or non-match of prefix insns are changed, then this 238 probably needs changing too. */ 239 if (prefix_insn != NO_CRIS_PREFIX) 240 { 241 const struct cris_opcode *popcodep 242 = (opc_table[prefix_insn] != NULL 243 ? opc_table[prefix_insn] 244 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata)); 245 246 if (popcodep == NULL) 247 return NULL; 248 249 if (popcodep->match == BDAP_QUICK_OPCODE) 250 { 251 /* Since some offsets are recognized with "push" macros, we 252 have to have different tables for them. */ 253 int offset = (prefix_insn & 255); 254 255 if (offset > 127) 256 offset -= 256; 257 258 switch (offset) 259 { 260 case -4: 261 prefix_opc_table = bdapq_m4_prefixes; 262 break; 263 264 case -2: 265 prefix_opc_table = bdapq_m2_prefixes; 266 break; 267 268 case -1: 269 prefix_opc_table = bdapq_m1_prefixes; 270 break; 271 272 default: 273 prefix_opc_table = rest_prefixes; 274 break; 275 } 276 } 277 else if (popcodep->match == DIP_OPCODE) 278 /* We don't allow postincrement when the prefix is DIP, so use a 279 different table for DIP. */ 280 prefix_opc_table = dip_prefixes; 281 else 282 prefix_opc_table = rest_prefixes; 283 } 284 285 if (prefix_insn != NO_CRIS_PREFIX 286 && prefix_opc_table[insn] != NULL) 287 max_matchedp = prefix_opc_table[insn]; 288 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL) 289 max_matchedp = opc_table[insn]; 290 else 291 { 292 const struct cris_opcode *opcodep; 293 int max_level_of_match = -1; 294 295 for (opcodep = cris_opcodes; 296 opcodep->name != NULL; 297 opcodep++) 298 { 299 int level_of_match; 300 301 if (disdata->distype == cris_dis_v32) 302 { 303 switch (opcodep->applicable_version) 304 { 305 case cris_ver_version_all: 306 break; 307 308 case cris_ver_v0_3: 309 case cris_ver_v0_10: 310 case cris_ver_v3_10: 311 case cris_ver_sim_v0_10: 312 case cris_ver_v8_10: 313 case cris_ver_v10: 314 case cris_ver_warning: 315 continue; 316 317 case cris_ver_v3p: 318 case cris_ver_v8p: 319 case cris_ver_v10p: 320 case cris_ver_v32p: 321 break; 322 323 case cris_ver_v8: 324 abort (); 325 default: 326 abort (); 327 } 328 } 329 else 330 { 331 switch (opcodep->applicable_version) 332 { 333 case cris_ver_version_all: 334 case cris_ver_v0_3: 335 case cris_ver_v3p: 336 case cris_ver_v0_10: 337 case cris_ver_v8p: 338 case cris_ver_v8_10: 339 case cris_ver_v10: 340 case cris_ver_sim_v0_10: 341 case cris_ver_v10p: 342 case cris_ver_warning: 343 break; 344 345 case cris_ver_v32p: 346 continue; 347 348 case cris_ver_v8: 349 abort (); 350 default: 351 abort (); 352 } 353 } 354 355 /* We give a double lead for bits matching the template in 356 cris_opcodes. Not even, because then "move p8,r10" would 357 be given 2 bits lead over "clear.d r10". When there's a 358 tie, the first entry in the table wins. This is 359 deliberate, to avoid a more complicated recognition 360 formula. */ 361 if ((opcodep->match & insn) == opcodep->match 362 && (opcodep->lose & insn) == 0 363 && ((level_of_match 364 = cris_constraint (opcodep->args, 365 insn, 366 prefix_insn, 367 disdata)) 368 >= 0) 369 && ((level_of_match 370 += 2 * number_of_bits (opcodep->match 371 | opcodep->lose)) 372 > max_level_of_match)) 373 { 374 max_matchedp = opcodep; 375 max_level_of_match = level_of_match; 376 377 /* If there was a full match, never mind looking 378 further. */ 379 if (level_of_match >= 2 * 16) 380 break; 381 } 382 } 383 /* Fill in the new entry. 384 385 If there are changes to the opcode-table involving prefixes, and 386 disassembly then does not work correctly, try removing the 387 else-clause below that fills in the prefix-table. If that 388 helps, you need to change the prefix_opc_table setting above, or 389 something related. */ 390 if (prefix_insn == NO_CRIS_PREFIX) 391 opc_table[insn] = max_matchedp; 392 else 393 prefix_opc_table[insn] = max_matchedp; 394 } 395 396 return max_matchedp; 397 } 398 399 /* Return -1 if the constraints of a bitwise-matched instruction say 400 that there is no match. Otherwise return a nonnegative number 401 indicating the confidence in the match (higher is better). */ 402 403 static int 404 cris_constraint (const char *cs, 405 unsigned int insn, 406 unsigned int prefix_insn, 407 struct cris_disasm_data *disdata) 408 { 409 int retval = 0; 410 int tmp; 411 int prefix_ok = 0; 412 const char *s; 413 414 for (s = cs; *s; s++) 415 switch (*s) 416 { 417 case '!': 418 /* Do not recognize "pop" if there's a prefix and then only for 419 v0..v10. */ 420 if (prefix_insn != NO_CRIS_PREFIX 421 || disdata->distype != cris_dis_v0_v10) 422 return -1; 423 break; 424 425 case 'U': 426 /* Not recognized at disassembly. */ 427 return -1; 428 429 case 'M': 430 /* Size modifier for "clear", i.e. special register 0, 4 or 8. 431 Check that it is one of them. Only special register 12 could 432 be mismatched, but checking for matches is more logical than 433 checking for mismatches when there are only a few cases. */ 434 tmp = ((insn >> 12) & 0xf); 435 if (tmp != 0 && tmp != 4 && tmp != 8) 436 return -1; 437 break; 438 439 case 'm': 440 if ((insn & 0x30) == 0x30) 441 return -1; 442 break; 443 444 case 'S': 445 /* A prefix operand without side-effect. */ 446 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0) 447 { 448 prefix_ok = 1; 449 break; 450 } 451 else 452 return -1; 453 454 case 's': 455 case 'y': 456 case 'Y': 457 /* If this is a prefixed insn with postincrement (side-effect), 458 the prefix must not be DIP. */ 459 if (prefix_insn != NO_CRIS_PREFIX) 460 { 461 if (insn & 0x400) 462 { 463 const struct cris_opcode *prefix_opcodep 464 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 465 466 if (prefix_opcodep->match == DIP_OPCODE) 467 return -1; 468 } 469 470 prefix_ok = 1; 471 } 472 break; 473 474 case 'B': 475 /* If we don't fall through, then the prefix is ok. */ 476 prefix_ok = 1; 477 478 /* A "push" prefix. Check for valid "push" size. 479 In case of special register, it may be != 4. */ 480 if (prefix_insn != NO_CRIS_PREFIX) 481 { 482 /* Match the prefix insn to BDAPQ. */ 483 const struct cris_opcode *prefix_opcodep 484 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 485 486 if (prefix_opcodep->match == BDAP_QUICK_OPCODE) 487 { 488 int pushsize = (prefix_insn & 255); 489 490 if (pushsize > 127) 491 pushsize -= 256; 492 493 if (s[1] == 'P') 494 { 495 unsigned int spec_reg = (insn >> 12) & 15; 496 const struct cris_spec_reg *sregp 497 = spec_reg_info (spec_reg, disdata->distype); 498 499 /* For a special-register, the "prefix size" must 500 match the size of the register. */ 501 if (sregp && sregp->reg_size == (unsigned int) -pushsize) 502 break; 503 } 504 else if (s[1] == 'R') 505 { 506 if ((insn & 0x30) == 0x20 && pushsize == -4) 507 break; 508 } 509 /* FIXME: Should abort here; next constraint letter 510 *must* be 'P' or 'R'. */ 511 } 512 } 513 return -1; 514 515 case 'D': 516 retval = (((insn >> 12) & 15) == (insn & 15)); 517 if (!retval) 518 return -1; 519 else 520 retval += 4; 521 break; 522 523 case 'P': 524 { 525 const struct cris_spec_reg *sregp 526 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 527 528 /* Since we match four bits, we will give a value of 4-1 = 3 529 in a match. If there is a corresponding exact match of a 530 special register in another pattern, it will get a value of 531 4, which will be higher. This should be correct in that an 532 exact pattern would match better than a general pattern. 533 534 Note that there is a reason for not returning zero; the 535 pattern for "clear" is partly matched in the bit-pattern 536 (the two lower bits must be zero), while the bit-pattern 537 for a move from a special register is matched in the 538 register constraint. */ 539 540 if (sregp != NULL) 541 { 542 retval += 3; 543 break; 544 } 545 else 546 return -1; 547 } 548 } 549 550 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok) 551 return -1; 552 553 return retval; 554 } 555 556 /* Format number as hex with a leading "0x" into outbuffer. */ 557 558 static char * 559 format_hex (unsigned long number, 560 char *outbuffer, 561 struct cris_disasm_data *disdata) 562 { 563 /* Truncate negative numbers on >32-bit hosts. */ 564 number &= 0xffffffff; 565 566 sprintf (outbuffer, "0x%lx", number); 567 568 /* Save this value for the "case" support. */ 569 if (TRACE_CASE) 570 last_immediate = number; 571 572 return outbuffer + strlen (outbuffer); 573 } 574 575 /* Format number as decimal into outbuffer. Parameter signedp says 576 whether the number should be formatted as signed (!= 0) or 577 unsigned (== 0). */ 578 579 static char * 580 format_dec (long number, char *outbuffer, int signedp) 581 { 582 last_immediate = number; 583 if (signedp) 584 sprintf (outbuffer, "%ld", number); 585 else 586 sprintf (outbuffer, "%lu", (unsigned long) number); 587 588 return outbuffer + strlen (outbuffer); 589 } 590 591 /* Format the name of the general register regno into outbuffer. */ 592 593 static char * 594 format_reg (struct cris_disasm_data *disdata, 595 int regno, 596 char *outbuffer_start, 597 bool with_reg_prefix) 598 { 599 char *outbuffer = outbuffer_start; 600 601 if (with_reg_prefix) 602 *outbuffer++ = REGISTER_PREFIX_CHAR; 603 604 switch (regno) 605 { 606 case 15: 607 /* For v32, there is no context in which we output PC. */ 608 if (disdata->distype == cris_dis_v32) 609 strcpy (outbuffer, "acr"); 610 else 611 strcpy (outbuffer, "pc"); 612 break; 613 614 case 14: 615 strcpy (outbuffer, "sp"); 616 break; 617 618 default: 619 sprintf (outbuffer, "r%d", regno); 620 break; 621 } 622 623 return outbuffer_start + strlen (outbuffer_start); 624 } 625 626 /* Format the name of a support register into outbuffer. */ 627 628 static char * 629 format_sup_reg (unsigned int regno, 630 char *outbuffer_start, 631 bool with_reg_prefix) 632 { 633 char *outbuffer = outbuffer_start; 634 int i; 635 636 if (with_reg_prefix) 637 *outbuffer++ = REGISTER_PREFIX_CHAR; 638 639 for (i = 0; cris_support_regs[i].name != NULL; i++) 640 if (cris_support_regs[i].number == regno) 641 { 642 sprintf (outbuffer, "%s", cris_support_regs[i].name); 643 return outbuffer_start + strlen (outbuffer_start); 644 } 645 646 /* There's supposed to be register names covering all numbers, though 647 some may be generic names. */ 648 sprintf (outbuffer, "format_sup_reg-BUG"); 649 return outbuffer_start + strlen (outbuffer_start); 650 } 651 652 /* Return the length of an instruction. */ 653 654 static unsigned 655 bytes_to_skip (unsigned int insn, 656 const struct cris_opcode *matchedp, 657 enum cris_disass_family distype, 658 const struct cris_opcode *prefix_matchedp) 659 { 660 /* Each insn is a word plus "immediate" operands. */ 661 unsigned to_skip = 2; 662 const char *template_name = (const char *) matchedp->args; 663 const char *s; 664 665 for (s = template_name; *s; s++) 666 if ((*s == 's' || *s == 'N' || *s == 'Y') 667 && (insn & 0x400) && (insn & 15) == 15 668 && prefix_matchedp == NULL) 669 { 670 /* Immediate via [pc+], so we have to check the size of the 671 operand. */ 672 int mode_size = 1 << ((insn >> 4) & (*template_name == 'z' ? 1 : 3)); 673 674 if (matchedp->imm_oprnd_size == SIZE_FIX_32) 675 to_skip += 4; 676 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG) 677 { 678 const struct cris_spec_reg *sregp 679 = spec_reg_info ((insn >> 12) & 15, distype); 680 681 /* FIXME: Improve error handling; should have been caught 682 earlier. */ 683 if (sregp == NULL) 684 return 2; 685 686 /* PC is incremented by two, not one, for a byte. Except on 687 CRISv32, where constants are always DWORD-size for 688 special registers. */ 689 to_skip += 690 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1; 691 } 692 else 693 to_skip += (mode_size + 1) & ~1; 694 } 695 else if (*s == 'n') 696 to_skip += 4; 697 else if (*s == 'b') 698 to_skip += 2; 699 700 return to_skip; 701 } 702 703 /* Print condition code flags. */ 704 705 static char * 706 print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp) 707 { 708 /* Use the v8 (Etrax 100) flag definitions for disassembly. 709 The differences with v0 (Etrax 1..4) vs. Svinto are: 710 v0 'd' <=> v8 'm' 711 v0 'e' <=> v8 'b'. 712 FIXME: Emit v0..v3 flag names somehow. */ 713 static const char v8_fnames[] = "cvznxibm"; 714 static const char v32_fnames[] = "cvznxiup"; 715 const char *fnames 716 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames; 717 718 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15)); 719 int i; 720 721 for (i = 0; i < 8; i++) 722 if (flagbits & (1 << i)) 723 *cp++ = fnames[i]; 724 725 return cp; 726 } 727 728 /* Print out an insn with its operands, and update the info->insn_type 729 fields. The prefix_opcodep and the rest hold a prefix insn that is 730 supposed to be output as an address mode. */ 731 732 static void 733 print_with_operands (const struct cris_opcode *opcodep, 734 unsigned int insn, 735 unsigned char *buffer, 736 bfd_vma addr, 737 disassemble_info *info, 738 /* If a prefix insn was before this insn (and is supposed 739 to be output as an address), here is a description of 740 it. */ 741 const struct cris_opcode *prefix_opcodep, 742 unsigned int prefix_insn, 743 unsigned char *prefix_buffer, 744 bool with_reg_prefix) 745 { 746 /* Get a buffer of somewhat reasonable size where we store 747 intermediate parts of the insn. */ 748 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2]; 749 char *tp = temp; 750 static const char mode_char[] = "bwd?"; 751 const char *s; 752 const char *cs; 753 struct cris_disasm_data *disdata 754 = (struct cris_disasm_data *) info->private_data; 755 756 /* Print out the name first thing we do. */ 757 (*info->fprintf_func) (info->stream, "%s", opcodep->name); 758 759 cs = opcodep->args; 760 s = cs; 761 762 /* Ignore any prefix indicator. */ 763 if (*s == 'p') 764 s++; 765 766 if (*s == 'm' || *s == 'M' || *s == 'z') 767 { 768 *tp++ = '.'; 769 770 /* Get the size-letter. */ 771 *tp++ = *s == 'M' 772 ? (insn & 0x8000 ? 'd' 773 : insn & 0x4000 ? 'w' : 'b') 774 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)]; 775 776 /* Ignore the size and the space character that follows. */ 777 s += 2; 778 } 779 780 /* Add a space if this isn't a long-branch, because for those will add 781 the condition part of the name later. */ 782 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256)) 783 *tp++ = ' '; 784 785 /* Fill in the insn-type if deducible from the name (and there's no 786 better way). */ 787 if (opcodep->name[0] == 'j') 788 { 789 if (startswith (opcodep->name, "jsr")) 790 /* It's "jsr" or "jsrc". */ 791 info->insn_type = dis_jsr; 792 else 793 /* Any other jump-type insn is considered a branch. */ 794 info->insn_type = dis_branch; 795 } 796 797 /* We might know some more fields right now. */ 798 info->branch_delay_insns = opcodep->delayed; 799 800 /* Handle operands. */ 801 for (; *s; s++) 802 { 803 switch (*s) 804 { 805 case 'T': 806 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix); 807 break; 808 809 case 'A': 810 if (with_reg_prefix) 811 *tp++ = REGISTER_PREFIX_CHAR; 812 *tp++ = 'a'; 813 *tp++ = 'c'; 814 *tp++ = 'r'; 815 break; 816 817 case '[': 818 case ']': 819 case ',': 820 *tp++ = *s; 821 break; 822 823 case '!': 824 /* Ignore at this point; used at earlier stages to avoid 825 recognition if there's a prefix at something that in other 826 ways looks like a "pop". */ 827 break; 828 829 case 'd': 830 /* Ignore. This is an optional ".d " on the large one of 831 relaxable insns. */ 832 break; 833 834 case 'B': 835 /* This was the prefix that made this a "push". We've already 836 handled it by recognizing it, so signal that the prefix is 837 handled by setting it to NULL. */ 838 prefix_opcodep = NULL; 839 break; 840 841 case 'D': 842 case 'r': 843 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 844 break; 845 846 case 'R': 847 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 848 break; 849 850 case 'n': 851 { 852 /* Like N but pc-relative to the start of the insn. */ 853 int32_t number = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536 854 + buffer[5] * 0x1000000u); 855 856 /* Finish off and output previous formatted bytes. */ 857 *tp = 0; 858 if (temp[0]) 859 (*info->fprintf_func) (info->stream, "%s", temp); 860 tp = temp; 861 862 (*info->print_address_func) (addr + number, info); 863 } 864 break; 865 866 case 'u': 867 { 868 /* Like n but the offset is bits <3:0> in the instruction. */ 869 unsigned int number = (buffer[0] & 0xf) * 2; 870 871 /* Finish off and output previous formatted bytes. */ 872 *tp = 0; 873 if (temp[0]) 874 (*info->fprintf_func) (info->stream, "%s", temp); 875 tp = temp; 876 877 (*info->print_address_func) (addr + number, info); 878 } 879 break; 880 881 case 'N': 882 case 'y': 883 case 'Y': 884 case 'S': 885 case 's': 886 /* Any "normal" memory operand. */ 887 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL) 888 { 889 /* We're looking at [pc+], i.e. we need to output an immediate 890 number, where the size can depend on different things. */ 891 int32_t number; 892 int signedp 893 = ((*cs == 'z' && (insn & 0x20)) 894 || opcodep->match == BDAP_QUICK_OPCODE); 895 int nbytes; 896 897 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 898 nbytes = 4; 899 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 900 { 901 const struct cris_spec_reg *sregp 902 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 903 904 /* A NULL return should have been as a non-match earlier, 905 so catch it as an internal error in the error-case 906 below. */ 907 if (sregp == NULL) 908 /* Whatever non-valid size. */ 909 nbytes = 42; 910 else 911 /* PC is always incremented by a multiple of two. 912 For CRISv32, immediates are always 4 bytes for 913 special registers. */ 914 nbytes = disdata->distype == cris_dis_v32 915 ? 4 : (sregp->reg_size + 1) & ~1; 916 } 917 else 918 { 919 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3)); 920 921 if (mode_size == 1) 922 nbytes = 2; 923 else 924 nbytes = mode_size; 925 } 926 927 switch (nbytes) 928 { 929 case 1: 930 number = buffer[2]; 931 if (signedp && number > 127) 932 number -= 256; 933 break; 934 935 case 2: 936 number = buffer[2] + buffer[3] * 256; 937 if (signedp && number > 32767) 938 number -= 65536; 939 break; 940 941 case 4: 942 number = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536 943 + buffer[5] * 0x1000000u); 944 break; 945 946 default: 947 strcpy (tp, "bug"); 948 tp += 3; 949 number = 42; 950 } 951 952 if ((*cs == 'z' && (insn & 0x20)) 953 || (opcodep->match == BDAP_QUICK_OPCODE 954 && (nbytes <= 2 || buffer[1 + nbytes] == 0))) 955 tp = format_dec (number, tp, signedp); 956 else 957 { 958 unsigned int highbyte = (number >> 24) & 0xff; 959 960 /* Either output this as an address or as a number. If it's 961 a dword with the same high-byte as the address of the 962 insn, assume it's an address, and also if it's a non-zero 963 non-0xff high-byte. If this is a jsr or a jump, then 964 it's definitely an address. */ 965 if (nbytes == 4 966 && (highbyte == ((addr >> 24) & 0xff) 967 || (highbyte != 0 && highbyte != 0xff) 968 || info->insn_type == dis_branch 969 || info->insn_type == dis_jsr)) 970 { 971 /* Finish off and output previous formatted bytes. */ 972 *tp = 0; 973 tp = temp; 974 if (temp[0]) 975 (*info->fprintf_func) (info->stream, "%s", temp); 976 977 (*info->print_address_func) ((bfd_vma) number, info); 978 979 info->target = number; 980 } 981 else 982 tp = format_hex (number, tp, disdata); 983 } 984 } 985 else 986 { 987 /* Not an immediate number. Then this is a (possibly 988 prefixed) memory operand. */ 989 if (info->insn_type != dis_nonbranch) 990 { 991 int mode_size 992 = 1 << ((insn >> 4) 993 & (opcodep->args[0] == 'z' ? 1 : 3)); 994 int size; 995 info->insn_type = dis_dref; 996 info->flags |= CRIS_DIS_FLAG_MEMREF; 997 998 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 999 size = 4; 1000 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 1001 { 1002 const struct cris_spec_reg *sregp 1003 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1004 1005 /* FIXME: Improve error handling; should have been caught 1006 earlier. */ 1007 if (sregp == NULL) 1008 size = 4; 1009 else 1010 size = sregp->reg_size; 1011 } 1012 else 1013 size = mode_size; 1014 1015 info->data_size = size; 1016 } 1017 1018 *tp++ = '['; 1019 1020 if (prefix_opcodep 1021 /* We don't match dip with a postincremented field 1022 as a side-effect address mode. */ 1023 && ((insn & 0x400) == 0 1024 || prefix_opcodep->match != DIP_OPCODE)) 1025 { 1026 if (insn & 0x400) 1027 { 1028 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1029 *tp++ = '='; 1030 } 1031 1032 1033 /* We mainly ignore the prefix format string when the 1034 address-mode syntax is output. */ 1035 switch (prefix_opcodep->match) 1036 { 1037 case DIP_OPCODE: 1038 /* It's [r], [r+] or [pc+]. */ 1039 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1040 { 1041 /* It's [pc+]. This cannot possibly be anything 1042 but an address. */ 1043 int32_t number = (prefix_buffer[2] 1044 + prefix_buffer[3] * 256 1045 + prefix_buffer[4] * 65536 1046 + prefix_buffer[5] * 0x1000000u); 1047 1048 info->target = (bfd_vma) number; 1049 1050 /* Finish off and output previous formatted 1051 data. */ 1052 *tp = 0; 1053 tp = temp; 1054 if (temp[0]) 1055 (*info->fprintf_func) (info->stream, "%s", temp); 1056 1057 (*info->print_address_func) ((bfd_vma) number, info); 1058 } 1059 else 1060 { 1061 /* For a memref in an address, we use target2. 1062 In this case, target is zero. */ 1063 info->flags 1064 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1065 | CRIS_DIS_FLAG_MEM_TARGET2_MEM); 1066 1067 info->target2 = prefix_insn & 15; 1068 1069 *tp++ = '['; 1070 tp = format_reg (disdata, prefix_insn & 15, tp, 1071 with_reg_prefix); 1072 if (prefix_insn & 0x400) 1073 *tp++ = '+'; 1074 *tp++ = ']'; 1075 } 1076 break; 1077 1078 case BDAP_QUICK_OPCODE: 1079 { 1080 int number; 1081 1082 number = prefix_buffer[0]; 1083 if (number > 127) 1084 number -= 256; 1085 1086 /* Output "reg+num" or, if num < 0, "reg-num". */ 1087 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1088 with_reg_prefix); 1089 if (number >= 0) 1090 *tp++ = '+'; 1091 tp = format_dec (number, tp, 1); 1092 1093 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1094 info->target = (prefix_insn >> 12) & 15; 1095 info->target2 = (bfd_vma) number; 1096 break; 1097 } 1098 1099 case BIAP_OPCODE: 1100 /* Output "r+R.m". */ 1101 tp = format_reg (disdata, prefix_insn & 15, tp, 1102 with_reg_prefix); 1103 *tp++ = '+'; 1104 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1105 with_reg_prefix); 1106 *tp++ = '.'; 1107 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1108 1109 info->flags 1110 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1111 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1112 1113 | ((prefix_insn & 0x8000) 1114 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4 1115 : ((prefix_insn & 0x8000) 1116 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0))); 1117 1118 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */ 1119 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f) 1120 /* Then start interpreting data as offsets. */ 1121 case_offset_counter = no_of_case_offsets; 1122 break; 1123 1124 case BDAP_INDIR_OPCODE: 1125 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or 1126 "r-s". */ 1127 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1128 with_reg_prefix); 1129 1130 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1131 { 1132 int32_t number; 1133 unsigned int nbytes; 1134 1135 /* It's a value. Get its size. */ 1136 int mode_size = 1 << ((prefix_insn >> 4) & 3); 1137 1138 if (mode_size == 1) 1139 nbytes = 2; 1140 else 1141 nbytes = mode_size; 1142 1143 switch (nbytes) 1144 { 1145 case 1: 1146 number = prefix_buffer[2]; 1147 if (number > 127) 1148 number -= 256; 1149 break; 1150 1151 case 2: 1152 number = prefix_buffer[2] + prefix_buffer[3] * 256; 1153 if (number > 32767) 1154 number -= 65536; 1155 break; 1156 1157 case 4: 1158 number = (prefix_buffer[2] + prefix_buffer[3] * 256 1159 + prefix_buffer[4] * 65536 1160 + prefix_buffer[5] * 0x1000000u); 1161 break; 1162 1163 default: 1164 strcpy (tp, "bug"); 1165 tp += 3; 1166 number = 42; 1167 } 1168 1169 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1170 info->target2 = (bfd_vma) number; 1171 1172 /* If the size is dword, then assume it's an 1173 address. */ 1174 if (nbytes == 4) 1175 { 1176 /* Finish off and output previous formatted 1177 bytes. */ 1178 *tp++ = '+'; 1179 *tp = 0; 1180 tp = temp; 1181 (*info->fprintf_func) (info->stream, "%s", temp); 1182 1183 (*info->print_address_func) ((bfd_vma) number, info); 1184 } 1185 else 1186 { 1187 if (number >= 0) 1188 *tp++ = '+'; 1189 tp = format_dec (number, tp, 1); 1190 } 1191 } 1192 else 1193 { 1194 /* Output "r+[R].m" or "r+[R+].m". */ 1195 *tp++ = '+'; 1196 *tp++ = '['; 1197 tp = format_reg (disdata, prefix_insn & 15, tp, 1198 with_reg_prefix); 1199 if (prefix_insn & 0x400) 1200 *tp++ = '+'; 1201 *tp++ = ']'; 1202 *tp++ = '.'; 1203 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1204 1205 info->flags 1206 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1207 | CRIS_DIS_FLAG_MEM_TARGET2_MEM 1208 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1209 1210 | (((prefix_insn >> 4) == 2) 1211 ? 0 1212 : (((prefix_insn >> 4) & 3) == 1 1213 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD 1214 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE))); 1215 } 1216 break; 1217 1218 default: 1219 (*info->fprintf_func) (info->stream, "?prefix-bug"); 1220 } 1221 1222 /* To mark that the prefix is used, reset it. */ 1223 prefix_opcodep = NULL; 1224 } 1225 else 1226 { 1227 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1228 1229 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1230 info->target = insn & 15; 1231 1232 if (insn & 0x400) 1233 *tp++ = '+'; 1234 } 1235 *tp++ = ']'; 1236 } 1237 break; 1238 1239 case 'x': 1240 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1241 *tp++ = '.'; 1242 *tp++ = mode_char[(insn >> 4) & 3]; 1243 break; 1244 1245 case 'I': 1246 tp = format_dec (insn & 63, tp, 0); 1247 break; 1248 1249 case 'b': 1250 { 1251 int where = buffer[2] + buffer[3] * 256; 1252 1253 if (where > 32767) 1254 where -= 65536; 1255 1256 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4); 1257 1258 if (insn == BA_PC_INCR_OPCODE) 1259 info->insn_type = dis_branch; 1260 else 1261 info->insn_type = dis_condbranch; 1262 1263 info->target = (bfd_vma) where; 1264 1265 *tp = 0; 1266 tp = temp; 1267 (*info->fprintf_func) (info->stream, "%s%s ", 1268 temp, cris_cc_strings[insn >> 12]); 1269 1270 (*info->print_address_func) ((bfd_vma) where, info); 1271 } 1272 break; 1273 1274 case 'c': 1275 tp = format_dec (insn & 31, tp, 0); 1276 break; 1277 1278 case 'C': 1279 tp = format_dec (insn & 15, tp, 0); 1280 break; 1281 1282 case 'o': 1283 { 1284 long offset = insn & 0xfe; 1285 bfd_vma target; 1286 1287 if (insn & 1) 1288 offset |= ~0xff; 1289 1290 if (opcodep->match == BA_QUICK_OPCODE) 1291 info->insn_type = dis_branch; 1292 else 1293 info->insn_type = dis_condbranch; 1294 1295 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset; 1296 info->target = target; 1297 *tp = 0; 1298 tp = temp; 1299 (*info->fprintf_func) (info->stream, "%s", temp); 1300 (*info->print_address_func) (target, info); 1301 } 1302 break; 1303 1304 case 'Q': 1305 case 'O': 1306 { 1307 long number = buffer[0]; 1308 1309 if (number > 127) 1310 number = number - 256; 1311 1312 tp = format_dec (number, tp, 1); 1313 *tp++ = ','; 1314 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1315 } 1316 break; 1317 1318 case 'f': 1319 tp = print_flags (disdata, insn, tp); 1320 break; 1321 1322 case 'i': 1323 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1); 1324 break; 1325 1326 case 'P': 1327 { 1328 const struct cris_spec_reg *sregp 1329 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1330 1331 if (sregp->name == NULL) 1332 /* Should have been caught as a non-match eariler. */ 1333 *tp++ = '?'; 1334 else 1335 { 1336 if (with_reg_prefix) 1337 *tp++ = REGISTER_PREFIX_CHAR; 1338 strcpy (tp, sregp->name); 1339 tp += strlen (tp); 1340 } 1341 } 1342 break; 1343 1344 default: 1345 strcpy (tp, "???"); 1346 tp += 3; 1347 } 1348 } 1349 1350 *tp = 0; 1351 1352 if (prefix_opcodep) 1353 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")", 1354 prefix_opcodep->name, prefix_opcodep->args); 1355 1356 (*info->fprintf_func) (info->stream, "%s", temp); 1357 1358 /* Get info for matching case-tables, if we don't have any active. 1359 We assume that the last constant seen is used; either in the insn 1360 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */ 1361 if (TRACE_CASE && case_offset_counter == 0) 1362 { 1363 if (startswith (opcodep->name, "sub")) 1364 case_offset = last_immediate; 1365 1366 /* It could also be an "add", if there are negative case-values. */ 1367 else if (startswith (opcodep->name, "add")) 1368 /* The first case is the negated operand to the add. */ 1369 case_offset = -last_immediate; 1370 1371 /* A bound insn will tell us the number of cases. */ 1372 else if (startswith (opcodep->name, "bound")) 1373 no_of_case_offsets = last_immediate + 1; 1374 1375 /* A jump or jsr or branch breaks the chain of insns for a 1376 case-table, so assume default first-case again. */ 1377 else if (info->insn_type == dis_jsr 1378 || info->insn_type == dis_branch 1379 || info->insn_type == dis_condbranch) 1380 case_offset = 0; 1381 } 1382 } 1383 1384 1385 /* Print the CRIS instruction at address memaddr on stream. Returns 1386 length of the instruction, in bytes. Prefix register names with `$' if 1387 WITH_REG_PREFIX. */ 1388 1389 static int 1390 print_insn_cris_generic (bfd_vma memaddr, 1391 disassemble_info *info, 1392 bool with_reg_prefix) 1393 { 1394 int nbytes; 1395 unsigned int insn; 1396 const struct cris_opcode *matchedp; 1397 int advance = 0; 1398 struct cris_disasm_data *disdata 1399 = (struct cris_disasm_data *) info->private_data; 1400 1401 /* No instruction will be disassembled as longer than this number of 1402 bytes; stacked prefixes will not be expanded. */ 1403 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; 1404 unsigned char *bufp; 1405 int status = 0; 1406 bfd_vma addr; 1407 1408 /* There will be an "out of range" error after the last instruction. 1409 Reading pairs of bytes in decreasing number, we hope that we will get 1410 at least the amount that we will consume. 1411 1412 If we can't get any data, or we do not get enough data, we print 1413 the error message. */ 1414 1415 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2) 1416 { 1417 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info); 1418 if (status == 0) 1419 break; 1420 } 1421 1422 /* If we did not get all we asked for, then clear the rest. 1423 Hopefully this makes a reproducible result in case of errors. */ 1424 if (nbytes != MAX_BYTES_PER_CRIS_INSN) 1425 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes); 1426 1427 addr = memaddr; 1428 bufp = buffer; 1429 1430 /* Set some defaults for the insn info. */ 1431 info->insn_info_valid = 1; 1432 info->branch_delay_insns = 0; 1433 info->data_size = 0; 1434 info->insn_type = dis_nonbranch; 1435 info->flags = 0; 1436 info->target = 0; 1437 info->target2 = 0; 1438 1439 /* If we got any data, disassemble it. */ 1440 if (nbytes != 0) 1441 { 1442 matchedp = NULL; 1443 1444 insn = bufp[0] + bufp[1] * 256; 1445 1446 /* If we're in a case-table, don't disassemble the offsets. */ 1447 if (TRACE_CASE && case_offset_counter != 0) 1448 { 1449 info->insn_type = dis_noninsn; 1450 advance += 2; 1451 1452 /* If to print data as offsets, then shortcut here. */ 1453 (*info->fprintf_func) (info->stream, "case %ld%s: -> ", 1454 case_offset + no_of_case_offsets 1455 - case_offset_counter, 1456 case_offset_counter == 1 ? "/default" : 1457 ""); 1458 1459 (*info->print_address_func) ((bfd_vma) 1460 ((short) (insn) 1461 + (long) (addr 1462 - (no_of_case_offsets 1463 - case_offset_counter) 1464 * 2)), info); 1465 case_offset_counter--; 1466 1467 /* The default case start (without a "sub" or "add") must be 1468 zero. */ 1469 if (case_offset_counter == 0) 1470 case_offset = 0; 1471 } 1472 else if (insn == 0) 1473 { 1474 /* We're often called to disassemble zeroes. While this is a 1475 valid "bcc .+2" insn, it is also useless enough and enough 1476 of a nuiscance that we will just output "bcc .+2" for it 1477 and signal it as a noninsn. */ 1478 (*info->fprintf_func) (info->stream, 1479 disdata->distype == cris_dis_v32 1480 ? "bcc ." : "bcc .+2"); 1481 info->insn_type = dis_noninsn; 1482 advance += 2; 1483 } 1484 else 1485 { 1486 const struct cris_opcode *prefix_opcodep = NULL; 1487 unsigned char *prefix_buffer = bufp; 1488 unsigned int prefix_insn = insn; 1489 int prefix_size = 0; 1490 1491 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata); 1492 1493 /* Check if we're supposed to write out prefixes as address 1494 modes and if this was a prefix. */ 1495 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p') 1496 { 1497 /* If it's a prefix, put it into the prefix vars and get the 1498 main insn. */ 1499 prefix_size = bytes_to_skip (prefix_insn, matchedp, 1500 disdata->distype, NULL); 1501 prefix_opcodep = matchedp; 1502 1503 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256; 1504 matchedp = get_opcode_entry (insn, prefix_insn, disdata); 1505 1506 if (matchedp != NULL) 1507 { 1508 addr += prefix_size; 1509 bufp += prefix_size; 1510 advance += prefix_size; 1511 } 1512 else 1513 { 1514 /* The "main" insn wasn't valid, at least not when 1515 prefixed. Put back things enough to output the 1516 prefix insn only, as a normal insn. */ 1517 matchedp = prefix_opcodep; 1518 insn = prefix_insn; 1519 prefix_opcodep = NULL; 1520 } 1521 } 1522 1523 if (matchedp == NULL) 1524 { 1525 (*info->fprintf_func) (info->stream, "??0x%x", insn); 1526 advance += 2; 1527 1528 info->insn_type = dis_noninsn; 1529 } 1530 else 1531 { 1532 advance 1533 += bytes_to_skip (insn, matchedp, disdata->distype, 1534 prefix_opcodep); 1535 1536 /* The info_type and assorted fields will be set according 1537 to the operands. */ 1538 print_with_operands (matchedp, insn, bufp, addr, info, 1539 prefix_opcodep, prefix_insn, 1540 prefix_buffer, with_reg_prefix); 1541 } 1542 } 1543 } 1544 else 1545 info->insn_type = dis_noninsn; 1546 1547 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error 1548 status when reading that much, and the insn decoding indicated a 1549 length exceeding what we read, there is an error. */ 1550 if (status != 0 && (nbytes == 0 || advance > nbytes)) 1551 { 1552 (*info->memory_error_func) (status, memaddr, info); 1553 return -1; 1554 } 1555 1556 /* Max supported insn size with one folded prefix insn. */ 1557 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN; 1558 1559 /* I would like to set this to a fixed value larger than the actual 1560 number of bytes to print in order to avoid spaces between bytes, 1561 but objdump.c (2.9.1) does not like that, so we print 16-bit 1562 chunks, which is the next choice. */ 1563 info->bytes_per_chunk = 2; 1564 1565 /* Printing bytes in order of increasing addresses makes sense, 1566 especially on a little-endian target. 1567 This is completely the opposite of what you think; setting this to 1568 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N 1569 we want. */ 1570 info->display_endian = BFD_ENDIAN_BIG; 1571 1572 return advance; 1573 } 1574 1575 /* Disassemble, prefixing register names with `$'. CRIS v0..v10. */ 1576 1577 static int 1578 print_insn_cris_with_register_prefix (bfd_vma vma, 1579 disassemble_info *info) 1580 { 1581 if (info->private_data == NULL 1582 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1583 return -1; 1584 return print_insn_cris_generic (vma, info, true); 1585 } 1586 1587 /* Disassemble, prefixing register names with `$'. CRIS v32. */ 1588 1589 static int 1590 print_insn_crisv32_with_register_prefix (bfd_vma vma, 1591 disassemble_info *info) 1592 { 1593 if (info->private_data == NULL 1594 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1595 return -1; 1596 return print_insn_cris_generic (vma, info, true); 1597 } 1598 1599 /* Disassemble, prefixing register names with `$'. 1600 Common v10 and v32 subset. */ 1601 1602 static int 1603 print_insn_crisv10_v32_with_register_prefix (bfd_vma vma, 1604 disassemble_info *info) 1605 { 1606 if (info->private_data == NULL 1607 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1608 return -1; 1609 return print_insn_cris_generic (vma, info, true); 1610 } 1611 1612 /* Disassemble, no prefixes on register names. CRIS v0..v10. */ 1613 1614 static int 1615 print_insn_cris_without_register_prefix (bfd_vma vma, 1616 disassemble_info *info) 1617 { 1618 if (info->private_data == NULL 1619 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1620 return -1; 1621 return print_insn_cris_generic (vma, info, false); 1622 } 1623 1624 /* Disassemble, no prefixes on register names. CRIS v32. */ 1625 1626 static int 1627 print_insn_crisv32_without_register_prefix (bfd_vma vma, 1628 disassemble_info *info) 1629 { 1630 if (info->private_data == NULL 1631 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1632 return -1; 1633 return print_insn_cris_generic (vma, info, false); 1634 } 1635 1636 /* Disassemble, no prefixes on register names. 1637 Common v10 and v32 subset. */ 1638 1639 static int 1640 print_insn_crisv10_v32_without_register_prefix (bfd_vma vma, 1641 disassemble_info *info) 1642 { 1643 if (info->private_data == NULL 1644 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1645 return -1; 1646 return print_insn_cris_generic (vma, info, false); 1647 } 1648 1649 /* Return a disassembler-function that prints registers with a `$' prefix, 1650 or one that prints registers without a prefix. 1651 FIXME: We should improve the solution to avoid the multitude of 1652 functions seen above. */ 1653 1654 disassembler_ftype 1655 cris_get_disassembler (bfd *abfd) 1656 { 1657 /* If there's no bfd in sight, we return what is valid as input in all 1658 contexts if fed back to the assembler: disassembly *with* register 1659 prefix. Unfortunately this will be totally wrong for v32. */ 1660 if (abfd == NULL) 1661 return print_insn_cris_with_register_prefix; 1662 1663 if (bfd_get_symbol_leading_char (abfd) == 0) 1664 { 1665 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1666 return print_insn_crisv32_with_register_prefix; 1667 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1668 return print_insn_crisv10_v32_with_register_prefix; 1669 1670 /* We default to v10. This may be specifically specified in the 1671 bfd mach, but is also the default setting. */ 1672 return print_insn_cris_with_register_prefix; 1673 } 1674 1675 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1676 return print_insn_crisv32_without_register_prefix; 1677 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1678 return print_insn_crisv10_v32_without_register_prefix; 1679 return print_insn_cris_without_register_prefix; 1680 } 1681 1682 /* Local variables: 1683 eval: (c-set-style "gnu") 1684 indent-tabs-mode: t 1685 End: */ 1686