1 /* Target-dependent code for the Renesas RX for GDB, the GNU debugger. 2 3 Copyright (C) 2008-2023 Free Software Foundation, Inc. 4 5 Contributed by Red Hat, Inc. 6 7 This file is part of GDB. 8 9 This program is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3 of the License, or 12 (at your option) any later version. 13 14 This program is distributed in the hope that it will be useful, 15 but WITHOUT ANY WARRANTY; without even the implied warranty of 16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 GNU General Public License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 21 22 #include "defs.h" 23 #include "arch-utils.h" 24 #include "prologue-value.h" 25 #include "target.h" 26 #include "regcache.h" 27 #include "opcode/rx.h" 28 #include "dis-asm.h" 29 #include "gdbtypes.h" 30 #include "frame.h" 31 #include "frame-unwind.h" 32 #include "frame-base.h" 33 #include "value.h" 34 #include "gdbcore.h" 35 #include "dwarf2/frame.h" 36 #include "remote.h" 37 #include "target-descriptions.h" 38 #include "gdbarch.h" 39 40 #include "elf/rx.h" 41 #include "elf-bfd.h" 42 #include <algorithm> 43 44 #include "features/rx.c" 45 46 /* Certain important register numbers. */ 47 enum 48 { 49 RX_SP_REGNUM = 0, 50 RX_R1_REGNUM = 1, 51 RX_R4_REGNUM = 4, 52 RX_FP_REGNUM = 6, 53 RX_R15_REGNUM = 15, 54 RX_USP_REGNUM = 16, 55 RX_PSW_REGNUM = 18, 56 RX_PC_REGNUM = 19, 57 RX_BPSW_REGNUM = 21, 58 RX_BPC_REGNUM = 22, 59 RX_FPSW_REGNUM = 24, 60 RX_ACC_REGNUM = 25, 61 RX_NUM_REGS = 26 62 }; 63 64 /* RX frame types. */ 65 enum rx_frame_type { 66 RX_FRAME_TYPE_NORMAL, 67 RX_FRAME_TYPE_EXCEPTION, 68 RX_FRAME_TYPE_FAST_INTERRUPT 69 }; 70 71 /* Architecture specific data. */ 72 struct rx_gdbarch_tdep : gdbarch_tdep_base 73 { 74 /* The ELF header flags specify the multilib used. */ 75 int elf_flags = 0; 76 77 /* Type of PSW and BPSW. */ 78 struct type *rx_psw_type = nullptr; 79 80 /* Type of FPSW. */ 81 struct type *rx_fpsw_type = nullptr; 82 }; 83 84 /* This structure holds the results of a prologue analysis. */ 85 struct rx_prologue 86 { 87 /* Frame type, either a normal frame or one of two types of exception 88 frames. */ 89 enum rx_frame_type frame_type; 90 91 /* The offset from the frame base to the stack pointer --- always 92 zero or negative. 93 94 Calling this a "size" is a bit misleading, but given that the 95 stack grows downwards, using offsets for everything keeps one 96 from going completely sign-crazy: you never change anything's 97 sign for an ADD instruction; always change the second operand's 98 sign for a SUB instruction; and everything takes care of 99 itself. */ 100 int frame_size; 101 102 /* Non-zero if this function has initialized the frame pointer from 103 the stack pointer, zero otherwise. */ 104 int has_frame_ptr; 105 106 /* If has_frame_ptr is non-zero, this is the offset from the frame 107 base to where the frame pointer points. This is always zero or 108 negative. */ 109 int frame_ptr_offset; 110 111 /* The address of the first instruction at which the frame has been 112 set up and the arguments are where the debug info says they are 113 --- as best as we can tell. */ 114 CORE_ADDR prologue_end; 115 116 /* reg_offset[R] is the offset from the CFA at which register R is 117 saved, or 1 if register R has not been saved. (Real values are 118 always zero or negative.) */ 119 int reg_offset[RX_NUM_REGS]; 120 }; 121 122 /* RX register names */ 123 static const char *const rx_register_names[] = { 124 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 125 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 126 "usp", "isp", "psw", "pc", "intb", "bpsw","bpc","fintv", 127 "fpsw", "acc", 128 }; 129 130 131 /* Function for finding saved registers in a 'struct pv_area'; this 132 function is passed to pv_area::scan. 133 134 If VALUE is a saved register, ADDR says it was saved at a constant 135 offset from the frame base, and SIZE indicates that the whole 136 register was saved, record its offset. */ 137 static void 138 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) 139 { 140 struct rx_prologue *result = (struct rx_prologue *) result_untyped; 141 142 if (value.kind == pvk_register 143 && value.k == 0 144 && pv_is_register (addr, RX_SP_REGNUM) 145 && size == register_size (target_gdbarch (), value.reg)) 146 result->reg_offset[value.reg] = addr.k; 147 } 148 149 /* Define a "handle" struct for fetching the next opcode. */ 150 struct rx_get_opcode_byte_handle 151 { 152 CORE_ADDR pc; 153 }; 154 155 /* Fetch a byte on behalf of the opcode decoder. HANDLE contains 156 the memory address of the next byte to fetch. If successful, 157 the address in the handle is updated and the byte fetched is 158 returned as the value of the function. If not successful, -1 159 is returned. */ 160 static int 161 rx_get_opcode_byte (void *handle) 162 { 163 struct rx_get_opcode_byte_handle *opcdata 164 = (struct rx_get_opcode_byte_handle *) handle; 165 int status; 166 gdb_byte byte; 167 168 status = target_read_code (opcdata->pc, &byte, 1); 169 if (status == 0) 170 { 171 opcdata->pc += 1; 172 return byte; 173 } 174 else 175 return -1; 176 } 177 178 /* Analyze a prologue starting at START_PC, going no further than 179 LIMIT_PC. Fill in RESULT as appropriate. */ 180 181 static void 182 rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc, 183 enum rx_frame_type frame_type, 184 struct rx_prologue *result) 185 { 186 CORE_ADDR pc, next_pc; 187 int rn; 188 pv_t reg[RX_NUM_REGS]; 189 CORE_ADDR after_last_frame_setup_insn = start_pc; 190 191 memset (result, 0, sizeof (*result)); 192 193 result->frame_type = frame_type; 194 195 for (rn = 0; rn < RX_NUM_REGS; rn++) 196 { 197 reg[rn] = pv_register (rn, 0); 198 result->reg_offset[rn] = 1; 199 } 200 201 pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ())); 202 203 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) 204 { 205 /* This code won't do anything useful at present, but this is 206 what happens for fast interrupts. */ 207 reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM]; 208 reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM]; 209 } 210 else 211 { 212 /* When an exception occurs, the PSW is saved to the interrupt stack 213 first. */ 214 if (frame_type == RX_FRAME_TYPE_EXCEPTION) 215 { 216 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); 217 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]); 218 } 219 220 /* The call instruction (or an exception/interrupt) has saved the return 221 address on the stack. */ 222 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); 223 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]); 224 225 } 226 227 228 pc = start_pc; 229 while (pc < limit_pc) 230 { 231 int bytes_read; 232 struct rx_get_opcode_byte_handle opcode_handle; 233 RX_Opcode_Decoded opc; 234 235 opcode_handle.pc = pc; 236 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, 237 &opcode_handle); 238 next_pc = pc + bytes_read; 239 240 if (opc.id == RXO_pushm /* pushm r1, r2 */ 241 && opc.op[1].type == RX_Operand_Register 242 && opc.op[2].type == RX_Operand_Register) 243 { 244 int r1, r2; 245 int r; 246 247 r1 = opc.op[1].reg; 248 r2 = opc.op[2].reg; 249 for (r = r2; r >= r1; r--) 250 { 251 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); 252 stack.store (reg[RX_SP_REGNUM], 4, reg[r]); 253 } 254 after_last_frame_setup_insn = next_pc; 255 } 256 else if (opc.id == RXO_mov /* mov.l rdst, rsrc */ 257 && opc.op[0].type == RX_Operand_Register 258 && opc.op[1].type == RX_Operand_Register 259 && opc.size == RX_Long) 260 { 261 int rdst, rsrc; 262 263 rdst = opc.op[0].reg; 264 rsrc = opc.op[1].reg; 265 reg[rdst] = reg[rsrc]; 266 if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM) 267 after_last_frame_setup_insn = next_pc; 268 } 269 else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */ 270 && opc.op[0].type == RX_Operand_Predec 271 && opc.op[0].reg == RX_SP_REGNUM 272 && opc.op[1].type == RX_Operand_Register 273 && opc.size == RX_Long) 274 { 275 int rsrc; 276 277 rsrc = opc.op[1].reg; 278 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); 279 stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]); 280 after_last_frame_setup_insn = next_pc; 281 } 282 else if (opc.id == RXO_add /* add #const, rsrc, rdst */ 283 && opc.op[0].type == RX_Operand_Register 284 && opc.op[1].type == RX_Operand_Immediate 285 && opc.op[2].type == RX_Operand_Register) 286 { 287 int rdst = opc.op[0].reg; 288 int addend = opc.op[1].addend; 289 int rsrc = opc.op[2].reg; 290 reg[rdst] = pv_add_constant (reg[rsrc], addend); 291 /* Negative adjustments to the stack pointer or frame pointer 292 are (most likely) part of the prologue. */ 293 if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0) 294 after_last_frame_setup_insn = next_pc; 295 } 296 else if (opc.id == RXO_mov 297 && opc.op[0].type == RX_Operand_Indirect 298 && opc.op[1].type == RX_Operand_Register 299 && opc.size == RX_Long 300 && (opc.op[0].reg == RX_SP_REGNUM 301 || opc.op[0].reg == RX_FP_REGNUM) 302 && (RX_R1_REGNUM <= opc.op[1].reg 303 && opc.op[1].reg <= RX_R4_REGNUM)) 304 { 305 /* This moves an argument register to the stack. Don't 306 record it, but allow it to be a part of the prologue. */ 307 } 308 else if (opc.id == RXO_branch 309 && opc.op[0].type == RX_Operand_Immediate 310 && next_pc < opc.op[0].addend) 311 { 312 /* When a loop appears as the first statement of a function 313 body, gcc 4.x will use a BRA instruction to branch to the 314 loop condition checking code. This BRA instruction is 315 marked as part of the prologue. We therefore set next_pc 316 to this branch target and also stop the prologue scan. 317 The instructions at and beyond the branch target should 318 no longer be associated with the prologue. 319 320 Note that we only consider forward branches here. We 321 presume that a forward branch is being used to skip over 322 a loop body. 323 324 A backwards branch is covered by the default case below. 325 If we were to encounter a backwards branch, that would 326 most likely mean that we've scanned through a loop body. 327 We definitely want to stop the prologue scan when this 328 happens and that is precisely what is done by the default 329 case below. */ 330 331 after_last_frame_setup_insn = opc.op[0].addend; 332 break; /* Scan no further if we hit this case. */ 333 } 334 else 335 { 336 /* Terminate the prologue scan. */ 337 break; 338 } 339 340 pc = next_pc; 341 } 342 343 /* Is the frame size (offset, really) a known constant? */ 344 if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM)) 345 result->frame_size = reg[RX_SP_REGNUM].k; 346 347 /* Was the frame pointer initialized? */ 348 if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM)) 349 { 350 result->has_frame_ptr = 1; 351 result->frame_ptr_offset = reg[RX_FP_REGNUM].k; 352 } 353 354 /* Record where all the registers were saved. */ 355 stack.scan (check_for_saved, (void *) result); 356 357 result->prologue_end = after_last_frame_setup_insn; 358 } 359 360 361 /* Implement the "skip_prologue" gdbarch method. */ 362 static CORE_ADDR 363 rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 364 { 365 const char *name; 366 CORE_ADDR func_addr, func_end; 367 struct rx_prologue p; 368 369 /* Try to find the extent of the function that contains PC. */ 370 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) 371 return pc; 372 373 /* The frame type doesn't matter here, since we only care about 374 where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */ 375 rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p); 376 return p.prologue_end; 377 } 378 379 /* Given a frame described by THIS_FRAME, decode the prologue of its 380 associated function if there is not cache entry as specified by 381 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and 382 return that struct as the value of this function. */ 383 384 static struct rx_prologue * 385 rx_analyze_frame_prologue (frame_info_ptr this_frame, 386 enum rx_frame_type frame_type, 387 void **this_prologue_cache) 388 { 389 if (!*this_prologue_cache) 390 { 391 CORE_ADDR func_start, stop_addr; 392 393 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue); 394 395 func_start = get_frame_func (this_frame); 396 stop_addr = get_frame_pc (this_frame); 397 398 /* If we couldn't find any function containing the PC, then 399 just initialize the prologue cache, but don't do anything. */ 400 if (!func_start) 401 stop_addr = func_start; 402 403 rx_analyze_prologue (func_start, stop_addr, frame_type, 404 (struct rx_prologue *) *this_prologue_cache); 405 } 406 407 return (struct rx_prologue *) *this_prologue_cache; 408 } 409 410 /* Determine type of frame by scanning the function for a return 411 instruction. */ 412 413 static enum rx_frame_type 414 rx_frame_type (frame_info_ptr this_frame, void **this_cache) 415 { 416 const char *name; 417 CORE_ADDR pc, start_pc, lim_pc; 418 int bytes_read; 419 struct rx_get_opcode_byte_handle opcode_handle; 420 RX_Opcode_Decoded opc; 421 422 gdb_assert (this_cache != NULL); 423 424 /* If we have a cached value, return it. */ 425 426 if (*this_cache != NULL) 427 { 428 struct rx_prologue *p = (struct rx_prologue *) *this_cache; 429 430 return p->frame_type; 431 } 432 433 /* No cached value; scan the function. The frame type is cached in 434 rx_analyze_prologue / rx_analyze_frame_prologue. */ 435 436 pc = get_frame_pc (this_frame); 437 438 /* Attempt to find the last address in the function. If it cannot 439 be determined, set the limit to be a short ways past the frame's 440 pc. */ 441 if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc)) 442 lim_pc = pc + 20; 443 444 while (pc < lim_pc) 445 { 446 opcode_handle.pc = pc; 447 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, 448 &opcode_handle); 449 450 if (bytes_read <= 0 || opc.id == RXO_rts) 451 return RX_FRAME_TYPE_NORMAL; 452 else if (opc.id == RXO_rtfi) 453 return RX_FRAME_TYPE_FAST_INTERRUPT; 454 else if (opc.id == RXO_rte) 455 return RX_FRAME_TYPE_EXCEPTION; 456 457 pc += bytes_read; 458 } 459 460 return RX_FRAME_TYPE_NORMAL; 461 } 462 463 464 /* Given the next frame and a prologue cache, return this frame's 465 base. */ 466 467 static CORE_ADDR 468 rx_frame_base (frame_info_ptr this_frame, void **this_cache) 469 { 470 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); 471 struct rx_prologue *p 472 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); 473 474 /* In functions that use alloca, the distance between the stack 475 pointer and the frame base varies dynamically, so we can't use 476 the SP plus static information like prologue analysis to find the 477 frame base. However, such functions must have a frame pointer, 478 to be able to restore the SP on exit. So whenever we do have a 479 frame pointer, use that to find the base. */ 480 if (p->has_frame_ptr) 481 { 482 CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM); 483 return fp - p->frame_ptr_offset; 484 } 485 else 486 { 487 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM); 488 return sp - p->frame_size; 489 } 490 } 491 492 /* Implement the "frame_this_id" method for unwinding frames. */ 493 494 static void 495 rx_frame_this_id (frame_info_ptr this_frame, void **this_cache, 496 struct frame_id *this_id) 497 { 498 *this_id = frame_id_build (rx_frame_base (this_frame, this_cache), 499 get_frame_func (this_frame)); 500 } 501 502 /* Implement the "frame_prev_register" method for unwinding frames. */ 503 504 static struct value * 505 rx_frame_prev_register (frame_info_ptr this_frame, void **this_cache, 506 int regnum) 507 { 508 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); 509 struct rx_prologue *p 510 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); 511 CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache); 512 513 if (regnum == RX_SP_REGNUM) 514 { 515 if (frame_type == RX_FRAME_TYPE_EXCEPTION) 516 { 517 struct value *psw_val; 518 CORE_ADDR psw; 519 520 psw_val = rx_frame_prev_register (this_frame, this_cache, 521 RX_PSW_REGNUM); 522 psw = extract_unsigned_integer 523 (value_contents_all (psw_val).data (), 4, 524 gdbarch_byte_order (get_frame_arch (this_frame))); 525 526 if ((psw & 0x20000 /* U bit */) != 0) 527 return rx_frame_prev_register (this_frame, this_cache, 528 RX_USP_REGNUM); 529 530 /* Fall through for the case where U bit is zero. */ 531 } 532 533 return frame_unwind_got_constant (this_frame, regnum, frame_base); 534 } 535 536 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) 537 { 538 if (regnum == RX_PC_REGNUM) 539 return rx_frame_prev_register (this_frame, this_cache, 540 RX_BPC_REGNUM); 541 if (regnum == RX_PSW_REGNUM) 542 return rx_frame_prev_register (this_frame, this_cache, 543 RX_BPSW_REGNUM); 544 } 545 546 /* If prologue analysis says we saved this register somewhere, 547 return a description of the stack slot holding it. */ 548 if (p->reg_offset[regnum] != 1) 549 return frame_unwind_got_memory (this_frame, regnum, 550 frame_base + p->reg_offset[regnum]); 551 552 /* Otherwise, presume we haven't changed the value of this 553 register, and get it from the next frame. */ 554 return frame_unwind_got_register (this_frame, regnum, regnum); 555 } 556 557 /* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */ 558 559 static int 560 normal_frame_p (enum rx_frame_type frame_type) 561 { 562 return (frame_type == RX_FRAME_TYPE_NORMAL); 563 } 564 565 /* Return TRUE if the frame indicated by FRAME_TYPE is an exception 566 frame. */ 567 568 static int 569 exception_frame_p (enum rx_frame_type frame_type) 570 { 571 return (frame_type == RX_FRAME_TYPE_EXCEPTION 572 || frame_type == RX_FRAME_TYPE_FAST_INTERRUPT); 573 } 574 575 /* Common code used by both normal and exception frame sniffers. */ 576 577 static int 578 rx_frame_sniffer_common (const struct frame_unwind *self, 579 frame_info_ptr this_frame, 580 void **this_cache, 581 int (*sniff_p)(enum rx_frame_type) ) 582 { 583 gdb_assert (this_cache != NULL); 584 585 if (*this_cache == NULL) 586 { 587 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); 588 589 if (sniff_p (frame_type)) 590 { 591 /* The call below will fill in the cache, including the frame 592 type. */ 593 (void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache); 594 595 return 1; 596 } 597 else 598 return 0; 599 } 600 else 601 { 602 struct rx_prologue *p = (struct rx_prologue *) *this_cache; 603 604 return sniff_p (p->frame_type); 605 } 606 } 607 608 /* Frame sniffer for normal (non-exception) frames. */ 609 610 static int 611 rx_frame_sniffer (const struct frame_unwind *self, 612 frame_info_ptr this_frame, 613 void **this_cache) 614 { 615 return rx_frame_sniffer_common (self, this_frame, this_cache, 616 normal_frame_p); 617 } 618 619 /* Frame sniffer for exception frames. */ 620 621 static int 622 rx_exception_sniffer (const struct frame_unwind *self, 623 frame_info_ptr this_frame, 624 void **this_cache) 625 { 626 return rx_frame_sniffer_common (self, this_frame, this_cache, 627 exception_frame_p); 628 } 629 630 /* Data structure for normal code using instruction-based prologue 631 analyzer. */ 632 633 static const struct frame_unwind rx_frame_unwind = { 634 "rx prologue", 635 NORMAL_FRAME, 636 default_frame_unwind_stop_reason, 637 rx_frame_this_id, 638 rx_frame_prev_register, 639 NULL, 640 rx_frame_sniffer 641 }; 642 643 /* Data structure for exception code using instruction-based prologue 644 analyzer. */ 645 646 static const struct frame_unwind rx_exception_unwind = { 647 "rx exception", 648 /* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */ 649 NORMAL_FRAME, 650 default_frame_unwind_stop_reason, 651 rx_frame_this_id, 652 rx_frame_prev_register, 653 NULL, 654 rx_exception_sniffer 655 }; 656 657 /* Implement the "push_dummy_call" gdbarch method. */ 658 static CORE_ADDR 659 rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 660 struct regcache *regcache, CORE_ADDR bp_addr, int nargs, 661 struct value **args, CORE_ADDR sp, 662 function_call_return_method return_method, 663 CORE_ADDR struct_addr) 664 { 665 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 666 int write_pass; 667 int sp_off = 0; 668 CORE_ADDR cfa; 669 int num_register_candidate_args; 670 671 struct type *func_type = value_type (function); 672 673 /* Dereference function pointer types. */ 674 while (func_type->code () == TYPE_CODE_PTR) 675 func_type = func_type->target_type (); 676 677 /* The end result had better be a function or a method. */ 678 gdb_assert (func_type->code () == TYPE_CODE_FUNC 679 || func_type->code () == TYPE_CODE_METHOD); 680 681 /* Functions with a variable number of arguments have all of their 682 variable arguments and the last non-variable argument passed 683 on the stack. 684 685 Otherwise, we can pass up to four arguments on the stack. 686 687 Once computed, we leave this value alone. I.e. we don't update 688 it in case of a struct return going in a register or an argument 689 requiring multiple registers, etc. We rely instead on the value 690 of the ``arg_reg'' variable to get these other details correct. */ 691 692 if (func_type->has_varargs ()) 693 num_register_candidate_args = func_type->num_fields () - 1; 694 else 695 num_register_candidate_args = 4; 696 697 /* We make two passes; the first does the stack allocation, 698 the second actually stores the arguments. */ 699 for (write_pass = 0; write_pass <= 1; write_pass++) 700 { 701 int i; 702 int arg_reg = RX_R1_REGNUM; 703 704 if (write_pass) 705 sp = align_down (sp - sp_off, 4); 706 sp_off = 0; 707 708 if (return_method == return_method_struct) 709 { 710 struct type *return_type = func_type->target_type (); 711 712 gdb_assert (return_type->code () == TYPE_CODE_STRUCT 713 || func_type->code () == TYPE_CODE_UNION); 714 715 if (return_type->length () > 16 716 || return_type->length () % 4 != 0) 717 { 718 if (write_pass) 719 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, 720 struct_addr); 721 } 722 } 723 724 /* Push the arguments. */ 725 for (i = 0; i < nargs; i++) 726 { 727 struct value *arg = args[i]; 728 const gdb_byte *arg_bits = value_contents_all (arg).data (); 729 struct type *arg_type = check_typedef (value_type (arg)); 730 ULONGEST arg_size = arg_type->length (); 731 732 if (i == 0 && struct_addr != 0 733 && return_method != return_method_struct 734 && arg_type->code () == TYPE_CODE_PTR 735 && extract_unsigned_integer (arg_bits, 4, 736 byte_order) == struct_addr) 737 { 738 /* This argument represents the address at which C++ (and 739 possibly other languages) store their return value. 740 Put this value in R15. */ 741 if (write_pass) 742 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, 743 struct_addr); 744 } 745 else if (arg_type->code () != TYPE_CODE_STRUCT 746 && arg_type->code () != TYPE_CODE_UNION 747 && arg_size <= 8) 748 { 749 /* Argument is a scalar. */ 750 if (arg_size == 8) 751 { 752 if (i < num_register_candidate_args 753 && arg_reg <= RX_R4_REGNUM - 1) 754 { 755 /* If argument registers are going to be used to pass 756 an 8 byte scalar, the ABI specifies that two registers 757 must be available. */ 758 if (write_pass) 759 { 760 regcache_cooked_write_unsigned (regcache, arg_reg, 761 extract_unsigned_integer 762 (arg_bits, 4, 763 byte_order)); 764 regcache_cooked_write_unsigned (regcache, 765 arg_reg + 1, 766 extract_unsigned_integer 767 (arg_bits + 4, 4, 768 byte_order)); 769 } 770 arg_reg += 2; 771 } 772 else 773 { 774 sp_off = align_up (sp_off, 4); 775 /* Otherwise, pass the 8 byte scalar on the stack. */ 776 if (write_pass) 777 write_memory (sp + sp_off, arg_bits, 8); 778 sp_off += 8; 779 } 780 } 781 else 782 { 783 ULONGEST u; 784 785 gdb_assert (arg_size <= 4); 786 787 u = 788 extract_unsigned_integer (arg_bits, arg_size, byte_order); 789 790 if (i < num_register_candidate_args 791 && arg_reg <= RX_R4_REGNUM) 792 { 793 if (write_pass) 794 regcache_cooked_write_unsigned (regcache, arg_reg, u); 795 arg_reg += 1; 796 } 797 else 798 { 799 int p_arg_size = 4; 800 801 if (func_type->is_prototyped () 802 && i < func_type->num_fields ()) 803 { 804 struct type *p_arg_type = 805 func_type->field (i).type (); 806 p_arg_size = p_arg_type->length (); 807 } 808 809 sp_off = align_up (sp_off, p_arg_size); 810 811 if (write_pass) 812 write_memory_unsigned_integer (sp + sp_off, 813 p_arg_size, byte_order, 814 u); 815 sp_off += p_arg_size; 816 } 817 } 818 } 819 else 820 { 821 /* Argument is a struct or union. Pass as much of the struct 822 in registers, if possible. Pass the rest on the stack. */ 823 while (arg_size > 0) 824 { 825 if (i < num_register_candidate_args 826 && arg_reg <= RX_R4_REGNUM 827 && arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1) 828 && arg_size % 4 == 0) 829 { 830 int len = std::min (arg_size, (ULONGEST) 4); 831 832 if (write_pass) 833 regcache_cooked_write_unsigned (regcache, arg_reg, 834 extract_unsigned_integer 835 (arg_bits, len, 836 byte_order)); 837 arg_bits += len; 838 arg_size -= len; 839 arg_reg++; 840 } 841 else 842 { 843 sp_off = align_up (sp_off, 4); 844 if (write_pass) 845 write_memory (sp + sp_off, arg_bits, arg_size); 846 sp_off += align_up (arg_size, 4); 847 arg_size = 0; 848 } 849 } 850 } 851 } 852 } 853 854 /* Keep track of the stack address prior to pushing the return address. 855 This is the value that we'll return. */ 856 cfa = sp; 857 858 /* Push the return address. */ 859 sp = sp - 4; 860 write_memory_unsigned_integer (sp, 4, byte_order, bp_addr); 861 862 /* Update the stack pointer. */ 863 regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp); 864 865 return cfa; 866 } 867 868 /* Implement the "return_value" gdbarch method. */ 869 static enum return_value_convention 870 rx_return_value (struct gdbarch *gdbarch, 871 struct value *function, 872 struct type *valtype, 873 struct regcache *regcache, 874 gdb_byte *readbuf, const gdb_byte *writebuf) 875 { 876 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 877 ULONGEST valtype_len = valtype->length (); 878 879 if (valtype->length () > 16 880 || ((valtype->code () == TYPE_CODE_STRUCT 881 || valtype->code () == TYPE_CODE_UNION) 882 && valtype->length () % 4 != 0)) 883 return RETURN_VALUE_STRUCT_CONVENTION; 884 885 if (readbuf) 886 { 887 ULONGEST u; 888 int argreg = RX_R1_REGNUM; 889 int offset = 0; 890 891 while (valtype_len > 0) 892 { 893 int len = std::min (valtype_len, (ULONGEST) 4); 894 895 regcache_cooked_read_unsigned (regcache, argreg, &u); 896 store_unsigned_integer (readbuf + offset, len, byte_order, u); 897 valtype_len -= len; 898 offset += len; 899 argreg++; 900 } 901 } 902 903 if (writebuf) 904 { 905 ULONGEST u; 906 int argreg = RX_R1_REGNUM; 907 int offset = 0; 908 909 while (valtype_len > 0) 910 { 911 int len = std::min (valtype_len, (ULONGEST) 4); 912 913 u = extract_unsigned_integer (writebuf + offset, len, byte_order); 914 regcache_cooked_write_unsigned (regcache, argreg, u); 915 valtype_len -= len; 916 offset += len; 917 argreg++; 918 } 919 } 920 921 return RETURN_VALUE_REGISTER_CONVENTION; 922 } 923 924 constexpr gdb_byte rx_break_insn[] = { 0x00 }; 925 926 typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint; 927 928 /* Implement the dwarf_reg_to_regnum" gdbarch method. */ 929 930 static int 931 rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) 932 { 933 if (0 <= reg && reg <= 15) 934 return reg; 935 else if (reg == 16) 936 return RX_PSW_REGNUM; 937 else if (reg == 17) 938 return RX_PC_REGNUM; 939 else 940 return -1; 941 } 942 943 /* Allocate and initialize a gdbarch object. */ 944 static struct gdbarch * 945 rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 946 { 947 struct gdbarch *gdbarch; 948 int elf_flags; 949 tdesc_arch_data_up tdesc_data; 950 const struct target_desc *tdesc = info.target_desc; 951 952 /* Extract the elf_flags if available. */ 953 if (info.abfd != NULL 954 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) 955 elf_flags = elf_elfheader (info.abfd)->e_flags; 956 else 957 elf_flags = 0; 958 959 960 /* Try to find the architecture in the list of already defined 961 architectures. */ 962 for (arches = gdbarch_list_lookup_by_info (arches, &info); 963 arches != NULL; 964 arches = gdbarch_list_lookup_by_info (arches->next, &info)) 965 { 966 rx_gdbarch_tdep *tdep 967 = gdbarch_tdep<rx_gdbarch_tdep> (arches->gdbarch); 968 969 if (tdep->elf_flags != elf_flags) 970 continue; 971 972 return arches->gdbarch; 973 } 974 975 if (tdesc == NULL) 976 tdesc = tdesc_rx; 977 978 /* Check any target description for validity. */ 979 if (tdesc_has_registers (tdesc)) 980 { 981 const struct tdesc_feature *feature; 982 bool valid_p = true; 983 984 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.core"); 985 986 if (feature != NULL) 987 { 988 tdesc_data = tdesc_data_alloc (); 989 for (int i = 0; i < RX_NUM_REGS; i++) 990 valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, 991 rx_register_names[i]); 992 } 993 994 if (!valid_p) 995 return NULL; 996 } 997 998 gdb_assert(tdesc_data != NULL); 999 1000 rx_gdbarch_tdep *tdep = new rx_gdbarch_tdep; 1001 gdbarch = gdbarch_alloc (&info, tdep); 1002 tdep->elf_flags = elf_flags; 1003 1004 set_gdbarch_num_regs (gdbarch, RX_NUM_REGS); 1005 tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); 1006 1007 set_gdbarch_num_pseudo_regs (gdbarch, 0); 1008 set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM); 1009 set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM); 1010 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1011 set_gdbarch_decr_pc_after_break (gdbarch, 1); 1012 set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc); 1013 set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind); 1014 set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue); 1015 1016 /* Target builtin data types. */ 1017 set_gdbarch_char_signed (gdbarch, 0); 1018 set_gdbarch_short_bit (gdbarch, 16); 1019 set_gdbarch_int_bit (gdbarch, 32); 1020 set_gdbarch_long_bit (gdbarch, 32); 1021 set_gdbarch_long_long_bit (gdbarch, 64); 1022 set_gdbarch_ptr_bit (gdbarch, 32); 1023 set_gdbarch_float_bit (gdbarch, 32); 1024 set_gdbarch_float_format (gdbarch, floatformats_ieee_single); 1025 1026 if (elf_flags & E_FLAG_RX_64BIT_DOUBLES) 1027 { 1028 set_gdbarch_double_bit (gdbarch, 64); 1029 set_gdbarch_long_double_bit (gdbarch, 64); 1030 set_gdbarch_double_format (gdbarch, floatformats_ieee_double); 1031 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); 1032 } 1033 else 1034 { 1035 set_gdbarch_double_bit (gdbarch, 32); 1036 set_gdbarch_long_double_bit (gdbarch, 32); 1037 set_gdbarch_double_format (gdbarch, floatformats_ieee_single); 1038 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); 1039 } 1040 1041 /* DWARF register mapping. */ 1042 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum); 1043 1044 /* Frame unwinding. */ 1045 frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind); 1046 dwarf2_append_unwinders (gdbarch); 1047 frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind); 1048 1049 /* Methods setting up a dummy call, and extracting the return value from 1050 a call. */ 1051 set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call); 1052 set_gdbarch_return_value (gdbarch, rx_return_value); 1053 1054 /* Virtual tables. */ 1055 set_gdbarch_vbit_in_delta (gdbarch, 1); 1056 1057 return gdbarch; 1058 } 1059 1060 /* Register the above initialization routine. */ 1061 1062 void _initialize_rx_tdep (); 1063 void 1064 _initialize_rx_tdep () 1065 { 1066 gdbarch_register (bfd_arch_rx, rx_gdbarch_init); 1067 initialize_tdesc_rx (); 1068 } 1069