1 /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. 2 3 Copyright (C) 1996-2023 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20 #include "defs.h" 21 #include "arch-utils.h" 22 #include "dis-asm.h" 23 #include "gdbtypes.h" 24 #include "regcache.h" 25 #include "gdbcore.h" /* For write_memory_unsigned_integer. */ 26 #include "value.h" 27 #include "frame.h" 28 #include "frame-unwind.h" 29 #include "frame-base.h" 30 #include "symtab.h" 31 #include "dwarf2/frame.h" 32 #include "osabi.h" 33 #include "infcall.h" 34 #include "prologue-value.h" 35 #include "target.h" 36 37 #include "mn10300-tdep.h" 38 39 40 /* The am33-2 has 64 registers. */ 41 #define MN10300_MAX_NUM_REGS 64 42 43 /* Big enough to hold the size of the largest register in bytes. */ 44 #define MN10300_MAX_REGISTER_SIZE 64 45 46 /* This structure holds the results of a prologue analysis. */ 47 struct mn10300_prologue 48 { 49 /* The architecture for which we generated this prologue info. */ 50 struct gdbarch *gdbarch; 51 52 /* The offset from the frame base to the stack pointer --- always 53 zero or negative. 54 55 Calling this a "size" is a bit misleading, but given that the 56 stack grows downwards, using offsets for everything keeps one 57 from going completely sign-crazy: you never change anything's 58 sign for an ADD instruction; always change the second operand's 59 sign for a SUB instruction; and everything takes care of 60 itself. */ 61 int frame_size; 62 63 /* Non-zero if this function has initialized the frame pointer from 64 the stack pointer, zero otherwise. */ 65 int has_frame_ptr; 66 67 /* If has_frame_ptr is non-zero, this is the offset from the frame 68 base to where the frame pointer points. This is always zero or 69 negative. */ 70 int frame_ptr_offset; 71 72 /* The address of the first instruction at which the frame has been 73 set up and the arguments are where the debug info says they are 74 --- as best as we can tell. */ 75 CORE_ADDR prologue_end; 76 77 /* reg_offset[R] is the offset from the CFA at which register R is 78 saved, or 1 if register R has not been saved. (Real values are 79 always zero or negative.) */ 80 int reg_offset[MN10300_MAX_NUM_REGS]; 81 }; 82 83 84 /* Compute the alignment required by a type. */ 85 86 static int 87 mn10300_type_align (struct type *type) 88 { 89 int i, align = 1; 90 91 switch (type->code ()) 92 { 93 case TYPE_CODE_INT: 94 case TYPE_CODE_ENUM: 95 case TYPE_CODE_SET: 96 case TYPE_CODE_RANGE: 97 case TYPE_CODE_CHAR: 98 case TYPE_CODE_BOOL: 99 case TYPE_CODE_FLT: 100 case TYPE_CODE_PTR: 101 case TYPE_CODE_REF: 102 case TYPE_CODE_RVALUE_REF: 103 return type->length (); 104 105 case TYPE_CODE_COMPLEX: 106 return type->length () / 2; 107 108 case TYPE_CODE_STRUCT: 109 case TYPE_CODE_UNION: 110 for (i = 0; i < type->num_fields (); i++) 111 { 112 int falign = mn10300_type_align (type->field (i).type ()); 113 while (align < falign) 114 align <<= 1; 115 } 116 return align; 117 118 case TYPE_CODE_ARRAY: 119 /* HACK! Structures containing arrays, even small ones, are not 120 eligible for returning in registers. */ 121 return 256; 122 123 case TYPE_CODE_TYPEDEF: 124 return mn10300_type_align (check_typedef (type)); 125 126 default: 127 internal_error (_("bad switch")); 128 } 129 } 130 131 /* Should call_function allocate stack space for a struct return? */ 132 static int 133 mn10300_use_struct_convention (struct type *type) 134 { 135 /* Structures bigger than a pair of words can't be returned in 136 registers. */ 137 if (type->length () > 8) 138 return 1; 139 140 switch (type->code ()) 141 { 142 case TYPE_CODE_STRUCT: 143 case TYPE_CODE_UNION: 144 /* Structures with a single field are handled as the field 145 itself. */ 146 if (type->num_fields () == 1) 147 return mn10300_use_struct_convention (type->field (0).type ()); 148 149 /* Structures with word or double-word size are passed in memory, as 150 long as they require at least word alignment. */ 151 if (mn10300_type_align (type) >= 4) 152 return 0; 153 154 return 1; 155 156 /* Arrays are addressable, so they're never returned in 157 registers. This condition can only hold when the array is 158 the only field of a struct or union. */ 159 case TYPE_CODE_ARRAY: 160 return 1; 161 162 case TYPE_CODE_TYPEDEF: 163 return mn10300_use_struct_convention (check_typedef (type)); 164 165 default: 166 return 0; 167 } 168 } 169 170 static void 171 mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, 172 struct regcache *regcache, const gdb_byte *valbuf) 173 { 174 int len = type->length (); 175 int reg, regsz; 176 177 if (type->code () == TYPE_CODE_PTR) 178 reg = 4; 179 else 180 reg = 0; 181 182 regsz = register_size (gdbarch, reg); 183 184 if (len <= regsz) 185 regcache->raw_write_part (reg, 0, len, valbuf); 186 else if (len <= 2 * regsz) 187 { 188 regcache->raw_write (reg, valbuf); 189 gdb_assert (regsz == register_size (gdbarch, reg + 1)); 190 regcache->raw_write_part (reg + 1, 0, len - regsz, valbuf + regsz); 191 } 192 else 193 internal_error (_("Cannot store return value %d bytes long."), len); 194 } 195 196 static void 197 mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, 198 struct regcache *regcache, void *valbuf) 199 { 200 gdb_byte buf[MN10300_MAX_REGISTER_SIZE]; 201 int len = type->length (); 202 int reg, regsz; 203 204 if (type->code () == TYPE_CODE_PTR) 205 reg = 4; 206 else 207 reg = 0; 208 209 regsz = register_size (gdbarch, reg); 210 gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE); 211 if (len <= regsz) 212 { 213 regcache->raw_read (reg, buf); 214 memcpy (valbuf, buf, len); 215 } 216 else if (len <= 2 * regsz) 217 { 218 regcache->raw_read (reg, buf); 219 memcpy (valbuf, buf, regsz); 220 gdb_assert (regsz == register_size (gdbarch, reg + 1)); 221 regcache->raw_read (reg + 1, buf); 222 memcpy ((char *) valbuf + regsz, buf, len - regsz); 223 } 224 else 225 internal_error (_("Cannot extract return value %d bytes long."), len); 226 } 227 228 /* Determine, for architecture GDBARCH, how a return value of TYPE 229 should be returned. If it is supposed to be returned in registers, 230 and READBUF is non-zero, read the appropriate value from REGCACHE, 231 and copy it into READBUF. If WRITEBUF is non-zero, write the value 232 from WRITEBUF into REGCACHE. */ 233 234 static enum return_value_convention 235 mn10300_return_value (struct gdbarch *gdbarch, struct value *function, 236 struct type *type, struct regcache *regcache, 237 gdb_byte *readbuf, const gdb_byte *writebuf) 238 { 239 if (mn10300_use_struct_convention (type)) 240 return RETURN_VALUE_STRUCT_CONVENTION; 241 242 if (readbuf) 243 mn10300_extract_return_value (gdbarch, type, regcache, readbuf); 244 if (writebuf) 245 mn10300_store_return_value (gdbarch, type, regcache, writebuf); 246 247 return RETURN_VALUE_REGISTER_CONVENTION; 248 } 249 250 static const char * 251 register_name (int reg, const char **regs, long num_regs) 252 { 253 gdb_assert (reg < num_regs); 254 return regs[reg]; 255 } 256 257 static const char * 258 mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) 259 { 260 static const char *regs[] = 261 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 262 "sp", "pc", "mdr", "psw", "lir", "lar", "", "", 263 "", "", "", "", "", "", "", "", 264 "", "", "", "", "", "", "", "fp" 265 }; 266 return register_name (reg, regs, ARRAY_SIZE (regs)); 267 } 268 269 270 static const char * 271 am33_register_name (struct gdbarch *gdbarch, int reg) 272 { 273 static const char *regs[] = 274 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 275 "sp", "pc", "mdr", "psw", "lir", "lar", "", 276 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 277 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" 278 }; 279 return register_name (reg, regs, ARRAY_SIZE (regs)); 280 } 281 282 static const char * 283 am33_2_register_name (struct gdbarch *gdbarch, int reg) 284 { 285 static const char *regs[] = 286 { 287 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", 288 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", 289 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", 290 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", 291 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", 292 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", 293 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", 294 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" 295 }; 296 return register_name (reg, regs, ARRAY_SIZE (regs)); 297 } 298 299 static struct type * 300 mn10300_register_type (struct gdbarch *gdbarch, int reg) 301 { 302 return builtin_type (gdbarch)->builtin_int; 303 } 304 305 /* The breakpoint instruction must be the same size as the smallest 306 instruction in the instruction set. 307 308 The Matsushita mn10x00 processors have single byte instructions 309 so we need a single byte breakpoint. Matsushita hasn't defined 310 one, so we defined it ourselves. */ 311 constexpr gdb_byte mn10300_break_insn[] = {0xff}; 312 313 typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint; 314 315 /* Model the semantics of pushing a register onto the stack. This 316 is a helper function for mn10300_analyze_prologue, below. */ 317 static void 318 push_reg (pv_t *regs, struct pv_area *stack, int regnum) 319 { 320 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); 321 stack->store (regs[E_SP_REGNUM], 4, regs[regnum]); 322 } 323 324 /* Translate an "r" register number extracted from an instruction encoding 325 into a GDB register number. Adapted from a simulator function 326 of the same name; see am33.igen. */ 327 static int 328 translate_rreg (int rreg) 329 { 330 /* The higher register numbers actually correspond to the 331 basic machine's address and data registers. */ 332 if (rreg > 7 && rreg < 12) 333 return E_A0_REGNUM + rreg - 8; 334 else if (rreg > 11 && rreg < 16) 335 return E_D0_REGNUM + rreg - 12; 336 else 337 return E_E0_REGNUM + rreg; 338 } 339 340 /* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan. 341 342 If VALUE is a saved register, ADDR says it was saved at a constant 343 offset from the frame base, and SIZE indicates that the whole 344 register was saved, record its offset in RESULT_UNTYPED. */ 345 static void 346 check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) 347 { 348 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; 349 350 if (value.kind == pvk_register 351 && value.k == 0 352 && pv_is_register (addr, E_SP_REGNUM) 353 && size == register_size (result->gdbarch, value.reg)) 354 result->reg_offset[value.reg] = addr.k; 355 } 356 357 /* Analyze the prologue to determine where registers are saved, 358 the end of the prologue, etc. The result of this analysis is 359 returned in RESULT. See struct mn10300_prologue above for more 360 information. */ 361 static void 362 mn10300_analyze_prologue (struct gdbarch *gdbarch, 363 CORE_ADDR start_pc, CORE_ADDR limit_pc, 364 struct mn10300_prologue *result) 365 { 366 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 367 CORE_ADDR pc; 368 int rn; 369 pv_t regs[MN10300_MAX_NUM_REGS]; 370 CORE_ADDR after_last_frame_setup_insn = start_pc; 371 int am33_mode = get_am33_mode (gdbarch); 372 373 memset (result, 0, sizeof (*result)); 374 result->gdbarch = gdbarch; 375 376 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) 377 { 378 regs[rn] = pv_register (rn, 0); 379 result->reg_offset[rn] = 1; 380 } 381 pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch)); 382 383 /* The typical call instruction will have saved the return address on the 384 stack. Space for the return address has already been preallocated in 385 the caller's frame. It's possible, such as when using -mrelax with gcc 386 that other registers were saved as well. If this happens, we really 387 have no chance of deciphering the frame. DWARF info can save the day 388 when this happens. */ 389 stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); 390 391 pc = start_pc; 392 while (pc < limit_pc) 393 { 394 int status; 395 gdb_byte instr[2]; 396 397 /* Instructions can be as small as one byte; however, we usually 398 need at least two bytes to do the decoding, so fetch that many 399 to begin with. */ 400 status = target_read_memory (pc, instr, 2); 401 if (status != 0) 402 break; 403 404 /* movm [regs], sp */ 405 if (instr[0] == 0xcf) 406 { 407 gdb_byte save_mask; 408 409 save_mask = instr[1]; 410 411 if ((save_mask & movm_exreg0_bit) && am33_mode) 412 { 413 push_reg (regs, &stack, E_E2_REGNUM); 414 push_reg (regs, &stack, E_E3_REGNUM); 415 } 416 if ((save_mask & movm_exreg1_bit) && am33_mode) 417 { 418 push_reg (regs, &stack, E_E4_REGNUM); 419 push_reg (regs, &stack, E_E5_REGNUM); 420 push_reg (regs, &stack, E_E6_REGNUM); 421 push_reg (regs, &stack, E_E7_REGNUM); 422 } 423 if ((save_mask & movm_exother_bit) && am33_mode) 424 { 425 push_reg (regs, &stack, E_E0_REGNUM); 426 push_reg (regs, &stack, E_E1_REGNUM); 427 push_reg (regs, &stack, E_MDRQ_REGNUM); 428 push_reg (regs, &stack, E_MCRH_REGNUM); 429 push_reg (regs, &stack, E_MCRL_REGNUM); 430 push_reg (regs, &stack, E_MCVF_REGNUM); 431 } 432 if (save_mask & movm_d2_bit) 433 push_reg (regs, &stack, E_D2_REGNUM); 434 if (save_mask & movm_d3_bit) 435 push_reg (regs, &stack, E_D3_REGNUM); 436 if (save_mask & movm_a2_bit) 437 push_reg (regs, &stack, E_A2_REGNUM); 438 if (save_mask & movm_a3_bit) 439 push_reg (regs, &stack, E_A3_REGNUM); 440 if (save_mask & movm_other_bit) 441 { 442 push_reg (regs, &stack, E_D0_REGNUM); 443 push_reg (regs, &stack, E_D1_REGNUM); 444 push_reg (regs, &stack, E_A0_REGNUM); 445 push_reg (regs, &stack, E_A1_REGNUM); 446 push_reg (regs, &stack, E_MDR_REGNUM); 447 push_reg (regs, &stack, E_LIR_REGNUM); 448 push_reg (regs, &stack, E_LAR_REGNUM); 449 /* The `other' bit leaves a blank area of four bytes at 450 the beginning of its block of saved registers, making 451 it 32 bytes long in total. */ 452 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); 453 } 454 455 pc += 2; 456 after_last_frame_setup_insn = pc; 457 } 458 /* mov sp, aN */ 459 else if ((instr[0] & 0xfc) == 0x3c) 460 { 461 int aN = instr[0] & 0x03; 462 463 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; 464 465 pc += 1; 466 if (aN == 3) 467 after_last_frame_setup_insn = pc; 468 } 469 /* mov aM, aN */ 470 else if ((instr[0] & 0xf0) == 0x90 471 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) 472 { 473 int aN = instr[0] & 0x03; 474 int aM = (instr[0] & 0x0c) >> 2; 475 476 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; 477 478 pc += 1; 479 } 480 /* mov dM, dN */ 481 else if ((instr[0] & 0xf0) == 0x80 482 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) 483 { 484 int dN = instr[0] & 0x03; 485 int dM = (instr[0] & 0x0c) >> 2; 486 487 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; 488 489 pc += 1; 490 } 491 /* mov aM, dN */ 492 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) 493 { 494 int dN = instr[1] & 0x03; 495 int aM = (instr[1] & 0x0c) >> 2; 496 497 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; 498 499 pc += 2; 500 } 501 /* mov dM, aN */ 502 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) 503 { 504 int aN = instr[1] & 0x03; 505 int dM = (instr[1] & 0x0c) >> 2; 506 507 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; 508 509 pc += 2; 510 } 511 /* add imm8, SP */ 512 else if (instr[0] == 0xf8 && instr[1] == 0xfe) 513 { 514 gdb_byte buf[1]; 515 LONGEST imm8; 516 517 518 status = target_read_memory (pc + 2, buf, 1); 519 if (status != 0) 520 break; 521 522 imm8 = extract_signed_integer (buf, 1, byte_order); 523 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); 524 525 pc += 3; 526 /* Stack pointer adjustments are frame related. */ 527 after_last_frame_setup_insn = pc; 528 } 529 /* add imm16, SP */ 530 else if (instr[0] == 0xfa && instr[1] == 0xfe) 531 { 532 gdb_byte buf[2]; 533 LONGEST imm16; 534 535 status = target_read_memory (pc + 2, buf, 2); 536 if (status != 0) 537 break; 538 539 imm16 = extract_signed_integer (buf, 2, byte_order); 540 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); 541 542 pc += 4; 543 /* Stack pointer adjustments are frame related. */ 544 after_last_frame_setup_insn = pc; 545 } 546 /* add imm32, SP */ 547 else if (instr[0] == 0xfc && instr[1] == 0xfe) 548 { 549 gdb_byte buf[4]; 550 LONGEST imm32; 551 552 status = target_read_memory (pc + 2, buf, 4); 553 if (status != 0) 554 break; 555 556 557 imm32 = extract_signed_integer (buf, 4, byte_order); 558 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); 559 560 pc += 6; 561 /* Stack pointer adjustments are frame related. */ 562 after_last_frame_setup_insn = pc; 563 } 564 /* add imm8, aN */ 565 else if ((instr[0] & 0xfc) == 0x20) 566 { 567 int aN; 568 LONGEST imm8; 569 570 aN = instr[0] & 0x03; 571 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 572 573 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 574 imm8); 575 576 pc += 2; 577 } 578 /* add imm16, aN */ 579 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) 580 { 581 int aN; 582 LONGEST imm16; 583 gdb_byte buf[2]; 584 585 aN = instr[1] & 0x03; 586 587 status = target_read_memory (pc + 2, buf, 2); 588 if (status != 0) 589 break; 590 591 592 imm16 = extract_signed_integer (buf, 2, byte_order); 593 594 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 595 imm16); 596 597 pc += 4; 598 } 599 /* add imm32, aN */ 600 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) 601 { 602 int aN; 603 LONGEST imm32; 604 gdb_byte buf[4]; 605 606 aN = instr[1] & 0x03; 607 608 status = target_read_memory (pc + 2, buf, 4); 609 if (status != 0) 610 break; 611 612 imm32 = extract_signed_integer (buf, 2, byte_order); 613 614 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], 615 imm32); 616 pc += 6; 617 } 618 /* fmov fsM, (rN) */ 619 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) 620 { 621 int fsM, sM, Y, rN; 622 gdb_byte buf[1]; 623 624 Y = (instr[1] & 0x02) >> 1; 625 626 status = target_read_memory (pc + 2, buf, 1); 627 if (status != 0) 628 break; 629 630 sM = (buf[0] & 0xf0) >> 4; 631 rN = buf[0] & 0x0f; 632 fsM = (Y << 4) | sM; 633 634 stack.store (regs[translate_rreg (rN)], 4, 635 regs[E_FS0_REGNUM + fsM]); 636 637 pc += 3; 638 } 639 /* fmov fsM, (sp) */ 640 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) 641 { 642 int fsM, sM, Y; 643 gdb_byte buf[1]; 644 645 Y = (instr[1] & 0x02) >> 1; 646 647 status = target_read_memory (pc + 2, buf, 1); 648 if (status != 0) 649 break; 650 651 sM = (buf[0] & 0xf0) >> 4; 652 fsM = (Y << 4) | sM; 653 654 stack.store (regs[E_SP_REGNUM], 4, 655 regs[E_FS0_REGNUM + fsM]); 656 657 pc += 3; 658 } 659 /* fmov fsM, (rN, rI) */ 660 else if (instr[0] == 0xfb && instr[1] == 0x37) 661 { 662 int fsM, sM, Z, rN, rI; 663 gdb_byte buf[2]; 664 665 666 status = target_read_memory (pc + 2, buf, 2); 667 if (status != 0) 668 break; 669 670 rI = (buf[0] & 0xf0) >> 4; 671 rN = buf[0] & 0x0f; 672 sM = (buf[1] & 0xf0) >> 4; 673 Z = (buf[1] & 0x02) >> 1; 674 fsM = (Z << 4) | sM; 675 676 stack.store (pv_add (regs[translate_rreg (rN)], 677 regs[translate_rreg (rI)]), 678 4, regs[E_FS0_REGNUM + fsM]); 679 680 pc += 4; 681 } 682 /* fmov fsM, (d8, rN) */ 683 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) 684 { 685 int fsM, sM, Y, rN; 686 LONGEST d8; 687 gdb_byte buf[2]; 688 689 Y = (instr[1] & 0x02) >> 1; 690 691 status = target_read_memory (pc + 2, buf, 2); 692 if (status != 0) 693 break; 694 695 sM = (buf[0] & 0xf0) >> 4; 696 rN = buf[0] & 0x0f; 697 fsM = (Y << 4) | sM; 698 d8 = extract_signed_integer (&buf[1], 1, byte_order); 699 700 stack.store (pv_add_constant (regs[translate_rreg (rN)], d8), 701 4, regs[E_FS0_REGNUM + fsM]); 702 703 pc += 4; 704 } 705 /* fmov fsM, (d24, rN) */ 706 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) 707 { 708 int fsM, sM, Y, rN; 709 LONGEST d24; 710 gdb_byte buf[4]; 711 712 Y = (instr[1] & 0x02) >> 1; 713 714 status = target_read_memory (pc + 2, buf, 4); 715 if (status != 0) 716 break; 717 718 sM = (buf[0] & 0xf0) >> 4; 719 rN = buf[0] & 0x0f; 720 fsM = (Y << 4) | sM; 721 d24 = extract_signed_integer (&buf[1], 3, byte_order); 722 723 stack.store (pv_add_constant (regs[translate_rreg (rN)], d24), 724 4, regs[E_FS0_REGNUM + fsM]); 725 726 pc += 6; 727 } 728 /* fmov fsM, (d32, rN) */ 729 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) 730 { 731 int fsM, sM, Y, rN; 732 LONGEST d32; 733 gdb_byte buf[5]; 734 735 Y = (instr[1] & 0x02) >> 1; 736 737 status = target_read_memory (pc + 2, buf, 5); 738 if (status != 0) 739 break; 740 741 sM = (buf[0] & 0xf0) >> 4; 742 rN = buf[0] & 0x0f; 743 fsM = (Y << 4) | sM; 744 d32 = extract_signed_integer (&buf[1], 4, byte_order); 745 746 stack.store (pv_add_constant (regs[translate_rreg (rN)], d32), 747 4, regs[E_FS0_REGNUM + fsM]); 748 749 pc += 7; 750 } 751 /* fmov fsM, (d8, SP) */ 752 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) 753 { 754 int fsM, sM, Y; 755 LONGEST d8; 756 gdb_byte buf[2]; 757 758 Y = (instr[1] & 0x02) >> 1; 759 760 status = target_read_memory (pc + 2, buf, 2); 761 if (status != 0) 762 break; 763 764 sM = (buf[0] & 0xf0) >> 4; 765 fsM = (Y << 4) | sM; 766 d8 = extract_signed_integer (&buf[1], 1, byte_order); 767 768 stack.store (pv_add_constant (regs[E_SP_REGNUM], d8), 769 4, regs[E_FS0_REGNUM + fsM]); 770 771 pc += 4; 772 } 773 /* fmov fsM, (d24, SP) */ 774 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) 775 { 776 int fsM, sM, Y; 777 LONGEST d24; 778 gdb_byte buf[4]; 779 780 Y = (instr[1] & 0x02) >> 1; 781 782 status = target_read_memory (pc + 2, buf, 4); 783 if (status != 0) 784 break; 785 786 sM = (buf[0] & 0xf0) >> 4; 787 fsM = (Y << 4) | sM; 788 d24 = extract_signed_integer (&buf[1], 3, byte_order); 789 790 stack.store (pv_add_constant (regs[E_SP_REGNUM], d24), 791 4, regs[E_FS0_REGNUM + fsM]); 792 793 pc += 6; 794 } 795 /* fmov fsM, (d32, SP) */ 796 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) 797 { 798 int fsM, sM, Y; 799 LONGEST d32; 800 gdb_byte buf[5]; 801 802 Y = (instr[1] & 0x02) >> 1; 803 804 status = target_read_memory (pc + 2, buf, 5); 805 if (status != 0) 806 break; 807 808 sM = (buf[0] & 0xf0) >> 4; 809 fsM = (Y << 4) | sM; 810 d32 = extract_signed_integer (&buf[1], 4, byte_order); 811 812 stack.store (pv_add_constant (regs[E_SP_REGNUM], d32), 813 4, regs[E_FS0_REGNUM + fsM]); 814 815 pc += 7; 816 } 817 /* fmov fsM, (rN+) */ 818 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) 819 { 820 int fsM, sM, Y, rN, rN_regnum; 821 gdb_byte buf[1]; 822 823 Y = (instr[1] & 0x02) >> 1; 824 825 status = target_read_memory (pc + 2, buf, 1); 826 if (status != 0) 827 break; 828 829 sM = (buf[0] & 0xf0) >> 4; 830 rN = buf[0] & 0x0f; 831 fsM = (Y << 4) | sM; 832 833 rN_regnum = translate_rreg (rN); 834 835 stack.store (regs[rN_regnum], 4, 836 regs[E_FS0_REGNUM + fsM]); 837 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); 838 839 pc += 3; 840 } 841 /* fmov fsM, (rN+, imm8) */ 842 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) 843 { 844 int fsM, sM, Y, rN, rN_regnum; 845 LONGEST imm8; 846 gdb_byte buf[2]; 847 848 Y = (instr[1] & 0x02) >> 1; 849 850 status = target_read_memory (pc + 2, buf, 2); 851 if (status != 0) 852 break; 853 854 sM = (buf[0] & 0xf0) >> 4; 855 rN = buf[0] & 0x0f; 856 fsM = (Y << 4) | sM; 857 imm8 = extract_signed_integer (&buf[1], 1, byte_order); 858 859 rN_regnum = translate_rreg (rN); 860 861 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 862 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); 863 864 pc += 4; 865 } 866 /* fmov fsM, (rN+, imm24) */ 867 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) 868 { 869 int fsM, sM, Y, rN, rN_regnum; 870 LONGEST imm24; 871 gdb_byte buf[4]; 872 873 Y = (instr[1] & 0x02) >> 1; 874 875 status = target_read_memory (pc + 2, buf, 4); 876 if (status != 0) 877 break; 878 879 sM = (buf[0] & 0xf0) >> 4; 880 rN = buf[0] & 0x0f; 881 fsM = (Y << 4) | sM; 882 imm24 = extract_signed_integer (&buf[1], 3, byte_order); 883 884 rN_regnum = translate_rreg (rN); 885 886 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 887 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); 888 889 pc += 6; 890 } 891 /* fmov fsM, (rN+, imm32) */ 892 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) 893 { 894 int fsM, sM, Y, rN, rN_regnum; 895 LONGEST imm32; 896 gdb_byte buf[5]; 897 898 Y = (instr[1] & 0x02) >> 1; 899 900 status = target_read_memory (pc + 2, buf, 5); 901 if (status != 0) 902 break; 903 904 sM = (buf[0] & 0xf0) >> 4; 905 rN = buf[0] & 0x0f; 906 fsM = (Y << 4) | sM; 907 imm32 = extract_signed_integer (&buf[1], 4, byte_order); 908 909 rN_regnum = translate_rreg (rN); 910 911 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); 912 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); 913 914 pc += 7; 915 } 916 /* mov imm8, aN */ 917 else if ((instr[0] & 0xf0) == 0x90) 918 { 919 int aN = instr[0] & 0x03; 920 LONGEST imm8; 921 922 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 923 924 regs[E_A0_REGNUM + aN] = pv_constant (imm8); 925 pc += 2; 926 } 927 /* mov imm16, aN */ 928 else if ((instr[0] & 0xfc) == 0x24) 929 { 930 int aN = instr[0] & 0x03; 931 gdb_byte buf[2]; 932 LONGEST imm16; 933 934 status = target_read_memory (pc + 1, buf, 2); 935 if (status != 0) 936 break; 937 938 imm16 = extract_signed_integer (buf, 2, byte_order); 939 regs[E_A0_REGNUM + aN] = pv_constant (imm16); 940 pc += 3; 941 } 942 /* mov imm32, aN */ 943 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) 944 { 945 int aN = instr[1] & 0x03; 946 gdb_byte buf[4]; 947 LONGEST imm32; 948 949 status = target_read_memory (pc + 2, buf, 4); 950 if (status != 0) 951 break; 952 953 imm32 = extract_signed_integer (buf, 4, byte_order); 954 regs[E_A0_REGNUM + aN] = pv_constant (imm32); 955 pc += 6; 956 } 957 /* mov imm8, dN */ 958 else if ((instr[0] & 0xf0) == 0x80) 959 { 960 int dN = instr[0] & 0x03; 961 LONGEST imm8; 962 963 imm8 = extract_signed_integer (&instr[1], 1, byte_order); 964 965 regs[E_D0_REGNUM + dN] = pv_constant (imm8); 966 pc += 2; 967 } 968 /* mov imm16, dN */ 969 else if ((instr[0] & 0xfc) == 0x2c) 970 { 971 int dN = instr[0] & 0x03; 972 gdb_byte buf[2]; 973 LONGEST imm16; 974 975 status = target_read_memory (pc + 1, buf, 2); 976 if (status != 0) 977 break; 978 979 imm16 = extract_signed_integer (buf, 2, byte_order); 980 regs[E_D0_REGNUM + dN] = pv_constant (imm16); 981 pc += 3; 982 } 983 /* mov imm32, dN */ 984 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) 985 { 986 int dN = instr[1] & 0x03; 987 gdb_byte buf[4]; 988 LONGEST imm32; 989 990 status = target_read_memory (pc + 2, buf, 4); 991 if (status != 0) 992 break; 993 994 imm32 = extract_signed_integer (buf, 4, byte_order); 995 regs[E_D0_REGNUM + dN] = pv_constant (imm32); 996 pc += 6; 997 } 998 else 999 { 1000 /* We've hit some instruction that we don't recognize. Hopefully, 1001 we have enough to do prologue analysis. */ 1002 break; 1003 } 1004 } 1005 1006 /* Is the frame size (offset, really) a known constant? */ 1007 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) 1008 result->frame_size = regs[E_SP_REGNUM].k; 1009 1010 /* Was the frame pointer initialized? */ 1011 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) 1012 { 1013 result->has_frame_ptr = 1; 1014 result->frame_ptr_offset = regs[E_A3_REGNUM].k; 1015 } 1016 1017 /* Record where all the registers were saved. */ 1018 stack.scan (check_for_saved, (void *) result); 1019 1020 result->prologue_end = after_last_frame_setup_insn; 1021 } 1022 1023 /* Function: skip_prologue 1024 Return the address of the first inst past the prologue of the function. */ 1025 1026 static CORE_ADDR 1027 mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) 1028 { 1029 const char *name; 1030 CORE_ADDR func_addr, func_end; 1031 struct mn10300_prologue p; 1032 1033 /* Try to find the extent of the function that contains PC. */ 1034 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) 1035 return pc; 1036 1037 mn10300_analyze_prologue (gdbarch, pc, func_end, &p); 1038 return p.prologue_end; 1039 } 1040 1041 /* Wrapper for mn10300_analyze_prologue: find the function start; 1042 use the current frame PC as the limit, then 1043 invoke mn10300_analyze_prologue and return its result. */ 1044 static struct mn10300_prologue * 1045 mn10300_analyze_frame_prologue (frame_info_ptr this_frame, 1046 void **this_prologue_cache) 1047 { 1048 if (!*this_prologue_cache) 1049 { 1050 CORE_ADDR func_start, stop_addr; 1051 1052 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); 1053 1054 func_start = get_frame_func (this_frame); 1055 stop_addr = get_frame_pc (this_frame); 1056 1057 /* If we couldn't find any function containing the PC, then 1058 just initialize the prologue cache, but don't do anything. */ 1059 if (!func_start) 1060 stop_addr = func_start; 1061 1062 mn10300_analyze_prologue (get_frame_arch (this_frame), 1063 func_start, stop_addr, 1064 ((struct mn10300_prologue *) 1065 *this_prologue_cache)); 1066 } 1067 1068 return (struct mn10300_prologue *) *this_prologue_cache; 1069 } 1070 1071 /* Given the next frame and a prologue cache, return this frame's 1072 base. */ 1073 static CORE_ADDR 1074 mn10300_frame_base (frame_info_ptr this_frame, void **this_prologue_cache) 1075 { 1076 struct mn10300_prologue *p 1077 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); 1078 1079 /* In functions that use alloca, the distance between the stack 1080 pointer and the frame base varies dynamically, so we can't use 1081 the SP plus static information like prologue analysis to find the 1082 frame base. However, such functions must have a frame pointer, 1083 to be able to restore the SP on exit. So whenever we do have a 1084 frame pointer, use that to find the base. */ 1085 if (p->has_frame_ptr) 1086 { 1087 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); 1088 return fp - p->frame_ptr_offset; 1089 } 1090 else 1091 { 1092 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); 1093 return sp - p->frame_size; 1094 } 1095 } 1096 1097 static void 1098 mn10300_frame_this_id (frame_info_ptr this_frame, 1099 void **this_prologue_cache, 1100 struct frame_id *this_id) 1101 { 1102 *this_id = frame_id_build (mn10300_frame_base (this_frame, 1103 this_prologue_cache), 1104 get_frame_func (this_frame)); 1105 1106 } 1107 1108 static struct value * 1109 mn10300_frame_prev_register (frame_info_ptr this_frame, 1110 void **this_prologue_cache, int regnum) 1111 { 1112 struct mn10300_prologue *p 1113 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); 1114 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); 1115 1116 if (regnum == E_SP_REGNUM) 1117 return frame_unwind_got_constant (this_frame, regnum, frame_base); 1118 1119 /* If prologue analysis says we saved this register somewhere, 1120 return a description of the stack slot holding it. */ 1121 if (p->reg_offset[regnum] != 1) 1122 return frame_unwind_got_memory (this_frame, regnum, 1123 frame_base + p->reg_offset[regnum]); 1124 1125 /* Otherwise, presume we haven't changed the value of this 1126 register, and get it from the next frame. */ 1127 return frame_unwind_got_register (this_frame, regnum, regnum); 1128 } 1129 1130 static const struct frame_unwind mn10300_frame_unwind = { 1131 "mn10300 prologue", 1132 NORMAL_FRAME, 1133 default_frame_unwind_stop_reason, 1134 mn10300_frame_this_id, 1135 mn10300_frame_prev_register, 1136 NULL, 1137 default_frame_sniffer 1138 }; 1139 1140 static void 1141 mn10300_frame_unwind_init (struct gdbarch *gdbarch) 1142 { 1143 dwarf2_append_unwinders (gdbarch); 1144 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); 1145 } 1146 1147 /* Function: push_dummy_call 1148 * 1149 * Set up machine state for a target call, including 1150 * function arguments, stack, return address, etc. 1151 * 1152 */ 1153 1154 static CORE_ADDR 1155 mn10300_push_dummy_call (struct gdbarch *gdbarch, 1156 struct value *target_func, 1157 struct regcache *regcache, 1158 CORE_ADDR bp_addr, 1159 int nargs, struct value **args, 1160 CORE_ADDR sp, 1161 function_call_return_method return_method, 1162 CORE_ADDR struct_addr) 1163 { 1164 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); 1165 const int push_size = register_size (gdbarch, E_PC_REGNUM); 1166 int regs_used; 1167 int len, arg_len; 1168 int stack_offset = 0; 1169 int argnum; 1170 const gdb_byte *val; 1171 gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE]; 1172 1173 /* This should be a nop, but align the stack just in case something 1174 went wrong. Stacks are four byte aligned on the mn10300. */ 1175 sp &= ~3; 1176 1177 /* Now make space on the stack for the args. 1178 1179 XXX This doesn't appear to handle pass-by-invisible reference 1180 arguments. */ 1181 regs_used = (return_method == return_method_struct) ? 1 : 0; 1182 for (len = 0, argnum = 0; argnum < nargs; argnum++) 1183 { 1184 arg_len = (value_type (args[argnum])->length () + 3) & ~3; 1185 while (regs_used < 2 && arg_len > 0) 1186 { 1187 regs_used++; 1188 arg_len -= push_size; 1189 } 1190 len += arg_len; 1191 } 1192 1193 /* Allocate stack space. */ 1194 sp -= len; 1195 1196 if (return_method == return_method_struct) 1197 { 1198 regs_used = 1; 1199 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); 1200 } 1201 else 1202 regs_used = 0; 1203 1204 /* Push all arguments onto the stack. */ 1205 for (argnum = 0; argnum < nargs; argnum++) 1206 { 1207 /* FIXME what about structs? Unions? */ 1208 if (value_type (*args)->code () == TYPE_CODE_STRUCT 1209 && value_type (*args)->length () > 8) 1210 { 1211 /* Change to pointer-to-type. */ 1212 arg_len = push_size; 1213 gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE); 1214 store_unsigned_integer (valbuf, push_size, byte_order, 1215 value_address (*args)); 1216 val = &valbuf[0]; 1217 } 1218 else 1219 { 1220 arg_len = value_type (*args)->length (); 1221 val = value_contents (*args).data (); 1222 } 1223 1224 while (regs_used < 2 && arg_len > 0) 1225 { 1226 regcache_cooked_write_unsigned (regcache, regs_used, 1227 extract_unsigned_integer (val, push_size, byte_order)); 1228 val += push_size; 1229 arg_len -= push_size; 1230 regs_used++; 1231 } 1232 1233 while (arg_len > 0) 1234 { 1235 write_memory (sp + stack_offset, val, push_size); 1236 arg_len -= push_size; 1237 val += push_size; 1238 stack_offset += push_size; 1239 } 1240 1241 args++; 1242 } 1243 1244 /* Make space for the flushback area. */ 1245 sp -= 8; 1246 1247 /* Push the return address that contains the magic breakpoint. */ 1248 sp -= 4; 1249 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr); 1250 1251 /* The CPU also writes the return address always into the 1252 MDR register on "call". */ 1253 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); 1254 1255 /* Update $sp. */ 1256 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); 1257 1258 /* On the mn10300, it's possible to move some of the stack adjustment 1259 and saving of the caller-save registers out of the prologue and 1260 into the call sites. (When using gcc, this optimization can 1261 occur when using the -mrelax switch.) If this occurs, the dwarf2 1262 info will reflect this fact. We can test to see if this is the 1263 case by creating a new frame using the current stack pointer and 1264 the address of the function that we're about to call. We then 1265 unwind SP and see if it's different than the SP of our newly 1266 created frame. If the SP values are the same, the caller is not 1267 expected to allocate any additional stack. On the other hand, if 1268 the SP values are different, the difference determines the 1269 additional stack that must be allocated. 1270 1271 Note that we don't update the return value though because that's 1272 the value of the stack just after pushing the arguments, but prior 1273 to performing the call. This value is needed in order to 1274 construct the frame ID of the dummy call. */ 1275 { 1276 CORE_ADDR func_addr = find_function_addr (target_func, NULL); 1277 CORE_ADDR unwound_sp 1278 = gdbarch_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); 1279 if (sp != unwound_sp) 1280 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, 1281 sp - (unwound_sp - sp)); 1282 } 1283 1284 return sp; 1285 } 1286 1287 /* If DWARF2 is a register number appearing in Dwarf2 debug info, then 1288 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB 1289 register number. Why don't Dwarf2 and GDB use the same numbering? 1290 Who knows? But since people have object files lying around with 1291 the existing Dwarf2 numbering, and other people have written stubs 1292 to work with the existing GDB, neither of them can change. So we 1293 just have to cope. */ 1294 static int 1295 mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) 1296 { 1297 /* This table is supposed to be shaped like the gdbarch_register_name 1298 initializer in gcc/config/mn10300/mn10300.h. Registers which 1299 appear in GCC's numbering, but have no counterpart in GDB's 1300 world, are marked with a -1. */ 1301 static int dwarf2_to_gdb[] = { 1302 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM, 1303 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM, 1304 -1, E_SP_REGNUM, 1305 1306 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM, 1307 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM, 1308 1309 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3, 1310 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7, 1311 1312 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11, 1313 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15, 1314 1315 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19, 1316 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23, 1317 1318 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27, 1319 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31, 1320 1321 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM 1322 }; 1323 1324 if (dwarf2 < 0 1325 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) 1326 return -1; 1327 1328 return dwarf2_to_gdb[dwarf2]; 1329 } 1330 1331 static struct gdbarch * 1332 mn10300_gdbarch_init (struct gdbarch_info info, 1333 struct gdbarch_list *arches) 1334 { 1335 struct gdbarch *gdbarch; 1336 int num_regs; 1337 1338 arches = gdbarch_list_lookup_by_info (arches, &info); 1339 if (arches != NULL) 1340 return arches->gdbarch; 1341 1342 mn10300_gdbarch_tdep *tdep = new mn10300_gdbarch_tdep; 1343 gdbarch = gdbarch_alloc (&info, tdep); 1344 1345 switch (info.bfd_arch_info->mach) 1346 { 1347 case 0: 1348 case bfd_mach_mn10300: 1349 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); 1350 tdep->am33_mode = 0; 1351 num_regs = 32; 1352 break; 1353 case bfd_mach_am33: 1354 set_gdbarch_register_name (gdbarch, am33_register_name); 1355 tdep->am33_mode = 1; 1356 num_regs = 32; 1357 break; 1358 case bfd_mach_am33_2: 1359 set_gdbarch_register_name (gdbarch, am33_2_register_name); 1360 tdep->am33_mode = 2; 1361 num_regs = 64; 1362 set_gdbarch_fp0_regnum (gdbarch, 32); 1363 break; 1364 default: 1365 internal_error (_("mn10300_gdbarch_init: Unknown mn10300 variant")); 1366 break; 1367 } 1368 1369 /* By default, chars are unsigned. */ 1370 set_gdbarch_char_signed (gdbarch, 0); 1371 1372 /* Registers. */ 1373 set_gdbarch_num_regs (gdbarch, num_regs); 1374 set_gdbarch_register_type (gdbarch, mn10300_register_type); 1375 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); 1376 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); 1377 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); 1378 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); 1379 1380 /* Stack unwinding. */ 1381 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1382 /* Breakpoints. */ 1383 set_gdbarch_breakpoint_kind_from_pc (gdbarch, 1384 mn10300_breakpoint::kind_from_pc); 1385 set_gdbarch_sw_breakpoint_from_kind (gdbarch, 1386 mn10300_breakpoint::bp_from_kind); 1387 /* decr_pc_after_break? */ 1388 1389 /* Stage 2 */ 1390 set_gdbarch_return_value (gdbarch, mn10300_return_value); 1391 1392 /* Stage 3 -- get target calls working. */ 1393 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); 1394 /* set_gdbarch_return_value (store, extract) */ 1395 1396 1397 mn10300_frame_unwind_init (gdbarch); 1398 1399 /* Hook in ABI-specific overrides, if they have been registered. */ 1400 gdbarch_init_osabi (info, gdbarch); 1401 1402 return gdbarch; 1403 } 1404 1405 /* Dump out the mn10300 specific architecture information. */ 1406 1407 static void 1408 mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) 1409 { 1410 mn10300_gdbarch_tdep *tdep = gdbarch_tdep<mn10300_gdbarch_tdep> (gdbarch); 1411 gdb_printf (file, "mn10300_dump_tdep: am33_mode = %d\n", 1412 tdep->am33_mode); 1413 } 1414 1415 void _initialize_mn10300_tdep (); 1416 void 1417 _initialize_mn10300_tdep () 1418 { 1419 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); 1420 } 1421 1422