xref: /netbsd-src/external/gpl3/gcc/usr.bin/gcc/arch/earmv7hfeb/arm-cpu-cdata.h (revision cf89d143ddc4c4858b3b762976d9b0ce1d6c4300)
1 /* This file is automatically generated.  DO NOT EDIT! */
2 /* Generated from: NetBSD: mknative-gcc,v 1.117 2023/07/31 01:48:37 mrg Exp  */
3 /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp  */
4 
5 /* -*- buffer-read-only: t -*-
6    Generated automatically by parsecpu.awk from arm-cpus.in.
7    Do not edit.
8 
9    Copyright (C) 2011-2022 Free Software Foundation, Inc.
10 
11    This file is part of GCC.
12 
13    GCC is free software; you can redistribute it and/or modify
14    it under the terms of the GNU General Public License as
15    published by the Free Software Foundation; either version 3,
16    or (at your option) any later version.
17 
18    GCC is distributed in the hope that it will be useful,
19    but WITHOUT ANY WARRANTY; without even the implied warranty of
20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21    GNU General Public License for more details.
22 
23    You should have received a copy of the GNU General Public
24    License along with GCC; see the file COPYING3.  If not see
25    <http://www.gnu.org/licenses/>.  */
26 
27 static const cpu_alias cpu_aliastab_strongarm[] = {
28   { "strongarm110", true},
29   { "strongarm1100", false},
30   { "strongarm1110", false},
31   { NULL, false}
32 };
33 
34 static const cpu_alias cpu_aliastab_arm7tdmi[] = {
35   { "arm7tdmi-s", true},
36   { NULL, false}
37 };
38 
39 static const cpu_alias cpu_aliastab_arm710t[] = {
40   { "arm720t", true},
41   { "arm740t", true},
42   { NULL, false}
43 };
44 
45 static const cpu_alias cpu_aliastab_arm920t[] = {
46   { "arm920", true},
47   { "arm922t", true},
48   { "arm940t", true},
49   { "ep9312", true},
50   { NULL, false}
51 };
52 
53 static const cpu_alias cpu_aliastab_arm10tdmi[] = {
54   { "arm1020t", true},
55   { NULL, false}
56 };
57 
58 static const cpu_arch_extension cpu_opttab_arm9e[] = {
59   {
60     "nofp", true, false,
61     {
62       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
63       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
64       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
65       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
66     }
67   },
68   { NULL, false, false, {isa_nobit}}
69 };
70 
71 static const cpu_alias cpu_aliastab_arm9e[] = {
72   { "arm946e-s", true},
73   { "arm966e-s", true},
74   { "arm968e-s", true},
75   { NULL, false}
76 };
77 
78 static const cpu_arch_extension cpu_opttab_arm10e[] = {
79   {
80     "nofp", true, false,
81     {
82       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
83       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
84       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
85       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
86     }
87   },
88   { NULL, false, false, {isa_nobit}}
89 };
90 
91 static const cpu_alias cpu_aliastab_arm10e[] = {
92   { "arm1020e", true},
93   { "arm1022e", true},
94   { NULL, false}
95 };
96 
97 static const cpu_arch_extension cpu_opttab_arm926ejs[] = {
98   {
99     "nofp", true, false,
100     {
101       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
102       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
103       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
104       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
105     }
106   },
107   { NULL, false, false, {isa_nobit}}
108 };
109 
110 static const cpu_arch_extension cpu_opttab_arm1026ejs[] = {
111   {
112     "nofp", true, false,
113     {
114       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
115       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
116       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
117       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
118     }
119   },
120   { NULL, false, false, {isa_nobit}}
121 };
122 
123 static const cpu_arch_extension cpu_opttab_genericv7a[] = {
124   {
125     "mp", false, false,
126     {
127       isa_bit_mp, isa_nobit
128     }
129   },
130   {
131     "sec", false, false,
132     {
133       isa_bit_sec, isa_nobit
134     }
135   },
136   {
137     "vfpv3-d16", false, false,
138     {
139       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
140     }
141   },
142   {
143     "vfpv3", false, false,
144     {
145       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
146       isa_nobit
147     }
148   },
149   {
150     "vfpv3-d16-fp16", false, false,
151     {
152       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
153       isa_nobit
154     }
155   },
156   {
157     "vfpv3-fp16", false, false,
158     {
159       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
160       isa_bit_fp_dbl, isa_nobit
161     }
162   },
163   {
164     "vfpv4-d16", false, false,
165     {
166       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
167       isa_bit_fp_dbl, isa_nobit
168     }
169   },
170   {
171     "vfpv4", false, false,
172     {
173       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
174       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
175     }
176   },
177   {
178     "simd", false, false,
179     {
180       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
181       isa_bit_fp_dbl, isa_nobit
182     }
183   },
184   {
185     "neon-fp16", false, false,
186     {
187       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
188       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
189     }
190   },
191   {
192     "neon-vfpv4", false, false,
193     {
194       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
195       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
196     }
197   },
198   {
199     "nosimd", true, false,
200     {
201       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
202       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
203     }
204   },
205   {
206     "nofp", true, false,
207     {
208       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
209       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
210       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
211       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
212     }
213   },
214   {
215     "neon", false, true,
216     {
217       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
218       isa_bit_fp_dbl, isa_nobit
219     }
220   },
221   {
222     "neon-vfpv3", false, true,
223     {
224       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
225       isa_bit_fp_dbl, isa_nobit
226     }
227   },
228   { NULL, false, false, {isa_nobit}}
229 };
230 
231 static const cpu_arch_extension cpu_opttab_cortexa5[] = {
232   {
233     "nosimd", true, false,
234     {
235       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
236       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
237     }
238   },
239   {
240     "nofp", true, false,
241     {
242       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
243       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
244       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
245       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
246     }
247   },
248   { NULL, false, false, {isa_nobit}}
249 };
250 
251 static const cpu_arch_extension cpu_opttab_cortexa7[] = {
252   {
253     "nosimd", true, false,
254     {
255       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
256       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
257     }
258   },
259   {
260     "nofp", true, false,
261     {
262       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
263       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
264       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
265       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
266     }
267   },
268   { NULL, false, false, {isa_nobit}}
269 };
270 
271 static const cpu_arch_extension cpu_opttab_cortexa8[] = {
272   {
273     "nofp", true, false,
274     {
275       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
276       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
277       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
278       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
279     }
280   },
281   { NULL, false, false, {isa_nobit}}
282 };
283 
284 static const cpu_arch_extension cpu_opttab_cortexa9[] = {
285   {
286     "nosimd", true, false,
287     {
288       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
289       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
290     }
291   },
292   {
293     "nofp", true, false,
294     {
295       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
296       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
297       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
298       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
299     }
300   },
301   { NULL, false, false, {isa_nobit}}
302 };
303 
304 static const cpu_arch_extension cpu_opttab_cortexa12[] = {
305   {
306     "nofp", true, false,
307     {
308       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
309       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
310       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
311       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
312     }
313   },
314   { NULL, false, false, {isa_nobit}}
315 };
316 
317 static const cpu_arch_extension cpu_opttab_cortexa15[] = {
318   {
319     "nofp", true, false,
320     {
321       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
322       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
323       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
324       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
325     }
326   },
327   { NULL, false, false, {isa_nobit}}
328 };
329 
330 static const cpu_arch_extension cpu_opttab_cortexa17[] = {
331   {
332     "nofp", true, false,
333     {
334       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
335       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
336       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
337       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
338     }
339   },
340   { NULL, false, false, {isa_nobit}}
341 };
342 
343 static const cpu_arch_extension cpu_opttab_cortexr5[] = {
344   {
345     "nofp.dp", true, false,
346     {
347       isa_bit_fp_dbl, isa_nobit
348     }
349   },
350   {
351     "nofp", true, false,
352     {
353       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
354       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
355       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
356       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
357     }
358   },
359   { NULL, false, false, {isa_nobit}}
360 };
361 
362 static const cpu_arch_extension cpu_opttab_cortexr7[] = {
363   {
364     "nofp.dp", true, false,
365     {
366       isa_bit_fp_dbl, isa_nobit
367     }
368   },
369   {
370     "nofp", true, false,
371     {
372       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
373       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
374       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
375       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
376     }
377   },
378   { NULL, false, false, {isa_nobit}}
379 };
380 
381 static const cpu_arch_extension cpu_opttab_cortexr8[] = {
382   {
383     "nofp.dp", true, false,
384     {
385       isa_bit_fp_dbl, isa_nobit
386     }
387   },
388   {
389     "nofp", true, false,
390     {
391       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
392       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
393       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
394       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
395     }
396   },
397   { NULL, false, false, {isa_nobit}}
398 };
399 
400 static const cpu_arch_extension cpu_opttab_cortexm7[] = {
401   {
402     "nofp.dp", true, false,
403     {
404       isa_bit_fp_dbl, isa_nobit
405     }
406   },
407   {
408     "nofp", true, false,
409     {
410       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
411       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
412       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
413       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
414     }
415   },
416   { NULL, false, false, {isa_nobit}}
417 };
418 
419 static const cpu_arch_extension cpu_opttab_cortexm4[] = {
420   {
421     "nofp", true, false,
422     {
423       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
424       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
425       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
426       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
427     }
428   },
429   { NULL, false, false, {isa_nobit}}
430 };
431 
432 static const cpu_arch_extension cpu_opttab_cortexa15cortexa7[] = {
433   {
434     "nofp", true, false,
435     {
436       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
437       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
438       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
439       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
440     }
441   },
442   { NULL, false, false, {isa_nobit}}
443 };
444 
445 static const cpu_arch_extension cpu_opttab_cortexa17cortexa7[] = {
446   {
447     "nofp", true, false,
448     {
449       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
450       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
451       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
452       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
453     }
454   },
455   { NULL, false, false, {isa_nobit}}
456 };
457 
458 static const cpu_arch_extension cpu_opttab_cortexa32[] = {
459   {
460     "crypto", false, false,
461     {
462       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
463       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
464       isa_bit_fp_dbl, isa_nobit
465     }
466   },
467   {
468     "nofp", true, false,
469     {
470       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
471       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
472       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
473       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
474     }
475   },
476   { NULL, false, false, {isa_nobit}}
477 };
478 
479 static const cpu_arch_extension cpu_opttab_cortexa35[] = {
480   {
481     "crypto", false, false,
482     {
483       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
484       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
485       isa_bit_fp_dbl, isa_nobit
486     }
487   },
488   {
489     "nofp", true, false,
490     {
491       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
492       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
493       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
494       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
495     }
496   },
497   { NULL, false, false, {isa_nobit}}
498 };
499 
500 static const cpu_arch_extension cpu_opttab_cortexa53[] = {
501   {
502     "crypto", false, false,
503     {
504       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
505       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
506       isa_bit_fp_dbl, isa_nobit
507     }
508   },
509   {
510     "nofp", true, false,
511     {
512       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
513       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
514       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
515       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
516     }
517   },
518   { NULL, false, false, {isa_nobit}}
519 };
520 
521 static const cpu_arch_extension cpu_opttab_cortexa57[] = {
522   {
523     "crypto", false, false,
524     {
525       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
526       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
527       isa_bit_fp_dbl, isa_nobit
528     }
529   },
530   { NULL, false, false, {isa_nobit}}
531 };
532 
533 static const cpu_arch_extension cpu_opttab_cortexa72[] = {
534   {
535     "crypto", false, false,
536     {
537       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
538       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
539       isa_bit_fp_dbl, isa_nobit
540     }
541   },
542   { NULL, false, false, {isa_nobit}}
543 };
544 
545 static const cpu_arch_extension cpu_opttab_cortexa73[] = {
546   {
547     "crypto", false, false,
548     {
549       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
550       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
551       isa_bit_fp_dbl, isa_nobit
552     }
553   },
554   { NULL, false, false, {isa_nobit}}
555 };
556 
557 static const cpu_arch_extension cpu_opttab_exynosm1[] = {
558   {
559     "crypto", false, false,
560     {
561       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
562       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
563       isa_bit_fp_dbl, isa_nobit
564     }
565   },
566   { NULL, false, false, {isa_nobit}}
567 };
568 
569 static const cpu_arch_extension cpu_opttab_xgene1[] = {
570   {
571     "crypto", false, false,
572     {
573       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
574       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
575       isa_bit_fp_dbl, isa_nobit
576     }
577   },
578   { NULL, false, false, {isa_nobit}}
579 };
580 
581 static const cpu_arch_extension cpu_opttab_cortexa57cortexa53[] = {
582   {
583     "crypto", false, false,
584     {
585       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
586       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
587       isa_bit_fp_dbl, isa_nobit
588     }
589   },
590   { NULL, false, false, {isa_nobit}}
591 };
592 
593 static const cpu_arch_extension cpu_opttab_cortexa72cortexa53[] = {
594   {
595     "crypto", false, false,
596     {
597       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
598       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
599       isa_bit_fp_dbl, isa_nobit
600     }
601   },
602   { NULL, false, false, {isa_nobit}}
603 };
604 
605 static const cpu_arch_extension cpu_opttab_cortexa73cortexa35[] = {
606   {
607     "crypto", false, false,
608     {
609       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
610       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
611       isa_bit_fp_dbl, isa_nobit
612     }
613   },
614   { NULL, false, false, {isa_nobit}}
615 };
616 
617 static const cpu_arch_extension cpu_opttab_cortexa73cortexa53[] = {
618   {
619     "crypto", false, false,
620     {
621       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
622       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
623       isa_bit_fp_dbl, isa_nobit
624     }
625   },
626   { NULL, false, false, {isa_nobit}}
627 };
628 
629 static const cpu_arch_extension cpu_opttab_cortexa55[] = {
630   {
631     "crypto", false, false,
632     {
633       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
634       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
635       isa_bit_fp_dbl, isa_nobit
636     }
637   },
638   {
639     "nofp", true, false,
640     {
641       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
642       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
643       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
644       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
645     }
646   },
647   { NULL, false, false, {isa_nobit}}
648 };
649 
650 static const cpu_arch_extension cpu_opttab_cortexa75[] = {
651   {
652     "crypto", false, false,
653     {
654       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
655       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
656       isa_bit_fp_dbl, isa_nobit
657     }
658   },
659   { NULL, false, false, {isa_nobit}}
660 };
661 
662 static const cpu_arch_extension cpu_opttab_cortexa76[] = {
663   {
664     "crypto", false, false,
665     {
666       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
667       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
668       isa_bit_fp_dbl, isa_nobit
669     }
670   },
671   { NULL, false, false, {isa_nobit}}
672 };
673 
674 static const cpu_arch_extension cpu_opttab_cortexa76ae[] = {
675   {
676     "crypto", false, false,
677     {
678       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
679       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
680       isa_bit_fp_dbl, isa_nobit
681     }
682   },
683   { NULL, false, false, {isa_nobit}}
684 };
685 
686 static const cpu_arch_extension cpu_opttab_cortexa77[] = {
687   {
688     "crypto", false, false,
689     {
690       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
691       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
692       isa_bit_fp_dbl, isa_nobit
693     }
694   },
695   { NULL, false, false, {isa_nobit}}
696 };
697 
698 static const cpu_arch_extension cpu_opttab_cortexa78[] = {
699   {
700     "crypto", false, false,
701     {
702       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
703       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
704       isa_bit_fp_dbl, isa_nobit
705     }
706   },
707   { NULL, false, false, {isa_nobit}}
708 };
709 
710 static const cpu_arch_extension cpu_opttab_cortexa78ae[] = {
711   {
712     "crypto", false, false,
713     {
714       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
715       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
716       isa_bit_fp_dbl, isa_nobit
717     }
718   },
719   { NULL, false, false, {isa_nobit}}
720 };
721 
722 static const cpu_arch_extension cpu_opttab_cortexa78c[] = {
723   {
724     "crypto", false, false,
725     {
726       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
727       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
728       isa_bit_fp_dbl, isa_nobit
729     }
730   },
731   { NULL, false, false, {isa_nobit}}
732 };
733 
734 static const cpu_arch_extension cpu_opttab_cortexa710[] = {
735   {
736     "crypto", false, false,
737     {
738       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
739       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
740       isa_bit_fp_dbl, isa_nobit
741     }
742   },
743   { NULL, false, false, {isa_nobit}}
744 };
745 
746 static const cpu_arch_extension cpu_opttab_cortexx1[] = {
747   {
748     "crypto", false, false,
749     {
750       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
751       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
752       isa_bit_fp_dbl, isa_nobit
753     }
754   },
755   { NULL, false, false, {isa_nobit}}
756 };
757 
758 static const cpu_arch_extension cpu_opttab_neoversen1[] = {
759   {
760     "crypto", false, false,
761     {
762       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
763       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
764       isa_bit_fp_dbl, isa_nobit
765     }
766   },
767   { NULL, false, false, {isa_nobit}}
768 };
769 
770 static const cpu_alias cpu_aliastab_neoversen1[] = {
771   { "ares", false},
772   { NULL, false}
773 };
774 
775 static const cpu_arch_extension cpu_opttab_cortexa75cortexa55[] = {
776   {
777     "crypto", false, false,
778     {
779       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
780       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
781       isa_bit_fp_dbl, isa_nobit
782     }
783   },
784   { NULL, false, false, {isa_nobit}}
785 };
786 
787 static const cpu_arch_extension cpu_opttab_cortexa76cortexa55[] = {
788   {
789     "crypto", false, false,
790     {
791       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
792       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
793       isa_bit_fp_dbl, isa_nobit
794     }
795   },
796   { NULL, false, false, {isa_nobit}}
797 };
798 
799 static const cpu_arch_extension cpu_opttab_neoversev1[] = {
800   {
801     "crypto", false, false,
802     {
803       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
804       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
805       isa_bit_fp_dbl, isa_nobit
806     }
807   },
808   { NULL, false, false, {isa_nobit}}
809 };
810 
811 static const cpu_arch_extension cpu_opttab_neoversen2[] = {
812   {
813     "crypto", false, false,
814     {
815       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
816       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
817       isa_bit_fp_dbl, isa_nobit
818     }
819   },
820   { NULL, false, false, {isa_nobit}}
821 };
822 
823 static const cpu_arch_extension cpu_opttab_cortexm33[] = {
824   {
825     "nofp", true, false,
826     {
827       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
828       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
829       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
830       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
831     }
832   },
833   {
834     "nodsp", true, false,
835     {
836       isa_bit_armv7em, isa_nobit
837     }
838   },
839   { NULL, false, false, {isa_nobit}}
840 };
841 
842 static const cpu_arch_extension cpu_opttab_cortexm35p[] = {
843   {
844     "nofp", true, false,
845     {
846       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
847       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
848       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
849       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
850     }
851   },
852   {
853     "nodsp", true, false,
854     {
855       isa_bit_armv7em, isa_nobit
856     }
857   },
858   { NULL, false, false, {isa_nobit}}
859 };
860 
861 static const cpu_arch_extension cpu_opttab_cortexm55[] = {
862   {
863     "nomve.fp", true, false,
864     {
865       isa_bit_mve_float, isa_nobit
866     }
867   },
868   {
869     "nomve", true, false,
870     {
871       isa_bit_mve, isa_bit_mve_float, isa_nobit
872     }
873   },
874   {
875     "nofp", true, false,
876     {
877       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
878       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
879       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
880       isa_bit_crypto, isa_bit_mve_float, isa_bit_fp_dbl, isa_nobit
881     }
882   },
883   {
884     "nodsp", true, false,
885     {
886       isa_bit_mve, isa_bit_armv7em, isa_bit_mve_float, isa_nobit
887     }
888   },
889   { NULL, false, false, {isa_nobit}}
890 };
891 
892 static const cpu_arch_extension cpu_opttab_cortexr52[] = {
893   {
894     "nofp.dp", true, false,
895     {
896       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
897       isa_bit_fp_d32, isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
898     }
899   },
900   { NULL, false, false, {isa_nobit}}
901 };
902 
903 static const cpu_arch_extension cpu_opttab_cortexr52plus[] = {
904   {
905     "nofp.dp", true, false,
906     {
907       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
908       isa_bit_fp_d32, isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
909     }
910   },
911   { NULL, false, false, {isa_nobit}}
912 };
913 
914 const cpu_option all_cores[] =
915 {
916   {
917     {
918       "arm8",
919       NULL,
920       {
921         isa_bit_armv4, isa_bit_notm, isa_nobit
922       }
923     },
924     NULL,
925     TARGET_ARCH_armv4
926   },
927   {
928     {
929       "arm810",
930       NULL,
931       {
932         isa_bit_armv4, isa_bit_notm, isa_nobit
933       }
934     },
935     NULL,
936     TARGET_ARCH_armv4
937   },
938   {
939     {
940       "strongarm",
941       NULL,
942       {
943         isa_bit_armv4, isa_bit_notm, isa_nobit
944       }
945     },
946     cpu_aliastab_strongarm,
947     TARGET_ARCH_armv4
948   },
949   {
950     {
951       "fa526",
952       NULL,
953       {
954         isa_bit_armv4, isa_bit_notm, isa_nobit
955       }
956     },
957     NULL,
958     TARGET_ARCH_armv4
959   },
960   {
961     {
962       "fa626",
963       NULL,
964       {
965         isa_bit_armv4, isa_bit_notm, isa_nobit
966       }
967     },
968     NULL,
969     TARGET_ARCH_armv4
970   },
971   {
972     {
973       "arm7tdmi",
974       NULL,
975       {
976         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
977       }
978     },
979     cpu_aliastab_arm7tdmi,
980     TARGET_ARCH_armv4t
981   },
982   {
983     {
984       "arm710t",
985       NULL,
986       {
987         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
988       }
989     },
990     cpu_aliastab_arm710t,
991     TARGET_ARCH_armv4t
992   },
993   {
994     {
995       "arm9",
996       NULL,
997       {
998         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
999       }
1000     },
1001     NULL,
1002     TARGET_ARCH_armv4t
1003   },
1004   {
1005     {
1006       "arm9tdmi",
1007       NULL,
1008       {
1009         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
1010       }
1011     },
1012     NULL,
1013     TARGET_ARCH_armv4t
1014   },
1015   {
1016     {
1017       "arm920t",
1018       NULL,
1019       {
1020         isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
1021       }
1022     },
1023     cpu_aliastab_arm920t,
1024     TARGET_ARCH_armv4t
1025   },
1026   {
1027     {
1028       "arm10tdmi",
1029       NULL,
1030       {
1031         isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm,
1032         isa_nobit
1033       }
1034     },
1035     cpu_aliastab_arm10tdmi,
1036     TARGET_ARCH_armv5t
1037   },
1038   {
1039     {
1040       "arm9e",
1041       cpu_opttab_arm9e,
1042       {
1043         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1044         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1045       }
1046     },
1047     cpu_aliastab_arm9e,
1048     TARGET_ARCH_armv5te
1049   },
1050   {
1051     {
1052       "arm10e",
1053       cpu_opttab_arm10e,
1054       {
1055         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1056         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1057       }
1058     },
1059     cpu_aliastab_arm10e,
1060     TARGET_ARCH_armv5te
1061   },
1062   {
1063     {
1064       "xscale",
1065       NULL,
1066       {
1067         isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb, isa_bit_armv5t,
1068         isa_bit_armv4, isa_bit_notm, isa_nobit
1069       }
1070     },
1071     NULL,
1072     TARGET_ARCH_armv5te
1073   },
1074   {
1075     {
1076       "iwmmxt",
1077       NULL,
1078       {
1079         isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
1080         isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit
1081       }
1082     },
1083     NULL,
1084     TARGET_ARCH_iwmmxt
1085   },
1086   {
1087     {
1088       "iwmmxt2",
1089       NULL,
1090       {
1091         isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
1092         isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm,
1093         isa_nobit
1094       }
1095     },
1096     NULL,
1097     TARGET_ARCH_iwmmxt2
1098   },
1099   {
1100     {
1101       "fa606te",
1102       NULL,
1103       {
1104         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1105         isa_bit_notm, isa_nobit
1106       }
1107     },
1108     NULL,
1109     TARGET_ARCH_armv5te
1110   },
1111   {
1112     {
1113       "fa626te",
1114       NULL,
1115       {
1116         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1117         isa_bit_notm, isa_nobit
1118       }
1119     },
1120     NULL,
1121     TARGET_ARCH_armv5te
1122   },
1123   {
1124     {
1125       "fmp626",
1126       NULL,
1127       {
1128         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1129         isa_bit_notm, isa_nobit
1130       }
1131     },
1132     NULL,
1133     TARGET_ARCH_armv5te
1134   },
1135   {
1136     {
1137       "fa726te",
1138       NULL,
1139       {
1140         isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
1141         isa_bit_notm, isa_nobit
1142       }
1143     },
1144     NULL,
1145     TARGET_ARCH_armv5te
1146   },
1147   {
1148     {
1149       "arm926ej-s",
1150       cpu_opttab_arm926ejs,
1151       {
1152         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1153         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1154       }
1155     },
1156     NULL,
1157     TARGET_ARCH_armv5tej
1158   },
1159   {
1160     {
1161       "arm1026ej-s",
1162       cpu_opttab_arm1026ejs,
1163       {
1164         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t,
1165         isa_bit_armv4, isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1166       }
1167     },
1168     NULL,
1169     TARGET_ARCH_armv5tej
1170   },
1171   {
1172     {
1173       "arm1136j-s",
1174       NULL,
1175       {
1176         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1177         isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
1178       }
1179     },
1180     NULL,
1181     TARGET_ARCH_armv6j
1182   },
1183   {
1184     {
1185       "arm1136jf-s",
1186       NULL,
1187       {
1188         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1189         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm,
1190         isa_bit_fp_dbl, isa_nobit
1191       }
1192     },
1193     NULL,
1194     TARGET_ARCH_armv6j
1195   },
1196   {
1197     {
1198       "arm1176jz-s",
1199       NULL,
1200       {
1201         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1202         isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
1203         isa_bit_armv6k, isa_nobit
1204       }
1205     },
1206     NULL,
1207     TARGET_ARCH_armv6kz
1208   },
1209   {
1210     {
1211       "arm1176jzf-s",
1212       NULL,
1213       {
1214         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1215         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz,
1216         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1217       }
1218     },
1219     NULL,
1220     TARGET_ARCH_armv6kz
1221   },
1222   {
1223     {
1224       "mpcorenovfp",
1225       NULL,
1226       {
1227         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1228         isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k,
1229         isa_nobit
1230       }
1231     },
1232     NULL,
1233     TARGET_ARCH_armv6k
1234   },
1235   {
1236     {
1237       "mpcore",
1238       NULL,
1239       {
1240         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1241         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_notm,
1242         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1243       }
1244     },
1245     NULL,
1246     TARGET_ARCH_armv6k
1247   },
1248   {
1249     {
1250       "arm1156t2-s",
1251       NULL,
1252       {
1253         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1254         isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm,
1255         isa_nobit
1256       }
1257     },
1258     NULL,
1259     TARGET_ARCH_armv6t2
1260   },
1261   {
1262     {
1263       "arm1156t2f-s",
1264       NULL,
1265       {
1266         isa_bit_vfpv2, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1267         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2,
1268         isa_bit_notm, isa_bit_fp_dbl, isa_nobit
1269       }
1270     },
1271     NULL,
1272     TARGET_ARCH_armv6t2
1273   },
1274   {
1275     {
1276       "cortex-m1",
1277       NULL,
1278       {
1279         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1280         isa_bit_armv4, isa_bit_armv6, isa_nobit
1281       }
1282     },
1283     NULL,
1284     TARGET_ARCH_armv6s_m
1285   },
1286   {
1287     {
1288       "cortex-m0",
1289       NULL,
1290       {
1291         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1292         isa_bit_armv4, isa_bit_armv6, isa_nobit
1293       }
1294     },
1295     NULL,
1296     TARGET_ARCH_armv6s_m
1297   },
1298   {
1299     {
1300       "cortex-m0plus",
1301       NULL,
1302       {
1303         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1304         isa_bit_armv4, isa_bit_armv6, isa_nobit
1305       }
1306     },
1307     NULL,
1308     TARGET_ARCH_armv6s_m
1309   },
1310   {
1311     {
1312       "cortex-m1.small-multiply",
1313       NULL,
1314       {
1315         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1316         isa_bit_armv4, isa_bit_armv6, isa_nobit
1317       }
1318     },
1319     NULL,
1320     TARGET_ARCH_armv6s_m
1321   },
1322   {
1323     {
1324       "cortex-m0.small-multiply",
1325       NULL,
1326       {
1327         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1328         isa_bit_armv4, isa_bit_armv6, isa_nobit
1329       }
1330     },
1331     NULL,
1332     TARGET_ARCH_armv6s_m
1333   },
1334   {
1335     {
1336       "cortex-m0plus.small-multiply",
1337       NULL,
1338       {
1339         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1340         isa_bit_armv4, isa_bit_armv6, isa_nobit
1341       }
1342     },
1343     NULL,
1344     TARGET_ARCH_armv6s_m
1345   },
1346   {
1347     {
1348       "generic-armv7-a",
1349       cpu_opttab_genericv7a,
1350       {
1351         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_quirk_no_asmcpu,
1352         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1353         isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2, isa_bit_notm,
1354         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1355       }
1356     },
1357     NULL,
1358     TARGET_ARCH_armv7_a
1359   },
1360   {
1361     {
1362       "cortex-a5",
1363       cpu_opttab_cortexa5,
1364       {
1365         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1366         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1367         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1368         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1369         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1370       }
1371     },
1372     NULL,
1373     TARGET_ARCH_armv7_a
1374   },
1375   {
1376     {
1377       "cortex-a7",
1378       cpu_opttab_cortexa7,
1379       {
1380         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1381         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1382         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1383         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1384         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1385         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1386       }
1387     },
1388     NULL,
1389     TARGET_ARCH_armv7ve
1390   },
1391   {
1392     {
1393       "cortex-a8",
1394       cpu_opttab_cortexa8,
1395       {
1396         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1397         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1398         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1399         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_bit_sec,
1400         isa_nobit
1401       }
1402     },
1403     NULL,
1404     TARGET_ARCH_armv7_a
1405   },
1406   {
1407     {
1408       "cortex-a9",
1409       cpu_opttab_cortexa9,
1410       {
1411         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1412         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_neon,
1413         isa_bit_armv6, isa_bit_armv7, isa_bit_fp_d32, isa_bit_thumb2,
1414         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1415         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1416       }
1417     },
1418     NULL,
1419     TARGET_ARCH_armv7_a
1420   },
1421   {
1422     {
1423       "cortex-a12",
1424       cpu_opttab_cortexa12,
1425       {
1426         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1427         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1428         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1429         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1430         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1431         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1432       }
1433     },
1434     NULL,
1435     TARGET_ARCH_armv7ve
1436   },
1437   {
1438     {
1439       "cortex-a15",
1440       cpu_opttab_cortexa15,
1441       {
1442         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1443         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1444         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1445         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1446         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1447         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1448       }
1449     },
1450     NULL,
1451     TARGET_ARCH_armv7ve
1452   },
1453   {
1454     {
1455       "cortex-a17",
1456       cpu_opttab_cortexa17,
1457       {
1458         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1459         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1460         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1461         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1462         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1463         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1464       }
1465     },
1466     NULL,
1467     TARGET_ARCH_armv7ve
1468   },
1469   {
1470     {
1471       "cortex-r4",
1472       NULL,
1473       {
1474         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1475         isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
1476         isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit
1477       }
1478     },
1479     NULL,
1480     TARGET_ARCH_armv7_r
1481   },
1482   {
1483     {
1484       "cortex-r4f",
1485       NULL,
1486       {
1487         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1488         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6,
1489         isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm,
1490         isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1491       }
1492     },
1493     NULL,
1494     TARGET_ARCH_armv7_r
1495   },
1496   {
1497     {
1498       "cortex-r5",
1499       cpu_opttab_cortexr5,
1500       {
1501         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1502         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1503         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1504         isa_bit_notm, isa_bit_armv6k, isa_bit_fp_dbl, isa_nobit
1505       }
1506     },
1507     NULL,
1508     TARGET_ARCH_armv7_r
1509   },
1510   {
1511     {
1512       "cortex-r7",
1513       cpu_opttab_cortexr7,
1514       {
1515         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1516         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1517         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1518         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl,
1519         isa_nobit
1520       }
1521     },
1522     NULL,
1523     TARGET_ARCH_armv7_r
1524   },
1525   {
1526     {
1527       "cortex-r8",
1528       cpu_opttab_cortexr8,
1529       {
1530         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_armv5te,
1531         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1532         isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2,
1533         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_fp_dbl,
1534         isa_nobit
1535       }
1536     },
1537     NULL,
1538     TARGET_ARCH_armv7_r
1539   },
1540   {
1541     {
1542       "cortex-m7",
1543       cpu_opttab_cortexm7,
1544       {
1545         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1546         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1547         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_fpv5,
1548         isa_bit_tdiv, isa_bit_quirk_no_volatile_ce, isa_bit_thumb2, isa_bit_fp16conv,
1549         isa_bit_fp_dbl, isa_nobit
1550       }
1551     },
1552     NULL,
1553     TARGET_ARCH_armv7e_m
1554   },
1555   {
1556     {
1557       "cortex-m4",
1558       cpu_opttab_cortexm4,
1559       {
1560         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
1561         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
1562         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_tdiv,
1563         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
1564       }
1565     },
1566     NULL,
1567     TARGET_ARCH_armv7e_m
1568   },
1569   {
1570     {
1571       "cortex-m3",
1572       NULL,
1573       {
1574         isa_bit_armv5te, isa_bit_thumb, isa_bit_quirk_cm3_ldrd, isa_bit_be8,
1575         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6, isa_bit_armv7,
1576         isa_bit_tdiv, isa_bit_thumb2, isa_nobit
1577       }
1578     },
1579     NULL,
1580     TARGET_ARCH_armv7_m
1581   },
1582   {
1583     {
1584       "marvell-pj4",
1585       NULL,
1586       {
1587         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_armv5te, isa_bit_thumb,
1588         isa_bit_be8, isa_bit_armv5t, isa_bit_armv4, isa_bit_armv6,
1589         isa_bit_armv7, isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k,
1590         isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1591       }
1592     },
1593     NULL,
1594     TARGET_ARCH_armv7_a
1595   },
1596   {
1597     {
1598       "cortex-a15.cortex-a7",
1599       cpu_opttab_cortexa15cortexa7,
1600       {
1601         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1602         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1603         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1604         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1605         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1606         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1607       }
1608     },
1609     NULL,
1610     TARGET_ARCH_armv7ve
1611   },
1612   {
1613     {
1614       "cortex-a17.cortex-a7",
1615       cpu_opttab_cortexa17cortexa7,
1616       {
1617         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1618         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1619         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1620         isa_bit_armv7, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1621         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1622         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1623       }
1624     },
1625     NULL,
1626     TARGET_ARCH_armv7ve
1627   },
1628   {
1629     {
1630       "cortex-a32",
1631       cpu_opttab_cortexa32,
1632       {
1633         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1634         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1635         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1636         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1637         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1638         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1639         isa_bit_sec, isa_nobit
1640       }
1641     },
1642     NULL,
1643     TARGET_ARCH_armv8_a
1644   },
1645   {
1646     {
1647       "cortex-a35",
1648       cpu_opttab_cortexa35,
1649       {
1650         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1651         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1652         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1653         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1654         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1655         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1656         isa_bit_sec, isa_nobit
1657       }
1658     },
1659     NULL,
1660     TARGET_ARCH_armv8_a
1661   },
1662   {
1663     {
1664       "cortex-a53",
1665       cpu_opttab_cortexa53,
1666       {
1667         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1668         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1669         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1670         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1671         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1672         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1673         isa_bit_sec, isa_nobit
1674       }
1675     },
1676     NULL,
1677     TARGET_ARCH_armv8_a
1678   },
1679   {
1680     {
1681       "cortex-a57",
1682       cpu_opttab_cortexa57,
1683       {
1684         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1685         isa_bit_quirk_aes_1742098, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1686         isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1687         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1688         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1689         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1690         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1691       }
1692     },
1693     NULL,
1694     TARGET_ARCH_armv8_a
1695   },
1696   {
1697     {
1698       "cortex-a72",
1699       cpu_opttab_cortexa72,
1700       {
1701         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1702         isa_bit_quirk_aes_1742098, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1703         isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1704         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1705         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1706         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1707         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1708       }
1709     },
1710     NULL,
1711     TARGET_ARCH_armv8_a
1712   },
1713   {
1714     {
1715       "cortex-a73",
1716       cpu_opttab_cortexa73,
1717       {
1718         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1719         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1720         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1721         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1722         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1723         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1724         isa_bit_sec, isa_nobit
1725       }
1726     },
1727     NULL,
1728     TARGET_ARCH_armv8_a
1729   },
1730   {
1731     {
1732       "exynos-m1",
1733       cpu_opttab_exynosm1,
1734       {
1735         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1736         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1737         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1738         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1739         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1740         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1741         isa_bit_sec, isa_nobit
1742       }
1743     },
1744     NULL,
1745     TARGET_ARCH_armv8_a
1746   },
1747   {
1748     {
1749       "xgene1",
1750       cpu_opttab_xgene1,
1751       {
1752         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1753         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1754         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1755         isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5, isa_bit_tdiv,
1756         isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm, isa_bit_fp16conv,
1757         isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl, isa_bit_sec,
1758         isa_nobit
1759       }
1760     },
1761     NULL,
1762     TARGET_ARCH_armv8_a
1763   },
1764   {
1765     {
1766       "cortex-a57.cortex-a53",
1767       cpu_opttab_cortexa57cortexa53,
1768       {
1769         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1770         isa_bit_quirk_aes_1742098, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1771         isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1772         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1773         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1774         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1775         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1776       }
1777     },
1778     NULL,
1779     TARGET_ARCH_armv8_a
1780   },
1781   {
1782     {
1783       "cortex-a72.cortex-a53",
1784       cpu_opttab_cortexa72cortexa53,
1785       {
1786         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1787         isa_bit_quirk_aes_1742098, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
1788         isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1789         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1790         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1791         isa_bit_notm, isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp,
1792         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
1793       }
1794     },
1795     NULL,
1796     TARGET_ARCH_armv8_a
1797   },
1798   {
1799     {
1800       "cortex-a73.cortex-a35",
1801       cpu_opttab_cortexa73cortexa35,
1802       {
1803         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1804         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1805         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1806         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1807         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1808         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1809         isa_bit_sec, isa_nobit
1810       }
1811     },
1812     NULL,
1813     TARGET_ARCH_armv8_a
1814   },
1815   {
1816     {
1817       "cortex-a73.cortex-a53",
1818       cpu_opttab_cortexa73cortexa53,
1819       {
1820         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1821         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1822         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
1823         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
1824         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
1825         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1826         isa_bit_sec, isa_nobit
1827       }
1828     },
1829     NULL,
1830     TARGET_ARCH_armv8_a
1831   },
1832   {
1833     {
1834       "cortex-a55",
1835       cpu_opttab_cortexa55,
1836       {
1837         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1838         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1839         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1840         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1841         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1842         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1843         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1844         isa_bit_sec, isa_nobit
1845       }
1846     },
1847     NULL,
1848     TARGET_ARCH_armv8_2_a
1849   },
1850   {
1851     {
1852       "cortex-a75",
1853       cpu_opttab_cortexa75,
1854       {
1855         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1856         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1857         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1858         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1859         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1860         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1861         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1862         isa_bit_sec, isa_nobit
1863       }
1864     },
1865     NULL,
1866     TARGET_ARCH_armv8_2_a
1867   },
1868   {
1869     {
1870       "cortex-a76",
1871       cpu_opttab_cortexa76,
1872       {
1873         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1874         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1875         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1876         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1877         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1878         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1879         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1880         isa_bit_sec, isa_nobit
1881       }
1882     },
1883     NULL,
1884     TARGET_ARCH_armv8_2_a
1885   },
1886   {
1887     {
1888       "cortex-a76ae",
1889       cpu_opttab_cortexa76ae,
1890       {
1891         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1892         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1893         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1894         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1895         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1896         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1897         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1898         isa_bit_sec, isa_nobit
1899       }
1900     },
1901     NULL,
1902     TARGET_ARCH_armv8_2_a
1903   },
1904   {
1905     {
1906       "cortex-a77",
1907       cpu_opttab_cortexa77,
1908       {
1909         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1910         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1911         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1912         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1913         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1914         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1915         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1916         isa_bit_sec, isa_nobit
1917       }
1918     },
1919     NULL,
1920     TARGET_ARCH_armv8_2_a
1921   },
1922   {
1923     {
1924       "cortex-a78",
1925       cpu_opttab_cortexa78,
1926       {
1927         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1928         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1929         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1930         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1931         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1932         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1933         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1934         isa_bit_sec, isa_nobit
1935       }
1936     },
1937     NULL,
1938     TARGET_ARCH_armv8_2_a
1939   },
1940   {
1941     {
1942       "cortex-a78ae",
1943       cpu_opttab_cortexa78ae,
1944       {
1945         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1946         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1947         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1948         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1949         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1950         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1951         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1952         isa_bit_sec, isa_nobit
1953       }
1954     },
1955     NULL,
1956     TARGET_ARCH_armv8_2_a
1957   },
1958   {
1959     {
1960       "cortex-a78c",
1961       cpu_opttab_cortexa78c,
1962       {
1963         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1964         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1965         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1966         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1967         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
1968         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
1969         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
1970         isa_bit_sec, isa_nobit
1971       }
1972     },
1973     NULL,
1974     TARGET_ARCH_armv8_2_a
1975   },
1976   {
1977     {
1978       "cortex-a710",
1979       cpu_opttab_cortexa710,
1980       {
1981         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
1982         isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16,
1983         isa_bit_sb, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
1984         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
1985         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
1986         isa_bit_fpv5, isa_bit_armv9, isa_bit_tdiv, isa_bit_fp_d32,
1987         isa_bit_thumb2, isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1,
1988         isa_bit_fp16conv, isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3,
1989         isa_bit_mp, isa_bit_armv8_4, isa_bit_armv8_5, isa_bit_fp_dbl,
1990         isa_bit_sec, isa_bit_predres, isa_nobit
1991       }
1992     },
1993     NULL,
1994     TARGET_ARCH_armv9_a
1995   },
1996   {
1997     {
1998       "cortex-x1",
1999       cpu_opttab_cortexx1,
2000       {
2001         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2002         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2003         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
2004         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
2005         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
2006         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
2007         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2008         isa_bit_sec, isa_nobit
2009       }
2010     },
2011     NULL,
2012     TARGET_ARCH_armv8_2_a
2013   },
2014   {
2015     {
2016       "neoverse-n1",
2017       cpu_opttab_neoversen1,
2018       {
2019         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2020         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2021         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
2022         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
2023         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
2024         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
2025         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2026         isa_bit_sec, isa_nobit
2027       }
2028     },
2029     cpu_aliastab_neoversen1,
2030     TARGET_ARCH_armv8_2_a
2031   },
2032   {
2033     {
2034       "cortex-a75.cortex-a55",
2035       cpu_opttab_cortexa75cortexa55,
2036       {
2037         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2038         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2039         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
2040         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
2041         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
2042         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
2043         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2044         isa_bit_sec, isa_nobit
2045       }
2046     },
2047     NULL,
2048     TARGET_ARCH_armv8_2_a
2049   },
2050   {
2051     {
2052       "cortex-a76.cortex-a55",
2053       cpu_opttab_cortexa76cortexa55,
2054       {
2055         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2056         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2057         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
2058         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
2059         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
2060         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
2061         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2062         isa_bit_sec, isa_nobit
2063       }
2064     },
2065     NULL,
2066     TARGET_ARCH_armv8_2_a
2067   },
2068   {
2069     {
2070       "neoverse-v1",
2071       cpu_opttab_neoversev1,
2072       {
2073         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2074         isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16,
2075         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_dotprod,
2076         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
2077         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
2078         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
2079         isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv, isa_bit_armv8_2,
2080         isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp,
2081         isa_bit_fp_dbl, isa_bit_sec, isa_nobit
2082       }
2083     },
2084     NULL,
2085     TARGET_ARCH_armv8_4_a
2086   },
2087   {
2088     {
2089       "neoverse-n2",
2090       cpu_opttab_neoversen2,
2091       {
2092         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2093         isa_bit_armv5te, isa_bit_i8mm, isa_bit_fp16fml, isa_bit_bf16,
2094         isa_bit_sb, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2095         isa_bit_dotprod, isa_bit_lpae, isa_bit_armv4, isa_bit_neon,
2096         isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
2097         isa_bit_fpv5, isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2,
2098         isa_bit_notm, isa_bit_fp16, isa_bit_armv8_1, isa_bit_fp16conv,
2099         isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4,
2100         isa_bit_mp, isa_bit_armv8_5, isa_bit_fp_dbl, isa_bit_sec,
2101         isa_bit_predres, isa_nobit
2102       }
2103     },
2104     NULL,
2105     TARGET_ARCH_armv8_5_a
2106   },
2107   {
2108     {
2109       "cortex-m23",
2110       NULL,
2111       {
2112         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2113         isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse,
2114         isa_bit_tdiv, isa_nobit
2115       }
2116     },
2117     NULL,
2118     TARGET_ARCH_armv8_m_base
2119   },
2120   {
2121     {
2122       "cortex-m33",
2123       cpu_opttab_cortexm33,
2124       {
2125         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
2126         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
2127         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8,
2128         isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv,
2129         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
2130       }
2131     },
2132     NULL,
2133     TARGET_ARCH_armv8_m_main
2134   },
2135   {
2136     {
2137       "cortex-m35p",
2138       cpu_opttab_cortexm35p,
2139       {
2140         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_armv5te,
2141         isa_bit_thumb, isa_bit_be8, isa_bit_armv5t, isa_bit_armv4,
2142         isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8,
2143         isa_bit_cmse, isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv,
2144         isa_bit_thumb2, isa_bit_fp16conv, isa_nobit
2145       }
2146     },
2147     NULL,
2148     TARGET_ARCH_armv8_m_main
2149   },
2150   {
2151     {
2152       "cortex-m55",
2153       cpu_opttab_cortexm55,
2154       {
2155         isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve,
2156         isa_bit_armv5te, isa_bit_quirk_no_asmcpu, isa_bit_thumb, isa_bit_be8,
2157         isa_bit_armv5t, isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6,
2158         isa_bit_armv7em, isa_bit_armv7, isa_bit_armv8, isa_bit_cmse,
2159         isa_bit_fpv5, isa_bit_quirk_vlldm, isa_bit_tdiv, isa_bit_thumb2,
2160         isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_bit_mve_float,
2161         isa_nobit
2162       }
2163     },
2164     NULL,
2165     TARGET_ARCH_armv8_1_m_main
2166   },
2167   {
2168     {
2169       "cortex-r52",
2170       cpu_opttab_cortexr52,
2171       {
2172         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2173         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2174         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
2175         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
2176         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
2177         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2178         isa_bit_sec, isa_nobit
2179       }
2180     },
2181     NULL,
2182     TARGET_ARCH_armv8_r
2183   },
2184   {
2185     {
2186       "cortex-r52plus",
2187       cpu_opttab_cortexr52plus,
2188       {
2189         isa_bit_vfpv2, isa_bit_adiv, isa_bit_vfpv3, isa_bit_vfpv4,
2190         isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
2191         isa_bit_lpae, isa_bit_armv4, isa_bit_neon, isa_bit_armv6,
2192         isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_fpv5,
2193         isa_bit_tdiv, isa_bit_fp_d32, isa_bit_thumb2, isa_bit_notm,
2194         isa_bit_fp16conv, isa_bit_armv6k, isa_bit_mp, isa_bit_fp_dbl,
2195         isa_bit_sec, isa_nobit
2196       }
2197     },
2198     NULL,
2199     TARGET_ARCH_armv8_r
2200   },
2201   {{NULL, NULL, {isa_nobit}}, NULL, TARGET_ARCH_arm_none}
2202 };
2203 static const struct cpu_arch_extension arch_opttab_armv5te[] = {
2204   {
2205     "fp", false, false,
2206     {
2207       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2208     }
2209   },
2210   {
2211     "nofp", true, false,
2212     {
2213       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2214       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2215       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2216       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2217     }
2218   },
2219   {
2220     "vfpv2", false, true,
2221     {
2222       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2223     }
2224   },
2225   { NULL, false, false, {isa_nobit}}
2226 };
2227 
2228 static const struct cpu_arch_extension arch_opttab_armv5tej[] = {
2229   {
2230     "fp", false, false,
2231     {
2232       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2233     }
2234   },
2235   {
2236     "nofp", true, false,
2237     {
2238       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2239       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2240       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2241       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2242     }
2243   },
2244   {
2245     "vfpv2", false, true,
2246     {
2247       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2248     }
2249   },
2250   { NULL, false, false, {isa_nobit}}
2251 };
2252 
2253 static const struct cpu_arch_extension arch_opttab_armv6[] = {
2254   {
2255     "fp", false, false,
2256     {
2257       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2258     }
2259   },
2260   {
2261     "nofp", true, false,
2262     {
2263       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2264       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2265       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2266       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2267     }
2268   },
2269   {
2270     "vfpv2", false, true,
2271     {
2272       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2273     }
2274   },
2275   { NULL, false, false, {isa_nobit}}
2276 };
2277 
2278 static const struct cpu_arch_extension arch_opttab_armv6j[] = {
2279   {
2280     "fp", false, false,
2281     {
2282       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2283     }
2284   },
2285   {
2286     "nofp", true, false,
2287     {
2288       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2289       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2290       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2291       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2292     }
2293   },
2294   {
2295     "vfpv2", false, true,
2296     {
2297       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2298     }
2299   },
2300   { NULL, false, false, {isa_nobit}}
2301 };
2302 
2303 static const struct cpu_arch_extension arch_opttab_armv6k[] = {
2304   {
2305     "fp", false, false,
2306     {
2307       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2308     }
2309   },
2310   {
2311     "nofp", true, false,
2312     {
2313       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2314       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2315       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2316       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2317     }
2318   },
2319   {
2320     "vfpv2", false, true,
2321     {
2322       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2323     }
2324   },
2325   { NULL, false, false, {isa_nobit}}
2326 };
2327 
2328 static const struct cpu_arch_extension arch_opttab_armv6z[] = {
2329   {
2330     "fp", false, false,
2331     {
2332       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2333     }
2334   },
2335   {
2336     "nofp", true, false,
2337     {
2338       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2339       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2340       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2341       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2342     }
2343   },
2344   {
2345     "vfpv2", false, true,
2346     {
2347       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2348     }
2349   },
2350   { NULL, false, false, {isa_nobit}}
2351 };
2352 
2353 static const struct cpu_arch_extension arch_opttab_armv6kz[] = {
2354   {
2355     "fp", false, false,
2356     {
2357       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2358     }
2359   },
2360   {
2361     "nofp", true, false,
2362     {
2363       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2364       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2365       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2366       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2367     }
2368   },
2369   {
2370     "vfpv2", false, true,
2371     {
2372       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2373     }
2374   },
2375   { NULL, false, false, {isa_nobit}}
2376 };
2377 
2378 static const struct cpu_arch_extension arch_opttab_armv6zk[] = {
2379   {
2380     "fp", false, false,
2381     {
2382       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2383     }
2384   },
2385   {
2386     "nofp", true, false,
2387     {
2388       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2389       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2390       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2391       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2392     }
2393   },
2394   {
2395     "vfpv2", false, true,
2396     {
2397       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2398     }
2399   },
2400   { NULL, false, false, {isa_nobit}}
2401 };
2402 
2403 static const struct cpu_arch_extension arch_opttab_armv6t2[] = {
2404   {
2405     "fp", false, false,
2406     {
2407       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2408     }
2409   },
2410   {
2411     "nofp", true, false,
2412     {
2413       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2414       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2415       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2416       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2417     }
2418   },
2419   {
2420     "vfpv2", false, true,
2421     {
2422       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
2423     }
2424   },
2425   { NULL, false, false, {isa_nobit}}
2426 };
2427 
2428 static const struct cpu_arch_extension arch_opttab_armv7[] = {
2429   {
2430     "fp", false, false,
2431     {
2432       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2433     }
2434   },
2435   {
2436     "nofp", true, false,
2437     {
2438       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2439       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2440       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2441       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2442     }
2443   },
2444   {
2445     "vfpv3-d16", false, true,
2446     {
2447       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2448     }
2449   },
2450   { NULL, false, false, {isa_nobit}}
2451 };
2452 
2453 static const struct cpu_arch_extension arch_opttab_armv7_a[] = {
2454   {
2455     "mp", false, false,
2456     {
2457       isa_bit_mp, isa_nobit
2458     }
2459   },
2460   {
2461     "sec", false, false,
2462     {
2463       isa_bit_sec, isa_nobit
2464     }
2465   },
2466   {
2467     "fp", false, false,
2468     {
2469       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2470     }
2471   },
2472   {
2473     "vfpv3", false, false,
2474     {
2475       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
2476       isa_nobit
2477     }
2478   },
2479   {
2480     "vfpv3-d16-fp16", false, false,
2481     {
2482       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2483       isa_nobit
2484     }
2485   },
2486   {
2487     "vfpv3-fp16", false, false,
2488     {
2489       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
2490       isa_bit_fp_dbl, isa_nobit
2491     }
2492   },
2493   {
2494     "vfpv4-d16", false, false,
2495     {
2496       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2497       isa_bit_fp_dbl, isa_nobit
2498     }
2499   },
2500   {
2501     "vfpv4", false, false,
2502     {
2503       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
2504       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2505     }
2506   },
2507   {
2508     "simd", false, false,
2509     {
2510       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2511       isa_bit_fp_dbl, isa_nobit
2512     }
2513   },
2514   {
2515     "neon-fp16", false, false,
2516     {
2517       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2518       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2519     }
2520   },
2521   {
2522     "neon-vfpv4", false, false,
2523     {
2524       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2525       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2526     }
2527   },
2528   {
2529     "nosimd", true, false,
2530     {
2531       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
2532       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
2533     }
2534   },
2535   {
2536     "nofp", true, false,
2537     {
2538       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2539       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2540       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2541       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2542     }
2543   },
2544   {
2545     "vfpv3-d16", false, true,
2546     {
2547       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2548     }
2549   },
2550   {
2551     "neon", false, true,
2552     {
2553       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2554       isa_bit_fp_dbl, isa_nobit
2555     }
2556   },
2557   {
2558     "neon-vfpv3", false, true,
2559     {
2560       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2561       isa_bit_fp_dbl, isa_nobit
2562     }
2563   },
2564   { NULL, false, false, {isa_nobit}}
2565 };
2566 
2567 static const struct cpu_arch_extension arch_opttab_armv7ve[] = {
2568   {
2569     "vfpv3-d16", false, false,
2570     {
2571       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2572     }
2573   },
2574   {
2575     "vfpv3", false, false,
2576     {
2577       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
2578       isa_nobit
2579     }
2580   },
2581   {
2582     "vfpv3-d16-fp16", false, false,
2583     {
2584       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2585       isa_nobit
2586     }
2587   },
2588   {
2589     "vfpv3-fp16", false, false,
2590     {
2591       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
2592       isa_bit_fp_dbl, isa_nobit
2593     }
2594   },
2595   {
2596     "fp", false, false,
2597     {
2598       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2599       isa_bit_fp_dbl, isa_nobit
2600     }
2601   },
2602   {
2603     "vfpv4", false, false,
2604     {
2605       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
2606       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2607     }
2608   },
2609   {
2610     "neon", false, false,
2611     {
2612       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2613       isa_bit_fp_dbl, isa_nobit
2614     }
2615   },
2616   {
2617     "neon-fp16", false, false,
2618     {
2619       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2620       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2621     }
2622   },
2623   {
2624     "simd", false, false,
2625     {
2626       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2627       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2628     }
2629   },
2630   {
2631     "nosimd", true, false,
2632     {
2633       isa_bit_i8mm, isa_bit_fp16fml, isa_bit_dotprod, isa_bit_neon,
2634       isa_bit_fp_d32, isa_bit_crypto, isa_nobit
2635     }
2636   },
2637   {
2638     "nofp", true, false,
2639     {
2640       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2641       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2642       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2643       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2644     }
2645   },
2646   {
2647     "vfpv4-d16", false, true,
2648     {
2649       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2650       isa_bit_fp_dbl, isa_nobit
2651     }
2652   },
2653   {
2654     "neon-vfpv3", false, true,
2655     {
2656       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
2657       isa_bit_fp_dbl, isa_nobit
2658     }
2659   },
2660   {
2661     "neon-vfpv4", false, true,
2662     {
2663       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2664       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2665     }
2666   },
2667   { NULL, false, false, {isa_nobit}}
2668 };
2669 
2670 static const struct cpu_arch_extension arch_opttab_armv7_r[] = {
2671   {
2672     "fp.sp", false, false,
2673     {
2674       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
2675     }
2676   },
2677   {
2678     "fp", false, false,
2679     {
2680       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2681     }
2682   },
2683   {
2684     "vfpv3xd-fp16", false, false,
2685     {
2686       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit
2687     }
2688   },
2689   {
2690     "vfpv3-d16-fp16", false, false,
2691     {
2692       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
2693       isa_nobit
2694     }
2695   },
2696   {
2697     "idiv", false, false,
2698     {
2699       isa_bit_adiv, isa_nobit
2700     }
2701   },
2702   {
2703     "nofp", true, false,
2704     {
2705       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2706       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2707       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2708       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2709     }
2710   },
2711   {
2712     "noidiv", true, false,
2713     {
2714       isa_bit_adiv, isa_nobit
2715     }
2716   },
2717   {
2718     "vfpv3xd", false, true,
2719     {
2720       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
2721     }
2722   },
2723   {
2724     "vfpv3-d16", false, true,
2725     {
2726       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
2727     }
2728   },
2729   { NULL, false, false, {isa_nobit}}
2730 };
2731 
2732 static const struct cpu_arch_extension arch_opttab_armv7e_m[] = {
2733   {
2734     "fp", false, false,
2735     {
2736       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2737       isa_nobit
2738     }
2739   },
2740   {
2741     "fpv5", false, false,
2742     {
2743       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2744       isa_bit_fp16conv, isa_nobit
2745     }
2746   },
2747   {
2748     "fp.dp", false, false,
2749     {
2750       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2751       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2752     }
2753   },
2754   {
2755     "nofp", true, false,
2756     {
2757       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2758       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2759       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2760       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2761     }
2762   },
2763   {
2764     "vfpv4-sp-d16", false, true,
2765     {
2766       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
2767       isa_nobit
2768     }
2769   },
2770   {
2771     "fpv5-d16", false, true,
2772     {
2773       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
2774       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2775     }
2776   },
2777   { NULL, false, false, {isa_nobit}}
2778 };
2779 
2780 static const struct cpu_arch_extension arch_opttab_armv8_a[] = {
2781   {
2782     "crc", false, false,
2783     {
2784       isa_bit_crc32, isa_nobit
2785     }
2786   },
2787   {
2788     "simd", false, false,
2789     {
2790       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2791       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2792       isa_nobit
2793     }
2794   },
2795   {
2796     "crypto", false, false,
2797     {
2798       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2799       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2800       isa_bit_fp_dbl, isa_nobit
2801     }
2802   },
2803   {
2804     "nocrypto", true, false,
2805     {
2806       isa_bit_crypto, isa_nobit
2807     }
2808   },
2809   {
2810     "nofp", true, false,
2811     {
2812       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2813       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2814       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2815       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2816     }
2817   },
2818   {
2819     "sb", false, false,
2820     {
2821       isa_bit_sb, isa_nobit
2822     }
2823   },
2824   {
2825     "predres", false, false,
2826     {
2827       isa_bit_predres, isa_nobit
2828     }
2829   },
2830   { NULL, false, false, {isa_nobit}}
2831 };
2832 
2833 static const struct cpu_arch_extension arch_opttab_armv8_1_a[] = {
2834   {
2835     "simd", false, false,
2836     {
2837       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2838       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2839       isa_nobit
2840     }
2841   },
2842   {
2843     "crypto", false, false,
2844     {
2845       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2846       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2847       isa_bit_fp_dbl, isa_nobit
2848     }
2849   },
2850   {
2851     "nocrypto", true, false,
2852     {
2853       isa_bit_crypto, isa_nobit
2854     }
2855   },
2856   {
2857     "nofp", true, false,
2858     {
2859       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2860       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2861       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2862       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2863     }
2864   },
2865   {
2866     "sb", false, false,
2867     {
2868       isa_bit_sb, isa_nobit
2869     }
2870   },
2871   {
2872     "predres", false, false,
2873     {
2874       isa_bit_predres, isa_nobit
2875     }
2876   },
2877   { NULL, false, false, {isa_nobit}}
2878 };
2879 
2880 static const struct cpu_arch_extension arch_opttab_armv8_2_a[] = {
2881   {
2882     "simd", false, false,
2883     {
2884       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2885       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2886       isa_nobit
2887     }
2888   },
2889   {
2890     "fp16", false, false,
2891     {
2892       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2893       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2894       isa_bit_fp_dbl, isa_nobit
2895     }
2896   },
2897   {
2898     "fp16fml", false, false,
2899     {
2900       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2901       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16,
2902       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2903     }
2904   },
2905   {
2906     "crypto", false, false,
2907     {
2908       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2909       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2910       isa_bit_fp_dbl, isa_nobit
2911     }
2912   },
2913   {
2914     "nocrypto", true, false,
2915     {
2916       isa_bit_crypto, isa_nobit
2917     }
2918   },
2919   {
2920     "nofp", true, false,
2921     {
2922       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2923       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
2924       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2925       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
2926     }
2927   },
2928   {
2929     "dotprod", false, false,
2930     {
2931       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
2932       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2933       isa_bit_fp_dbl, isa_nobit
2934     }
2935   },
2936   {
2937     "sb", false, false,
2938     {
2939       isa_bit_sb, isa_nobit
2940     }
2941   },
2942   {
2943     "predres", false, false,
2944     {
2945       isa_bit_predres, isa_nobit
2946     }
2947   },
2948   {
2949     "i8mm", false, false,
2950     {
2951       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
2952       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2953       isa_bit_fp_dbl, isa_nobit
2954     }
2955   },
2956   {
2957     "bf16", false, false,
2958     {
2959       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
2960       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
2961       isa_bit_fp_dbl, isa_nobit
2962     }
2963   },
2964   { NULL, false, false, {isa_nobit}}
2965 };
2966 
2967 static const struct cpu_arch_extension arch_opttab_armv8_3_a[] = {
2968   {
2969     "simd", false, false,
2970     {
2971       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2972       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
2973       isa_nobit
2974     }
2975   },
2976   {
2977     "fp16", false, false,
2978     {
2979       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2980       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
2981       isa_bit_fp_dbl, isa_nobit
2982     }
2983   },
2984   {
2985     "fp16fml", false, false,
2986     {
2987       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
2988       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16,
2989       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
2990     }
2991   },
2992   {
2993     "crypto", false, false,
2994     {
2995       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
2996       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
2997       isa_bit_fp_dbl, isa_nobit
2998     }
2999   },
3000   {
3001     "nocrypto", true, false,
3002     {
3003       isa_bit_crypto, isa_nobit
3004     }
3005   },
3006   {
3007     "nofp", true, false,
3008     {
3009       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3010       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3011       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3012       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3013     }
3014   },
3015   {
3016     "dotprod", false, false,
3017     {
3018       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3019       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3020       isa_bit_fp_dbl, isa_nobit
3021     }
3022   },
3023   {
3024     "sb", false, false,
3025     {
3026       isa_bit_sb, isa_nobit
3027     }
3028   },
3029   {
3030     "predres", false, false,
3031     {
3032       isa_bit_predres, isa_nobit
3033     }
3034   },
3035   {
3036     "i8mm", false, false,
3037     {
3038       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3039       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3040       isa_bit_fp_dbl, isa_nobit
3041     }
3042   },
3043   {
3044     "bf16", false, false,
3045     {
3046       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3047       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3048       isa_bit_fp_dbl, isa_nobit
3049     }
3050   },
3051   { NULL, false, false, {isa_nobit}}
3052 };
3053 
3054 static const struct cpu_arch_extension arch_opttab_armv8_4_a[] = {
3055   {
3056     "simd", false, false,
3057     {
3058       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3059       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3060       isa_bit_fp_dbl, isa_nobit
3061     }
3062   },
3063   {
3064     "fp16", false, false,
3065     {
3066       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
3067       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3068       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3069     }
3070   },
3071   {
3072     "crypto", false, false,
3073     {
3074       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3075       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3076       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3077     }
3078   },
3079   {
3080     "nocrypto", true, false,
3081     {
3082       isa_bit_crypto, isa_nobit
3083     }
3084   },
3085   {
3086     "nofp", true, false,
3087     {
3088       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3089       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3090       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3091       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3092     }
3093   },
3094   {
3095     "sb", false, false,
3096     {
3097       isa_bit_sb, isa_nobit
3098     }
3099   },
3100   {
3101     "predres", false, false,
3102     {
3103       isa_bit_predres, isa_nobit
3104     }
3105   },
3106   {
3107     "i8mm", false, false,
3108     {
3109       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3110       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3111       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3112     }
3113   },
3114   {
3115     "bf16", false, false,
3116     {
3117       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3118       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3119       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3120     }
3121   },
3122   { NULL, false, false, {isa_nobit}}
3123 };
3124 
3125 static const struct cpu_arch_extension arch_opttab_armv8_5_a[] = {
3126   {
3127     "simd", false, false,
3128     {
3129       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3130       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3131       isa_bit_fp_dbl, isa_nobit
3132     }
3133   },
3134   {
3135     "fp16", false, false,
3136     {
3137       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
3138       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3139       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3140     }
3141   },
3142   {
3143     "crypto", false, false,
3144     {
3145       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3146       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3147       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3148     }
3149   },
3150   {
3151     "nocrypto", true, false,
3152     {
3153       isa_bit_crypto, isa_nobit
3154     }
3155   },
3156   {
3157     "nofp", true, false,
3158     {
3159       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3160       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3161       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3162       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3163     }
3164   },
3165   {
3166     "i8mm", false, false,
3167     {
3168       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3169       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3170       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3171     }
3172   },
3173   {
3174     "bf16", false, false,
3175     {
3176       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3177       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3178       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3179     }
3180   },
3181   { NULL, false, false, {isa_nobit}}
3182 };
3183 
3184 static const struct cpu_arch_extension arch_opttab_armv8_6_a[] = {
3185   {
3186     "simd", false, false,
3187     {
3188       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3189       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3190       isa_bit_fp_dbl, isa_nobit
3191     }
3192   },
3193   {
3194     "fp16", false, false,
3195     {
3196       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
3197       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3198       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3199     }
3200   },
3201   {
3202     "crypto", false, false,
3203     {
3204       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3205       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3206       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3207     }
3208   },
3209   {
3210     "nocrypto", true, false,
3211     {
3212       isa_bit_crypto, isa_nobit
3213     }
3214   },
3215   {
3216     "nofp", true, false,
3217     {
3218       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3219       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3220       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3221       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3222     }
3223   },
3224   {
3225     "i8mm", false, false,
3226     {
3227       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3228       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3229       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3230     }
3231   },
3232   {
3233     "bf16", false, false,
3234     {
3235       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3236       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3237       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3238     }
3239   },
3240   { NULL, false, false, {isa_nobit}}
3241 };
3242 
3243 static const struct cpu_arch_extension arch_opttab_armv8_m_main[] = {
3244   {
3245     "dsp", false, false,
3246     {
3247       isa_bit_armv7em, isa_nobit
3248     }
3249   },
3250   {
3251     "fp", false, false,
3252     {
3253       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3254       isa_bit_fp16conv, isa_nobit
3255     }
3256   },
3257   {
3258     "fp.dp", false, false,
3259     {
3260       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3261       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3262     }
3263   },
3264   {
3265     "nofp", true, false,
3266     {
3267       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3268       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3269       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3270       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3271     }
3272   },
3273   {
3274     "nodsp", true, false,
3275     {
3276       isa_bit_armv7em, isa_nobit
3277     }
3278   },
3279   {
3280     "cdecp0", false, false,
3281     {
3282       isa_bit_cdecp0, isa_nobit
3283     }
3284   },
3285   {
3286     "cdecp1", false, false,
3287     {
3288       isa_bit_cdecp1, isa_nobit
3289     }
3290   },
3291   {
3292     "cdecp2", false, false,
3293     {
3294       isa_bit_cdecp2, isa_nobit
3295     }
3296   },
3297   {
3298     "cdecp3", false, false,
3299     {
3300       isa_bit_cdecp3, isa_nobit
3301     }
3302   },
3303   {
3304     "cdecp4", false, false,
3305     {
3306       isa_bit_cdecp4, isa_nobit
3307     }
3308   },
3309   {
3310     "cdecp5", false, false,
3311     {
3312       isa_bit_cdecp5, isa_nobit
3313     }
3314   },
3315   {
3316     "cdecp6", false, false,
3317     {
3318       isa_bit_cdecp6, isa_nobit
3319     }
3320   },
3321   {
3322     "cdecp7", false, false,
3323     {
3324       isa_bit_cdecp7, isa_nobit
3325     }
3326   },
3327   { NULL, false, false, {isa_nobit}}
3328 };
3329 
3330 static const struct cpu_arch_extension arch_opttab_armv8_r[] = {
3331   {
3332     "crc", false, false,
3333     {
3334       isa_bit_crc32, isa_nobit
3335     }
3336   },
3337   {
3338     "fp.sp", false, false,
3339     {
3340       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3341       isa_bit_fp16conv, isa_nobit
3342     }
3343   },
3344   {
3345     "simd", false, false,
3346     {
3347       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3348       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
3349       isa_nobit
3350     }
3351   },
3352   {
3353     "crypto", false, false,
3354     {
3355       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
3356       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
3357       isa_bit_fp_dbl, isa_nobit
3358     }
3359   },
3360   {
3361     "nocrypto", true, false,
3362     {
3363       isa_bit_crypto, isa_nobit
3364     }
3365   },
3366   {
3367     "nofp", true, false,
3368     {
3369       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3370       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3371       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3372       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3373     }
3374   },
3375   { NULL, false, false, {isa_nobit}}
3376 };
3377 
3378 static const struct cpu_arch_extension arch_opttab_armv8_1_m_main[] = {
3379   {
3380     "dsp", false, false,
3381     {
3382       isa_bit_armv7em, isa_nobit
3383     }
3384   },
3385   {
3386     "fp", false, false,
3387     {
3388       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3389       isa_bit_fp16, isa_bit_fp16conv, isa_nobit
3390     }
3391   },
3392   {
3393     "fp.dp", false, false,
3394     {
3395       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
3396       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3397     }
3398   },
3399   {
3400     "nofp", true, false,
3401     {
3402       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3403       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3404       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3405       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3406     }
3407   },
3408   {
3409     "mve", false, false,
3410     {
3411       isa_bit_mve, isa_bit_armv7em, isa_nobit
3412     }
3413   },
3414   {
3415     "mve.fp", false, false,
3416     {
3417       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_mve,
3418       isa_bit_armv7em, isa_bit_fpv5, isa_bit_fp16, isa_bit_fp16conv,
3419       isa_bit_mve_float, isa_nobit
3420     }
3421   },
3422   {
3423     "cdecp0", false, false,
3424     {
3425       isa_bit_cdecp0, isa_nobit
3426     }
3427   },
3428   {
3429     "cdecp1", false, false,
3430     {
3431       isa_bit_cdecp1, isa_nobit
3432     }
3433   },
3434   {
3435     "cdecp2", false, false,
3436     {
3437       isa_bit_cdecp2, isa_nobit
3438     }
3439   },
3440   {
3441     "cdecp3", false, false,
3442     {
3443       isa_bit_cdecp3, isa_nobit
3444     }
3445   },
3446   {
3447     "cdecp4", false, false,
3448     {
3449       isa_bit_cdecp4, isa_nobit
3450     }
3451   },
3452   {
3453     "cdecp5", false, false,
3454     {
3455       isa_bit_cdecp5, isa_nobit
3456     }
3457   },
3458   {
3459     "cdecp6", false, false,
3460     {
3461       isa_bit_cdecp6, isa_nobit
3462     }
3463   },
3464   {
3465     "cdecp7", false, false,
3466     {
3467       isa_bit_cdecp7, isa_nobit
3468     }
3469   },
3470   { NULL, false, false, {isa_nobit}}
3471 };
3472 
3473 static const struct cpu_arch_extension arch_opttab_armv9_a[] = {
3474   {
3475     "simd", false, false,
3476     {
3477       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3478       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3479       isa_bit_fp_dbl, isa_nobit
3480     }
3481   },
3482   {
3483     "fp16", false, false,
3484     {
3485       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16fml,
3486       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3487       isa_bit_fp16, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3488     }
3489   },
3490   {
3491     "crypto", false, false,
3492     {
3493       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_dotprod,
3494       isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv,
3495       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3496     }
3497   },
3498   {
3499     "nocrypto", true, false,
3500     {
3501       isa_bit_crypto, isa_nobit
3502     }
3503   },
3504   {
3505     "nofp", true, false,
3506     {
3507       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3508       isa_bit_fp16fml, isa_bit_bf16, isa_bit_dotprod, isa_bit_neon,
3509       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16, isa_bit_fp16conv,
3510       isa_bit_crypto, isa_bit_fp_dbl, isa_nobit
3511     }
3512   },
3513   {
3514     "i8mm", false, false,
3515     {
3516       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_i8mm,
3517       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3518       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3519     }
3520   },
3521   {
3522     "bf16", false, false,
3523     {
3524       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_bf16,
3525       isa_bit_dotprod, isa_bit_neon, isa_bit_fpv5, isa_bit_fp_d32,
3526       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
3527     }
3528   },
3529   { NULL, false, false, {isa_nobit}}
3530 };
3531 
3532 const arch_option all_architectures[] =
3533 {
3534   {
3535     "armv4",
3536     NULL,
3537     {
3538       isa_bit_armv4, isa_bit_notm, isa_nobit
3539     },
3540     "4", BASE_ARCH_4,
3541     0,
3542     TARGET_CPU_arm7tdmi,
3543   },
3544   {
3545     "armv4t",
3546     NULL,
3547     {
3548       isa_bit_thumb, isa_bit_armv4, isa_bit_notm, isa_nobit
3549     },
3550     "4T", BASE_ARCH_4T,
3551     0,
3552     TARGET_CPU_arm7tdmi,
3553   },
3554   {
3555     "armv5t",
3556     NULL,
3557     {
3558       isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4, isa_bit_notm,
3559       isa_nobit
3560     },
3561     "5T", BASE_ARCH_5T,
3562     0,
3563     TARGET_CPU_arm10tdmi,
3564   },
3565   {
3566     "armv5te",
3567     arch_opttab_armv5te,
3568     {
3569       isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
3570       isa_bit_notm, isa_nobit
3571     },
3572     "5TE", BASE_ARCH_5TE,
3573     0,
3574     TARGET_CPU_arm1026ejs,
3575   },
3576   {
3577     "armv5tej",
3578     arch_opttab_armv5tej,
3579     {
3580       isa_bit_armv5te, isa_bit_thumb, isa_bit_armv5t, isa_bit_armv4,
3581       isa_bit_notm, isa_nobit
3582     },
3583     "5TEJ", BASE_ARCH_5TEJ,
3584     0,
3585     TARGET_CPU_arm1026ejs,
3586   },
3587   {
3588     "armv6",
3589     arch_opttab_armv6,
3590     {
3591       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3592       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3593     },
3594     "6", BASE_ARCH_6,
3595     0,
3596     TARGET_CPU_arm1136js,
3597   },
3598   {
3599     "armv6j",
3600     arch_opttab_armv6j,
3601     {
3602       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3603       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3604     },
3605     "6J", BASE_ARCH_6J,
3606     0,
3607     TARGET_CPU_arm1136js,
3608   },
3609   {
3610     "armv6k",
3611     arch_opttab_armv6k,
3612     {
3613       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3614       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_bit_armv6k,
3615       isa_nobit
3616     },
3617     "6K", BASE_ARCH_6K,
3618     0,
3619     TARGET_CPU_mpcore,
3620   },
3621   {
3622     "armv6z",
3623     arch_opttab_armv6z,
3624     {
3625       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3626       isa_bit_armv4, isa_bit_armv6, isa_bit_notm, isa_nobit
3627     },
3628     "6Z", BASE_ARCH_6Z,
3629     0,
3630     TARGET_CPU_arm1176jzs,
3631   },
3632   {
3633     "armv6kz",
3634     arch_opttab_armv6kz,
3635     {
3636       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3637       isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
3638       isa_bit_armv6k, isa_nobit
3639     },
3640     "6KZ", BASE_ARCH_6KZ,
3641     0,
3642     TARGET_CPU_arm1176jzs,
3643   },
3644   {
3645     "armv6zk",
3646     arch_opttab_armv6zk,
3647     {
3648       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3649       isa_bit_armv4, isa_bit_armv6, isa_bit_quirk_armv6kz, isa_bit_notm,
3650       isa_bit_armv6k, isa_nobit
3651     },
3652     "6KZ", BASE_ARCH_6KZ,
3653     0,
3654     TARGET_CPU_arm1176jzs,
3655   },
3656   {
3657     "armv6t2",
3658     arch_opttab_armv6t2,
3659     {
3660       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3661       isa_bit_armv4, isa_bit_armv6, isa_bit_thumb2, isa_bit_notm,
3662       isa_nobit
3663     },
3664     "6T2", BASE_ARCH_6T2,
3665     0,
3666     TARGET_CPU_arm1156t2s,
3667   },
3668   {
3669     "armv6-m",
3670     NULL,
3671     {
3672       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3673       isa_bit_armv4, isa_bit_armv6, isa_nobit
3674     },
3675     "6M", BASE_ARCH_6M,
3676     'M',
3677     TARGET_CPU_cortexm1,
3678   },
3679   {
3680     "armv6s-m",
3681     NULL,
3682     {
3683       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3684       isa_bit_armv4, isa_bit_armv6, isa_nobit
3685     },
3686     "6M", BASE_ARCH_6M,
3687     'M',
3688     TARGET_CPU_cortexm1,
3689   },
3690   {
3691     "armv7",
3692     arch_opttab_armv7,
3693     {
3694       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3695       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2,
3696       isa_nobit
3697     },
3698     "7", BASE_ARCH_7,
3699     0,
3700     TARGET_CPU_cortexa53,
3701   },
3702   {
3703     "armv7-a",
3704     arch_opttab_armv7_a,
3705     {
3706       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3707       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_thumb2,
3708       isa_bit_notm, isa_bit_armv6k, isa_nobit
3709     },
3710     "7A", BASE_ARCH_7A,
3711     'A',
3712     TARGET_CPU_cortexa53,
3713   },
3714   {
3715     "armv7ve",
3716     arch_opttab_armv7ve,
3717     {
3718       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3719       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3720       isa_bit_armv7, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm,
3721       isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit
3722     },
3723     "7A", BASE_ARCH_7A,
3724     'A',
3725     TARGET_CPU_cortexa53,
3726   },
3727   {
3728     "armv7-r",
3729     arch_opttab_armv7_r,
3730     {
3731       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3732       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
3733       isa_bit_thumb2, isa_bit_notm, isa_bit_armv6k, isa_nobit
3734     },
3735     "7R", BASE_ARCH_7R,
3736     'R',
3737     TARGET_CPU_cortexr4,
3738   },
3739   {
3740     "armv7-m",
3741     NULL,
3742     {
3743       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3744       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_tdiv,
3745       isa_bit_thumb2, isa_nobit
3746     },
3747     "7M", BASE_ARCH_7M,
3748     'M',
3749     TARGET_CPU_cortexm3,
3750   },
3751   {
3752     "armv7e-m",
3753     arch_opttab_armv7e_m,
3754     {
3755       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3756       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7em, isa_bit_armv7,
3757       isa_bit_tdiv, isa_bit_thumb2, isa_nobit
3758     },
3759     "7EM", BASE_ARCH_7EM,
3760     'M',
3761     TARGET_CPU_cortexm4,
3762   },
3763   {
3764     "armv8-a",
3765     arch_opttab_armv8_a,
3766     {
3767       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3768       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3769       isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2,
3770       isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec,
3771       isa_nobit
3772     },
3773     "8A", BASE_ARCH_8A,
3774     'A',
3775     TARGET_CPU_cortexa53,
3776   },
3777   {
3778     "armv8.1-a",
3779     arch_opttab_armv8_1_a,
3780     {
3781       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3782       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3783       isa_bit_armv7, isa_bit_crc32, isa_bit_armv8, isa_bit_tdiv,
3784       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv6k,
3785       isa_bit_mp, isa_bit_sec, isa_nobit
3786     },
3787     "8A", BASE_ARCH_8A,
3788     'A',
3789     TARGET_CPU_cortexa53,
3790   },
3791   {
3792     "armv8.2-a",
3793     arch_opttab_armv8_2_a,
3794     {
3795       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3796       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3797       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3798       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3799       isa_bit_armv6k, isa_bit_mp, isa_bit_sec, isa_nobit
3800     },
3801     "8A", BASE_ARCH_8A,
3802     'A',
3803     TARGET_CPU_cortexa53,
3804   },
3805   {
3806     "armv8.3-a",
3807     arch_opttab_armv8_3_a,
3808     {
3809       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3810       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3811       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3812       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3813       isa_bit_armv6k, isa_bit_armv8_3, isa_bit_mp, isa_bit_sec,
3814       isa_nobit
3815     },
3816     "8A", BASE_ARCH_8A,
3817     'A',
3818     TARGET_CPU_cortexa53,
3819   },
3820   {
3821     "armv8.4-a",
3822     arch_opttab_armv8_4_a,
3823     {
3824       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3825       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3826       isa_bit_crc32, isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv,
3827       isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1, isa_bit_armv8_2,
3828       isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4, isa_bit_mp,
3829       isa_bit_sec, isa_nobit
3830     },
3831     "8A", BASE_ARCH_8A,
3832     'A',
3833     TARGET_CPU_cortexa53,
3834   },
3835   {
3836     "armv8.5-a",
3837     arch_opttab_armv8_5_a,
3838     {
3839       isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb,
3840       isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4,
3841       isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
3842       isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1,
3843       isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3, isa_bit_armv8_4,
3844       isa_bit_mp, isa_bit_armv8_5, isa_bit_sec, isa_bit_predres,
3845       isa_nobit
3846     },
3847     "8A", BASE_ARCH_8A,
3848     'A',
3849     TARGET_CPU_cortexa53,
3850   },
3851   {
3852     "armv8.6-a",
3853     arch_opttab_armv8_6_a,
3854     {
3855       isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb,
3856       isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4,
3857       isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
3858       isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm, isa_bit_armv8_1,
3859       isa_bit_armv6k, isa_bit_armv8_2, isa_bit_armv8_3, isa_bit_mp,
3860       isa_bit_armv8_4, isa_bit_armv8_5, isa_bit_armv8_6, isa_bit_sec,
3861       isa_bit_predres, isa_nobit
3862     },
3863     "8A", BASE_ARCH_8A,
3864     'A',
3865     TARGET_CPU_cortexa53,
3866   },
3867   {
3868     "armv8-m.base",
3869     NULL,
3870     {
3871       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3872       isa_bit_armv4, isa_bit_armv6, isa_bit_armv8, isa_bit_cmse,
3873       isa_bit_tdiv, isa_nobit
3874     },
3875     "8M_BASE", BASE_ARCH_8M_BASE,
3876     'M',
3877     TARGET_CPU_cortexm23,
3878   },
3879   {
3880     "armv8-m.main",
3881     arch_opttab_armv8_m_main,
3882     {
3883       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3884       isa_bit_armv4, isa_bit_armv6, isa_bit_armv7, isa_bit_armv8,
3885       isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2, isa_nobit
3886     },
3887     "8M_MAIN", BASE_ARCH_8M_MAIN,
3888     'M',
3889     TARGET_CPU_cortexm7,
3890   },
3891   {
3892     "armv8-r",
3893     arch_opttab_armv8_r,
3894     {
3895       isa_bit_adiv, isa_bit_armv5te, isa_bit_thumb, isa_bit_be8,
3896       isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4, isa_bit_armv6,
3897       isa_bit_armv7, isa_bit_armv8, isa_bit_tdiv, isa_bit_thumb2,
3898       isa_bit_notm, isa_bit_armv6k, isa_bit_mp, isa_bit_sec,
3899       isa_nobit
3900     },
3901     "8R", BASE_ARCH_8R,
3902     'R',
3903     TARGET_CPU_cortexr52,
3904   },
3905   {
3906     "armv8.1-m.main",
3907     arch_opttab_armv8_1_m_main,
3908     {
3909       isa_bit_armv5te, isa_bit_thumb, isa_bit_be8, isa_bit_armv5t,
3910       isa_bit_armv4, isa_bit_armv8_1m_main, isa_bit_armv6, isa_bit_armv7,
3911       isa_bit_armv8, isa_bit_cmse, isa_bit_tdiv, isa_bit_thumb2,
3912       isa_nobit
3913     },
3914     "8M_MAIN", BASE_ARCH_8M_MAIN,
3915     'M',
3916     TARGET_CPU_cortexm55,
3917   },
3918   {
3919     "armv9-a",
3920     arch_opttab_armv9_a,
3921     {
3922       isa_bit_adiv, isa_bit_armv5te, isa_bit_sb, isa_bit_thumb,
3923       isa_bit_be8, isa_bit_armv5t, isa_bit_lpae, isa_bit_armv4,
3924       isa_bit_armv6, isa_bit_crc32, isa_bit_armv7, isa_bit_armv8,
3925       isa_bit_armv9, isa_bit_tdiv, isa_bit_thumb2, isa_bit_notm,
3926       isa_bit_armv8_1, isa_bit_armv8_2, isa_bit_armv6k, isa_bit_armv8_3,
3927       isa_bit_mp, isa_bit_armv8_4, isa_bit_armv8_5, isa_bit_sec,
3928       isa_bit_predres, isa_nobit
3929     },
3930     "9A", BASE_ARCH_9A,
3931     'A',
3932     TARGET_CPU_cortexa53,
3933   },
3934   {
3935     "iwmmxt",
3936     NULL,
3937     {
3938       isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
3939       isa_bit_armv5t, isa_bit_armv4, isa_bit_notm, isa_nobit
3940     },
3941     "5TE", BASE_ARCH_5TE,
3942     0,
3943     TARGET_CPU_iwmmxt,
3944   },
3945   {
3946     "iwmmxt2",
3947     NULL,
3948     {
3949       isa_bit_iwmmxt, isa_bit_armv5te, isa_bit_xscale, isa_bit_thumb,
3950       isa_bit_armv5t, isa_bit_armv4, isa_bit_iwmmxt2, isa_bit_notm,
3951       isa_nobit
3952     },
3953     "5TE", BASE_ARCH_5TE,
3954     0,
3955     TARGET_CPU_iwmmxt2,
3956   },
3957   {{NULL, NULL, {isa_nobit}},
3958    NULL, BASE_ARCH_0, 0, TARGET_CPU_arm_none}
3959 };
3960 
3961 const arm_fpu_desc all_fpus[] =
3962 {
3963   {
3964     "vfp",
3965     {
3966       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
3967     }
3968   },
3969   {
3970     "vfpv2",
3971     {
3972       isa_bit_vfpv2, isa_bit_fp_dbl, isa_nobit
3973     }
3974   },
3975   {
3976     "vfpv3",
3977     {
3978       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
3979       isa_nobit
3980     }
3981   },
3982   {
3983     "vfpv3-fp16",
3984     {
3985       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp16conv,
3986       isa_bit_fp_dbl, isa_nobit
3987     }
3988   },
3989   {
3990     "vfpv3-d16",
3991     {
3992       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_dbl, isa_nobit
3993     }
3994   },
3995   {
3996     "vfpv3-d16-fp16",
3997     {
3998       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_bit_fp_dbl,
3999       isa_nobit
4000     }
4001   },
4002   {
4003     "vfpv3xd",
4004     {
4005       isa_bit_vfpv2, isa_bit_vfpv3, isa_nobit
4006     }
4007   },
4008   {
4009     "vfpv3xd-fp16",
4010     {
4011       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp16conv, isa_nobit
4012     }
4013   },
4014   {
4015     "neon",
4016     {
4017       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
4018       isa_bit_fp_dbl, isa_nobit
4019     }
4020   },
4021   {
4022     "neon-vfpv3",
4023     {
4024       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
4025       isa_bit_fp_dbl, isa_nobit
4026     }
4027   },
4028   {
4029     "neon-fp16",
4030     {
4031       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_neon, isa_bit_fp_d32,
4032       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
4033     }
4034   },
4035   {
4036     "vfpv4",
4037     {
4038       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp_d32,
4039       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
4040     }
4041   },
4042   {
4043     "neon-vfpv4",
4044     {
4045       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
4046       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
4047     }
4048   },
4049   {
4050     "vfpv4-d16",
4051     {
4052       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
4053       isa_bit_fp_dbl, isa_nobit
4054     }
4055   },
4056   {
4057     "fpv4-sp-d16",
4058     {
4059       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fp16conv,
4060       isa_nobit
4061     }
4062   },
4063   {
4064     "fpv5-sp-d16",
4065     {
4066       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
4067       isa_bit_fp16conv, isa_nobit
4068     }
4069   },
4070   {
4071     "fpv5-d16",
4072     {
4073       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
4074       isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
4075     }
4076   },
4077   {
4078     "fp-armv8",
4079     {
4080       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_fpv5,
4081       isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl, isa_nobit
4082     }
4083   },
4084   {
4085     "neon-fp-armv8",
4086     {
4087       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
4088       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_fp_dbl,
4089       isa_nobit
4090     }
4091   },
4092   {
4093     "crypto-neon-fp-armv8",
4094     {
4095       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_vfpv4, isa_bit_neon,
4096       isa_bit_fpv5, isa_bit_fp_d32, isa_bit_fp16conv, isa_bit_crypto,
4097       isa_bit_fp_dbl, isa_nobit
4098     }
4099   },
4100   {
4101     "vfp3",
4102     {
4103       isa_bit_vfpv2, isa_bit_vfpv3, isa_bit_fp_d32, isa_bit_fp_dbl,
4104       isa_nobit
4105     }
4106   },
4107 };
4108