1 /* This file is automatically generated. DO NOT EDIT! */ 2 /* Generated from: NetBSD: mknative-gcc,v 1.117 2023/07/31 01:48:37 mrg Exp */ 3 /* Generated from: NetBSD: mknative.common,v 1.16 2018/04/15 15:13:37 christos Exp */ 4 5 /* -*- buffer-read-only: t -*- 6 Generated automatically by parsecpu.awk from arm-cpus.in. 7 Do not edit. 8 9 Copyright (C) 2011-2022 Free Software Foundation, Inc. 10 11 This file is part of GCC. 12 13 GCC is free software; you can redistribute it and/or modify 14 it under the terms of the GNU General Public License as 15 published by the Free Software Foundation; either version 3, 16 or (at your option) any later version. 17 18 GCC is distributed in the hope that it will be useful, 19 but WITHOUT ANY WARRANTY; without even the implied warranty of 20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 GNU General Public License for more details. 22 23 You should have received a copy of the GNU General Public 24 License along with GCC; see the file COPYING3. If not see 25 <http://www.gnu.org/licenses/>. */ 26 27 enum processor_type 28 { 29 TARGET_CPU_arm8, 30 TARGET_CPU_arm810, 31 TARGET_CPU_strongarm, 32 TARGET_CPU_fa526, 33 TARGET_CPU_fa626, 34 TARGET_CPU_arm7tdmi, 35 TARGET_CPU_arm710t, 36 TARGET_CPU_arm9, 37 TARGET_CPU_arm9tdmi, 38 TARGET_CPU_arm920t, 39 TARGET_CPU_arm10tdmi, 40 TARGET_CPU_arm9e, 41 TARGET_CPU_arm10e, 42 TARGET_CPU_xscale, 43 TARGET_CPU_iwmmxt, 44 TARGET_CPU_iwmmxt2, 45 TARGET_CPU_fa606te, 46 TARGET_CPU_fa626te, 47 TARGET_CPU_fmp626, 48 TARGET_CPU_fa726te, 49 TARGET_CPU_arm926ejs, 50 TARGET_CPU_arm1026ejs, 51 TARGET_CPU_arm1136js, 52 TARGET_CPU_arm1136jfs, 53 TARGET_CPU_arm1176jzs, 54 TARGET_CPU_arm1176jzfs, 55 TARGET_CPU_mpcorenovfp, 56 TARGET_CPU_mpcore, 57 TARGET_CPU_arm1156t2s, 58 TARGET_CPU_arm1156t2fs, 59 TARGET_CPU_cortexm1, 60 TARGET_CPU_cortexm0, 61 TARGET_CPU_cortexm0plus, 62 TARGET_CPU_cortexm1smallmultiply, 63 TARGET_CPU_cortexm0smallmultiply, 64 TARGET_CPU_cortexm0plussmallmultiply, 65 TARGET_CPU_genericv7a, 66 TARGET_CPU_cortexa5, 67 TARGET_CPU_cortexa7, 68 TARGET_CPU_cortexa8, 69 TARGET_CPU_cortexa9, 70 TARGET_CPU_cortexa12, 71 TARGET_CPU_cortexa15, 72 TARGET_CPU_cortexa17, 73 TARGET_CPU_cortexr4, 74 TARGET_CPU_cortexr4f, 75 TARGET_CPU_cortexr5, 76 TARGET_CPU_cortexr7, 77 TARGET_CPU_cortexr8, 78 TARGET_CPU_cortexm7, 79 TARGET_CPU_cortexm4, 80 TARGET_CPU_cortexm3, 81 TARGET_CPU_marvell_pj4, 82 TARGET_CPU_cortexa15cortexa7, 83 TARGET_CPU_cortexa17cortexa7, 84 TARGET_CPU_cortexa32, 85 TARGET_CPU_cortexa35, 86 TARGET_CPU_cortexa53, 87 TARGET_CPU_cortexa57, 88 TARGET_CPU_cortexa72, 89 TARGET_CPU_cortexa73, 90 TARGET_CPU_exynosm1, 91 TARGET_CPU_xgene1, 92 TARGET_CPU_cortexa57cortexa53, 93 TARGET_CPU_cortexa72cortexa53, 94 TARGET_CPU_cortexa73cortexa35, 95 TARGET_CPU_cortexa73cortexa53, 96 TARGET_CPU_cortexa55, 97 TARGET_CPU_cortexa75, 98 TARGET_CPU_cortexa76, 99 TARGET_CPU_cortexa76ae, 100 TARGET_CPU_cortexa77, 101 TARGET_CPU_cortexa78, 102 TARGET_CPU_cortexa78ae, 103 TARGET_CPU_cortexa78c, 104 TARGET_CPU_cortexa710, 105 TARGET_CPU_cortexx1, 106 TARGET_CPU_neoversen1, 107 TARGET_CPU_cortexa75cortexa55, 108 TARGET_CPU_cortexa76cortexa55, 109 TARGET_CPU_neoversev1, 110 TARGET_CPU_neoversen2, 111 TARGET_CPU_cortexm23, 112 TARGET_CPU_cortexm33, 113 TARGET_CPU_cortexm35p, 114 TARGET_CPU_cortexm55, 115 TARGET_CPU_cortexr52, 116 TARGET_CPU_cortexr52plus, 117 TARGET_CPU_arm_none 118 }; 119 120 enum arch_type 121 { 122 TARGET_ARCH_armv4, 123 TARGET_ARCH_armv4t, 124 TARGET_ARCH_armv5t, 125 TARGET_ARCH_armv5te, 126 TARGET_ARCH_armv5tej, 127 TARGET_ARCH_armv6, 128 TARGET_ARCH_armv6j, 129 TARGET_ARCH_armv6k, 130 TARGET_ARCH_armv6z, 131 TARGET_ARCH_armv6kz, 132 TARGET_ARCH_armv6zk, 133 TARGET_ARCH_armv6t2, 134 TARGET_ARCH_armv6_m, 135 TARGET_ARCH_armv6s_m, 136 TARGET_ARCH_armv7, 137 TARGET_ARCH_armv7_a, 138 TARGET_ARCH_armv7ve, 139 TARGET_ARCH_armv7_r, 140 TARGET_ARCH_armv7_m, 141 TARGET_ARCH_armv7e_m, 142 TARGET_ARCH_armv8_a, 143 TARGET_ARCH_armv8_1_a, 144 TARGET_ARCH_armv8_2_a, 145 TARGET_ARCH_armv8_3_a, 146 TARGET_ARCH_armv8_4_a, 147 TARGET_ARCH_armv8_5_a, 148 TARGET_ARCH_armv8_6_a, 149 TARGET_ARCH_armv8_m_base, 150 TARGET_ARCH_armv8_m_main, 151 TARGET_ARCH_armv8_r, 152 TARGET_ARCH_armv8_1_m_main, 153 TARGET_ARCH_armv9_a, 154 TARGET_ARCH_iwmmxt, 155 TARGET_ARCH_iwmmxt2, 156 TARGET_ARCH_arm_none 157 }; 158 159 enum fpu_type 160 { 161 TARGET_FPU_vfp, 162 TARGET_FPU_vfpv2, 163 TARGET_FPU_vfpv3, 164 TARGET_FPU_vfpv3_fp16, 165 TARGET_FPU_vfpv3_d16, 166 TARGET_FPU_vfpv3_d16_fp16, 167 TARGET_FPU_vfpv3xd, 168 TARGET_FPU_vfpv3xd_fp16, 169 TARGET_FPU_neon, 170 TARGET_FPU_neon_vfpv3, 171 TARGET_FPU_neon_fp16, 172 TARGET_FPU_vfpv4, 173 TARGET_FPU_neon_vfpv4, 174 TARGET_FPU_vfpv4_d16, 175 TARGET_FPU_fpv4_sp_d16, 176 TARGET_FPU_fpv5_sp_d16, 177 TARGET_FPU_fpv5_d16, 178 TARGET_FPU_fp_armv8, 179 TARGET_FPU_neon_fp_armv8, 180 TARGET_FPU_crypto_neon_fp_armv8, 181 TARGET_FPU_vfp3, 182 TARGET_FPU_auto 183 }; 184