1 /* Definitions for computing resource usage of specific insns. 2 Copyright (C) 1999-2016 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #include "config.h" 21 #include "system.h" 22 #include "coretypes.h" 23 #include "backend.h" 24 #include "rtl.h" 25 #include "df.h" 26 #include "tm_p.h" 27 #include "regs.h" 28 #include "emit-rtl.h" 29 #include "resource.h" 30 #include "insn-attr.h" 31 #include "params.h" 32 33 /* This structure is used to record liveness information at the targets or 34 fallthrough insns of branches. We will most likely need the information 35 at targets again, so save them in a hash table rather than recomputing them 36 each time. */ 37 38 struct target_info 39 { 40 int uid; /* INSN_UID of target. */ 41 struct target_info *next; /* Next info for same hash bucket. */ 42 HARD_REG_SET live_regs; /* Registers live at target. */ 43 int block; /* Basic block number containing target. */ 44 int bb_tick; /* Generation count of basic block info. */ 45 }; 46 47 #define TARGET_HASH_PRIME 257 48 49 /* Indicates what resources are required at the beginning of the epilogue. */ 50 static struct resources start_of_epilogue_needs; 51 52 /* Indicates what resources are required at function end. */ 53 static struct resources end_of_function_needs; 54 55 /* Define the hash table itself. */ 56 static struct target_info **target_hash_table = NULL; 57 58 /* For each basic block, we maintain a generation number of its basic 59 block info, which is updated each time we move an insn from the 60 target of a jump. This is the generation number indexed by block 61 number. */ 62 63 static int *bb_ticks; 64 65 /* Marks registers possibly live at the current place being scanned by 66 mark_target_live_regs. Also used by update_live_status. */ 67 68 static HARD_REG_SET current_live_regs; 69 70 /* Marks registers for which we have seen a REG_DEAD note but no assignment. 71 Also only used by the next two functions. */ 72 73 static HARD_REG_SET pending_dead_regs; 74 75 static void update_live_status (rtx, const_rtx, void *); 76 static int find_basic_block (rtx_insn *, int); 77 static rtx_insn *next_insn_no_annul (rtx_insn *); 78 static rtx_insn *find_dead_or_set_registers (rtx_insn *, struct resources*, 79 rtx *, int, struct resources, 80 struct resources); 81 82 /* Utility function called from mark_target_live_regs via note_stores. 83 It deadens any CLOBBERed registers and livens any SET registers. */ 84 85 static void 86 update_live_status (rtx dest, const_rtx x, void *data ATTRIBUTE_UNUSED) 87 { 88 int first_regno, last_regno; 89 int i; 90 91 if (!REG_P (dest) 92 && (GET_CODE (dest) != SUBREG || !REG_P (SUBREG_REG (dest)))) 93 return; 94 95 if (GET_CODE (dest) == SUBREG) 96 { 97 first_regno = subreg_regno (dest); 98 last_regno = first_regno + subreg_nregs (dest); 99 100 } 101 else 102 { 103 first_regno = REGNO (dest); 104 last_regno = END_REGNO (dest); 105 } 106 107 if (GET_CODE (x) == CLOBBER) 108 for (i = first_regno; i < last_regno; i++) 109 CLEAR_HARD_REG_BIT (current_live_regs, i); 110 else 111 for (i = first_regno; i < last_regno; i++) 112 { 113 SET_HARD_REG_BIT (current_live_regs, i); 114 CLEAR_HARD_REG_BIT (pending_dead_regs, i); 115 } 116 } 117 118 /* Find the number of the basic block with correct live register 119 information that starts closest to INSN. Return -1 if we couldn't 120 find such a basic block or the beginning is more than 121 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for 122 an unlimited search. 123 124 The delay slot filling code destroys the control-flow graph so, 125 instead of finding the basic block containing INSN, we search 126 backwards toward a BARRIER where the live register information is 127 correct. */ 128 129 static int 130 find_basic_block (rtx_insn *insn, int search_limit) 131 { 132 /* Scan backwards to the previous BARRIER. Then see if we can find a 133 label that starts a basic block. Return the basic block number. */ 134 for (insn = prev_nonnote_insn (insn); 135 insn && !BARRIER_P (insn) && search_limit != 0; 136 insn = prev_nonnote_insn (insn), --search_limit) 137 ; 138 139 /* The closest BARRIER is too far away. */ 140 if (search_limit == 0) 141 return -1; 142 143 /* The start of the function. */ 144 else if (insn == 0) 145 return ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index; 146 147 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach 148 anything other than a CODE_LABEL or note, we can't find this code. */ 149 for (insn = next_nonnote_insn (insn); 150 insn && LABEL_P (insn); 151 insn = next_nonnote_insn (insn)) 152 if (BLOCK_FOR_INSN (insn)) 153 return BLOCK_FOR_INSN (insn)->index; 154 155 return -1; 156 } 157 158 /* Similar to next_insn, but ignores insns in the delay slots of 159 an annulled branch. */ 160 161 static rtx_insn * 162 next_insn_no_annul (rtx_insn *insn) 163 { 164 if (insn) 165 { 166 /* If INSN is an annulled branch, skip any insns from the target 167 of the branch. */ 168 if (JUMP_P (insn) 169 && INSN_ANNULLED_BRANCH_P (insn) 170 && NEXT_INSN (PREV_INSN (insn)) != insn) 171 { 172 rtx_insn *next = NEXT_INSN (insn); 173 174 while ((NONJUMP_INSN_P (next) || JUMP_P (next) || CALL_P (next)) 175 && INSN_FROM_TARGET_P (next)) 176 { 177 insn = next; 178 next = NEXT_INSN (insn); 179 } 180 } 181 182 insn = NEXT_INSN (insn); 183 if (insn && NONJUMP_INSN_P (insn) 184 && GET_CODE (PATTERN (insn)) == SEQUENCE) 185 insn = as_a <rtx_sequence *> (PATTERN (insn))->insn (0); 186 } 187 188 return insn; 189 } 190 191 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark 192 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS 193 is TRUE, resources used by the called routine will be included for 194 CALL_INSNs. */ 195 196 void 197 mark_referenced_resources (rtx x, struct resources *res, 198 bool include_delayed_effects) 199 { 200 enum rtx_code code = GET_CODE (x); 201 int i, j; 202 unsigned int r; 203 const char *format_ptr; 204 205 /* Handle leaf items for which we set resource flags. Also, special-case 206 CALL, SET and CLOBBER operators. */ 207 switch (code) 208 { 209 case CONST: 210 CASE_CONST_ANY: 211 case PC: 212 case SYMBOL_REF: 213 case LABEL_REF: 214 return; 215 216 case SUBREG: 217 if (!REG_P (SUBREG_REG (x))) 218 mark_referenced_resources (SUBREG_REG (x), res, false); 219 else 220 { 221 unsigned int regno = subreg_regno (x); 222 unsigned int last_regno = regno + subreg_nregs (x); 223 224 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER); 225 for (r = regno; r < last_regno; r++) 226 SET_HARD_REG_BIT (res->regs, r); 227 } 228 return; 229 230 case REG: 231 gcc_assert (HARD_REGISTER_P (x)); 232 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x)); 233 return; 234 235 case MEM: 236 /* If this memory shouldn't change, it really isn't referencing 237 memory. */ 238 if (! MEM_READONLY_P (x)) 239 res->memory = 1; 240 res->volatil |= MEM_VOLATILE_P (x); 241 242 /* Mark registers used to access memory. */ 243 mark_referenced_resources (XEXP (x, 0), res, false); 244 return; 245 246 case CC0: 247 res->cc = 1; 248 return; 249 250 case UNSPEC_VOLATILE: 251 case TRAP_IF: 252 case ASM_INPUT: 253 /* Traditional asm's are always volatile. */ 254 res->volatil = 1; 255 break; 256 257 case ASM_OPERANDS: 258 res->volatil |= MEM_VOLATILE_P (x); 259 260 /* For all ASM_OPERANDS, we must traverse the vector of input operands. 261 We can not just fall through here since then we would be confused 262 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate 263 traditional asms unlike their normal usage. */ 264 265 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) 266 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, false); 267 return; 268 269 case CALL: 270 /* The first operand will be a (MEM (xxx)) but doesn't really reference 271 memory. The second operand may be referenced, though. */ 272 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, false); 273 mark_referenced_resources (XEXP (x, 1), res, false); 274 return; 275 276 case SET: 277 /* Usually, the first operand of SET is set, not referenced. But 278 registers used to access memory are referenced. SET_DEST is 279 also referenced if it is a ZERO_EXTRACT. */ 280 281 mark_referenced_resources (SET_SRC (x), res, false); 282 283 x = SET_DEST (x); 284 if (GET_CODE (x) == ZERO_EXTRACT 285 || GET_CODE (x) == STRICT_LOW_PART) 286 mark_referenced_resources (x, res, false); 287 else if (GET_CODE (x) == SUBREG) 288 x = SUBREG_REG (x); 289 if (MEM_P (x)) 290 mark_referenced_resources (XEXP (x, 0), res, false); 291 return; 292 293 case CLOBBER: 294 return; 295 296 case CALL_INSN: 297 if (include_delayed_effects) 298 { 299 /* A CALL references memory, the frame pointer if it exists, the 300 stack pointer, any global registers and any registers given in 301 USE insns immediately in front of the CALL. 302 303 However, we may have moved some of the parameter loading insns 304 into the delay slot of this CALL. If so, the USE's for them 305 don't count and should be skipped. */ 306 rtx_insn *insn = PREV_INSN (as_a <rtx_insn *> (x)); 307 rtx_sequence *sequence = 0; 308 int seq_size = 0; 309 int i; 310 311 /* If we are part of a delay slot sequence, point at the SEQUENCE. */ 312 if (NEXT_INSN (insn) != x) 313 { 314 sequence = as_a <rtx_sequence *> (PATTERN (NEXT_INSN (insn))); 315 seq_size = sequence->len (); 316 gcc_assert (GET_CODE (sequence) == SEQUENCE); 317 } 318 319 res->memory = 1; 320 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM); 321 if (frame_pointer_needed) 322 { 323 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM); 324 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) 325 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM); 326 } 327 328 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 329 if (global_regs[i]) 330 SET_HARD_REG_BIT (res->regs, i); 331 332 /* Check for a REG_SETJMP. If it exists, then we must 333 assume that this call can need any register. 334 335 This is done to be more conservative about how we handle setjmp. 336 We assume that they both use and set all registers. Using all 337 registers ensures that a register will not be considered dead 338 just because it crosses a setjmp call. A register should be 339 considered dead only if the setjmp call returns nonzero. */ 340 if (find_reg_note (x, REG_SETJMP, NULL)) 341 SET_HARD_REG_SET (res->regs); 342 343 { 344 rtx link; 345 346 for (link = CALL_INSN_FUNCTION_USAGE (x); 347 link; 348 link = XEXP (link, 1)) 349 if (GET_CODE (XEXP (link, 0)) == USE) 350 { 351 for (i = 1; i < seq_size; i++) 352 { 353 rtx slot_pat = PATTERN (sequence->element (i)); 354 if (GET_CODE (slot_pat) == SET 355 && rtx_equal_p (SET_DEST (slot_pat), 356 XEXP (XEXP (link, 0), 0))) 357 break; 358 } 359 if (i >= seq_size) 360 mark_referenced_resources (XEXP (XEXP (link, 0), 0), 361 res, false); 362 } 363 } 364 } 365 366 /* ... fall through to other INSN processing ... */ 367 368 case INSN: 369 case JUMP_INSN: 370 371 if (GET_CODE (PATTERN (x)) == COND_EXEC) 372 /* In addition to the usual references, also consider all outputs 373 as referenced, to compensate for mark_set_resources treating 374 them as killed. This is similar to ZERO_EXTRACT / STRICT_LOW_PART 375 handling, execpt that we got a partial incidence instead of a partial 376 width. */ 377 mark_set_resources (x, res, 0, 378 include_delayed_effects 379 ? MARK_SRC_DEST_CALL : MARK_SRC_DEST); 380 381 if (! include_delayed_effects 382 && INSN_REFERENCES_ARE_DELAYED (as_a <rtx_insn *> (x))) 383 return; 384 385 /* No special processing, just speed up. */ 386 mark_referenced_resources (PATTERN (x), res, include_delayed_effects); 387 return; 388 389 default: 390 break; 391 } 392 393 /* Process each sub-expression and flag what it needs. */ 394 format_ptr = GET_RTX_FORMAT (code); 395 for (i = 0; i < GET_RTX_LENGTH (code); i++) 396 switch (*format_ptr++) 397 { 398 case 'e': 399 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects); 400 break; 401 402 case 'E': 403 for (j = 0; j < XVECLEN (x, i); j++) 404 mark_referenced_resources (XVECEXP (x, i, j), res, 405 include_delayed_effects); 406 break; 407 } 408 } 409 410 /* A subroutine of mark_target_live_regs. Search forward from TARGET 411 looking for registers that are set before they are used. These are dead. 412 Stop after passing a few conditional jumps, and/or a small 413 number of unconditional branches. */ 414 415 static rtx_insn * 416 find_dead_or_set_registers (rtx_insn *target, struct resources *res, 417 rtx *jump_target, int jump_count, 418 struct resources set, struct resources needed) 419 { 420 HARD_REG_SET scratch; 421 rtx_insn *insn; 422 rtx_insn *next_insn; 423 rtx_insn *jump_insn = 0; 424 int i; 425 426 for (insn = target; insn; insn = next_insn) 427 { 428 rtx_insn *this_insn = insn; 429 430 next_insn = NEXT_INSN (insn); 431 432 /* If this instruction can throw an exception, then we don't 433 know where we might end up next. That means that we have to 434 assume that whatever we have already marked as live really is 435 live. */ 436 if (can_throw_internal (insn)) 437 break; 438 439 switch (GET_CODE (insn)) 440 { 441 case CODE_LABEL: 442 /* After a label, any pending dead registers that weren't yet 443 used can be made dead. */ 444 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs); 445 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs); 446 CLEAR_HARD_REG_SET (pending_dead_regs); 447 448 continue; 449 450 case BARRIER: 451 case NOTE: 452 continue; 453 454 case INSN: 455 if (GET_CODE (PATTERN (insn)) == USE) 456 { 457 /* If INSN is a USE made by update_block, we care about the 458 underlying insn. Any registers set by the underlying insn 459 are live since the insn is being done somewhere else. */ 460 if (INSN_P (XEXP (PATTERN (insn), 0))) 461 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0, 462 MARK_SRC_DEST_CALL); 463 464 /* All other USE insns are to be ignored. */ 465 continue; 466 } 467 else if (GET_CODE (PATTERN (insn)) == CLOBBER) 468 continue; 469 else if (rtx_sequence *seq = 470 dyn_cast <rtx_sequence *> (PATTERN (insn))) 471 { 472 /* An unconditional jump can be used to fill the delay slot 473 of a call, so search for a JUMP_INSN in any position. */ 474 for (i = 0; i < seq->len (); i++) 475 { 476 this_insn = seq->insn (i); 477 if (JUMP_P (this_insn)) 478 break; 479 } 480 } 481 482 default: 483 break; 484 } 485 486 if (rtx_jump_insn *this_jump_insn = 487 dyn_cast <rtx_jump_insn *> (this_insn)) 488 { 489 if (jump_count++ < 10) 490 { 491 if (any_uncondjump_p (this_jump_insn) 492 || ANY_RETURN_P (PATTERN (this_jump_insn))) 493 { 494 rtx lab_or_return = this_jump_insn->jump_label (); 495 if (ANY_RETURN_P (lab_or_return)) 496 next_insn = NULL; 497 else 498 next_insn = as_a <rtx_insn *> (lab_or_return); 499 if (jump_insn == 0) 500 { 501 jump_insn = insn; 502 if (jump_target) 503 *jump_target = JUMP_LABEL (this_jump_insn); 504 } 505 } 506 else if (any_condjump_p (this_jump_insn)) 507 { 508 struct resources target_set, target_res; 509 struct resources fallthrough_res; 510 511 /* We can handle conditional branches here by following 512 both paths, and then IOR the results of the two paths 513 together, which will give us registers that are dead 514 on both paths. Since this is expensive, we give it 515 a much higher cost than unconditional branches. The 516 cost was chosen so that we will follow at most 1 517 conditional branch. */ 518 519 jump_count += 4; 520 if (jump_count >= 10) 521 break; 522 523 mark_referenced_resources (insn, &needed, true); 524 525 /* For an annulled branch, mark_set_resources ignores slots 526 filled by instructions from the target. This is correct 527 if the branch is not taken. Since we are following both 528 paths from the branch, we must also compute correct info 529 if the branch is taken. We do this by inverting all of 530 the INSN_FROM_TARGET_P bits, calling mark_set_resources, 531 and then inverting the INSN_FROM_TARGET_P bits again. */ 532 533 if (GET_CODE (PATTERN (insn)) == SEQUENCE 534 && INSN_ANNULLED_BRANCH_P (this_jump_insn)) 535 { 536 rtx_sequence *seq = as_a <rtx_sequence *> (PATTERN (insn)); 537 for (i = 1; i < seq->len (); i++) 538 INSN_FROM_TARGET_P (seq->element (i)) 539 = ! INSN_FROM_TARGET_P (seq->element (i)); 540 541 target_set = set; 542 mark_set_resources (insn, &target_set, 0, 543 MARK_SRC_DEST_CALL); 544 545 for (i = 1; i < seq->len (); i++) 546 INSN_FROM_TARGET_P (seq->element (i)) 547 = ! INSN_FROM_TARGET_P (seq->element (i)); 548 549 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 550 } 551 else 552 { 553 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 554 target_set = set; 555 } 556 557 target_res = *res; 558 COPY_HARD_REG_SET (scratch, target_set.regs); 559 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 560 AND_COMPL_HARD_REG_SET (target_res.regs, scratch); 561 562 fallthrough_res = *res; 563 COPY_HARD_REG_SET (scratch, set.regs); 564 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 565 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch); 566 567 if (!ANY_RETURN_P (this_jump_insn->jump_label ())) 568 find_dead_or_set_registers 569 (this_jump_insn->jump_target (), 570 &target_res, 0, jump_count, target_set, needed); 571 find_dead_or_set_registers (next_insn, 572 &fallthrough_res, 0, jump_count, 573 set, needed); 574 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs); 575 AND_HARD_REG_SET (res->regs, fallthrough_res.regs); 576 break; 577 } 578 else 579 break; 580 } 581 else 582 { 583 /* Don't try this optimization if we expired our jump count 584 above, since that would mean there may be an infinite loop 585 in the function being compiled. */ 586 jump_insn = 0; 587 break; 588 } 589 } 590 591 mark_referenced_resources (insn, &needed, true); 592 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 593 594 COPY_HARD_REG_SET (scratch, set.regs); 595 AND_COMPL_HARD_REG_SET (scratch, needed.regs); 596 AND_COMPL_HARD_REG_SET (res->regs, scratch); 597 } 598 599 return jump_insn; 600 } 601 602 /* Given X, a part of an insn, and a pointer to a `struct resource', 603 RES, indicate which resources are modified by the insn. If 604 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially 605 set by the called routine. 606 607 If IN_DEST is nonzero, it means we are inside a SET. Otherwise, 608 objects are being referenced instead of set. 609 610 We never mark the insn as modifying the condition code unless it explicitly 611 SETs CC0 even though this is not totally correct. The reason for this is 612 that we require a SET of CC0 to immediately precede the reference to CC0. 613 So if some other insn sets CC0 as a side-effect, we know it cannot affect 614 our computation and thus may be placed in a delay slot. */ 615 616 void 617 mark_set_resources (rtx x, struct resources *res, int in_dest, 618 enum mark_resource_type mark_type) 619 { 620 enum rtx_code code; 621 int i, j; 622 unsigned int r; 623 const char *format_ptr; 624 625 restart: 626 627 code = GET_CODE (x); 628 629 switch (code) 630 { 631 case NOTE: 632 case BARRIER: 633 case CODE_LABEL: 634 case USE: 635 CASE_CONST_ANY: 636 case LABEL_REF: 637 case SYMBOL_REF: 638 case CONST: 639 case PC: 640 /* These don't set any resources. */ 641 return; 642 643 case CC0: 644 if (in_dest) 645 res->cc = 1; 646 return; 647 648 case CALL_INSN: 649 /* Called routine modifies the condition code, memory, any registers 650 that aren't saved across calls, global registers and anything 651 explicitly CLOBBERed immediately after the CALL_INSN. */ 652 653 if (mark_type == MARK_SRC_DEST_CALL) 654 { 655 rtx_call_insn *call_insn = as_a <rtx_call_insn *> (x); 656 rtx link; 657 HARD_REG_SET regs; 658 659 res->cc = res->memory = 1; 660 661 get_call_reg_set_usage (call_insn, ®s, regs_invalidated_by_call); 662 IOR_HARD_REG_SET (res->regs, regs); 663 664 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); 665 link; link = XEXP (link, 1)) 666 if (GET_CODE (XEXP (link, 0)) == CLOBBER) 667 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1, 668 MARK_SRC_DEST); 669 670 /* Check for a REG_SETJMP. If it exists, then we must 671 assume that this call can clobber any register. */ 672 if (find_reg_note (call_insn, REG_SETJMP, NULL)) 673 SET_HARD_REG_SET (res->regs); 674 } 675 676 /* ... and also what its RTL says it modifies, if anything. */ 677 678 case JUMP_INSN: 679 case INSN: 680 681 /* An insn consisting of just a CLOBBER (or USE) is just for flow 682 and doesn't actually do anything, so we ignore it. */ 683 684 if (mark_type != MARK_SRC_DEST_CALL 685 && INSN_SETS_ARE_DELAYED (as_a <rtx_insn *> (x))) 686 return; 687 688 x = PATTERN (x); 689 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER) 690 goto restart; 691 return; 692 693 case SET: 694 /* If the source of a SET is a CALL, this is actually done by 695 the called routine. So only include it if we are to include the 696 effects of the calling routine. */ 697 698 mark_set_resources (SET_DEST (x), res, 699 (mark_type == MARK_SRC_DEST_CALL 700 || GET_CODE (SET_SRC (x)) != CALL), 701 mark_type); 702 703 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST); 704 return; 705 706 case CLOBBER: 707 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 708 return; 709 710 case SEQUENCE: 711 { 712 rtx_sequence *seq = as_a <rtx_sequence *> (x); 713 rtx control = seq->element (0); 714 bool annul_p = JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control); 715 716 mark_set_resources (control, res, 0, mark_type); 717 for (i = seq->len () - 1; i >= 0; --i) 718 { 719 rtx elt = seq->element (i); 720 if (!annul_p && INSN_FROM_TARGET_P (elt)) 721 mark_set_resources (elt, res, 0, mark_type); 722 } 723 } 724 return; 725 726 case POST_INC: 727 case PRE_INC: 728 case POST_DEC: 729 case PRE_DEC: 730 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 731 return; 732 733 case PRE_MODIFY: 734 case POST_MODIFY: 735 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST); 736 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST); 737 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST); 738 return; 739 740 case SIGN_EXTRACT: 741 case ZERO_EXTRACT: 742 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST); 743 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST); 744 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST); 745 return; 746 747 case MEM: 748 if (in_dest) 749 { 750 res->memory = 1; 751 res->volatil |= MEM_VOLATILE_P (x); 752 } 753 754 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST); 755 return; 756 757 case SUBREG: 758 if (in_dest) 759 { 760 if (!REG_P (SUBREG_REG (x))) 761 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type); 762 else 763 { 764 unsigned int regno = subreg_regno (x); 765 unsigned int last_regno = regno + subreg_nregs (x); 766 767 gcc_assert (last_regno <= FIRST_PSEUDO_REGISTER); 768 for (r = regno; r < last_regno; r++) 769 SET_HARD_REG_BIT (res->regs, r); 770 } 771 } 772 return; 773 774 case REG: 775 if (in_dest) 776 { 777 gcc_assert (HARD_REGISTER_P (x)); 778 add_to_hard_reg_set (&res->regs, GET_MODE (x), REGNO (x)); 779 } 780 return; 781 782 case UNSPEC_VOLATILE: 783 case ASM_INPUT: 784 /* Traditional asm's are always volatile. */ 785 res->volatil = 1; 786 return; 787 788 case TRAP_IF: 789 res->volatil = 1; 790 break; 791 792 case ASM_OPERANDS: 793 res->volatil |= MEM_VOLATILE_P (x); 794 795 /* For all ASM_OPERANDS, we must traverse the vector of input operands. 796 We can not just fall through here since then we would be confused 797 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate 798 traditional asms unlike their normal usage. */ 799 800 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) 801 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest, 802 MARK_SRC_DEST); 803 return; 804 805 default: 806 break; 807 } 808 809 /* Process each sub-expression and flag what it needs. */ 810 format_ptr = GET_RTX_FORMAT (code); 811 for (i = 0; i < GET_RTX_LENGTH (code); i++) 812 switch (*format_ptr++) 813 { 814 case 'e': 815 mark_set_resources (XEXP (x, i), res, in_dest, mark_type); 816 break; 817 818 case 'E': 819 for (j = 0; j < XVECLEN (x, i); j++) 820 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type); 821 break; 822 } 823 } 824 825 /* Return TRUE if INSN is a return, possibly with a filled delay slot. */ 826 827 static bool 828 return_insn_p (const_rtx insn) 829 { 830 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn))) 831 return true; 832 833 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 834 return return_insn_p (XVECEXP (PATTERN (insn), 0, 0)); 835 836 return false; 837 } 838 839 /* Set the resources that are live at TARGET. 840 841 If TARGET is zero, we refer to the end of the current function and can 842 return our precomputed value. 843 844 Otherwise, we try to find out what is live by consulting the basic block 845 information. This is tricky, because we must consider the actions of 846 reload and jump optimization, which occur after the basic block information 847 has been computed. 848 849 Accordingly, we proceed as follows:: 850 851 We find the previous BARRIER and look at all immediately following labels 852 (with no intervening active insns) to see if any of them start a basic 853 block. If we hit the start of the function first, we use block 0. 854 855 Once we have found a basic block and a corresponding first insn, we can 856 accurately compute the live status (by starting at a label following a 857 BARRIER, we are immune to actions taken by reload and jump.) Then we 858 scan all insns between that point and our target. For each CLOBBER (or 859 for call-clobbered regs when we pass a CALL_INSN), mark the appropriate 860 registers are dead. For a SET, mark them as live. 861 862 We have to be careful when using REG_DEAD notes because they are not 863 updated by such things as find_equiv_reg. So keep track of registers 864 marked as dead that haven't been assigned to, and mark them dead at the 865 next CODE_LABEL since reload and jump won't propagate values across labels. 866 867 If we cannot find the start of a basic block (should be a very rare 868 case, if it can happen at all), mark everything as potentially live. 869 870 Next, scan forward from TARGET looking for things set or clobbered 871 before they are used. These are not live. 872 873 Because we can be called many times on the same target, save our results 874 in a hash table indexed by INSN_UID. This is only done if the function 875 init_resource_info () was invoked before we are called. */ 876 877 void 878 mark_target_live_regs (rtx_insn *insns, rtx target_maybe_return, struct resources *res) 879 { 880 int b = -1; 881 unsigned int i; 882 struct target_info *tinfo = NULL; 883 rtx_insn *insn; 884 rtx jump_target; 885 HARD_REG_SET scratch; 886 struct resources set, needed; 887 888 /* Handle end of function. */ 889 if (target_maybe_return == 0 || ANY_RETURN_P (target_maybe_return)) 890 { 891 *res = end_of_function_needs; 892 return; 893 } 894 895 /* We've handled the case of RETURN/SIMPLE_RETURN; we should now have an 896 instruction. */ 897 rtx_insn *target = as_a <rtx_insn *> (target_maybe_return); 898 899 /* Handle return insn. */ 900 if (return_insn_p (target)) 901 { 902 *res = end_of_function_needs; 903 mark_referenced_resources (target, res, false); 904 return; 905 } 906 907 /* We have to assume memory is needed, but the CC isn't. */ 908 res->memory = 1; 909 res->volatil = 0; 910 res->cc = 0; 911 912 /* See if we have computed this value already. */ 913 if (target_hash_table != NULL) 914 { 915 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME]; 916 tinfo; tinfo = tinfo->next) 917 if (tinfo->uid == INSN_UID (target)) 918 break; 919 920 /* Start by getting the basic block number. If we have saved 921 information, we can get it from there unless the insn at the 922 start of the basic block has been deleted. */ 923 if (tinfo && tinfo->block != -1 924 && ! BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, tinfo->block))->deleted ()) 925 b = tinfo->block; 926 } 927 928 if (b == -1) 929 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH); 930 931 if (target_hash_table != NULL) 932 { 933 if (tinfo) 934 { 935 /* If the information is up-to-date, use it. Otherwise, we will 936 update it below. */ 937 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b]) 938 { 939 COPY_HARD_REG_SET (res->regs, tinfo->live_regs); 940 return; 941 } 942 } 943 else 944 { 945 /* Allocate a place to put our results and chain it into the 946 hash table. */ 947 tinfo = XNEW (struct target_info); 948 tinfo->uid = INSN_UID (target); 949 tinfo->block = b; 950 tinfo->next 951 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME]; 952 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo; 953 } 954 } 955 956 CLEAR_HARD_REG_SET (pending_dead_regs); 957 958 /* If we found a basic block, get the live registers from it and update 959 them with anything set or killed between its start and the insn before 960 TARGET; this custom life analysis is really about registers so we need 961 to use the LR problem. Otherwise, we must assume everything is live. */ 962 if (b != -1) 963 { 964 regset regs_live = DF_LR_IN (BASIC_BLOCK_FOR_FN (cfun, b)); 965 rtx_insn *start_insn, *stop_insn; 966 967 /* Compute hard regs live at start of block. */ 968 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live); 969 970 /* Get starting and ending insn, handling the case where each might 971 be a SEQUENCE. */ 972 start_insn = (b == ENTRY_BLOCK_PTR_FOR_FN (cfun)->next_bb->index ? 973 insns : BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, b))); 974 stop_insn = target; 975 976 if (NONJUMP_INSN_P (start_insn) 977 && GET_CODE (PATTERN (start_insn)) == SEQUENCE) 978 start_insn = as_a <rtx_sequence *> (PATTERN (start_insn))->insn (0); 979 980 if (NONJUMP_INSN_P (stop_insn) 981 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE) 982 stop_insn = next_insn (PREV_INSN (stop_insn)); 983 984 for (insn = start_insn; insn != stop_insn; 985 insn = next_insn_no_annul (insn)) 986 { 987 rtx link; 988 rtx_insn *real_insn = insn; 989 enum rtx_code code = GET_CODE (insn); 990 991 if (DEBUG_INSN_P (insn)) 992 continue; 993 994 /* If this insn is from the target of a branch, it isn't going to 995 be used in the sequel. If it is used in both cases, this 996 test will not be true. */ 997 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN) 998 && INSN_FROM_TARGET_P (insn)) 999 continue; 1000 1001 /* If this insn is a USE made by update_block, we care about the 1002 underlying insn. */ 1003 if (code == INSN 1004 && GET_CODE (PATTERN (insn)) == USE 1005 && INSN_P (XEXP (PATTERN (insn), 0))) 1006 real_insn = as_a <rtx_insn *> (XEXP (PATTERN (insn), 0)); 1007 1008 if (CALL_P (real_insn)) 1009 { 1010 /* Values in call-clobbered registers survive a COND_EXEC CALL 1011 if that is not executed; this matters for resoure use because 1012 they may be used by a complementarily (or more strictly) 1013 predicated instruction, or if the CALL is NORETURN. */ 1014 if (GET_CODE (PATTERN (real_insn)) != COND_EXEC) 1015 { 1016 HARD_REG_SET regs_invalidated_by_this_call; 1017 get_call_reg_set_usage (real_insn, 1018 ®s_invalidated_by_this_call, 1019 regs_invalidated_by_call); 1020 /* CALL clobbers all call-used regs that aren't fixed except 1021 sp, ap, and fp. Do this before setting the result of the 1022 call live. */ 1023 AND_COMPL_HARD_REG_SET (current_live_regs, 1024 regs_invalidated_by_this_call); 1025 } 1026 1027 /* A CALL_INSN sets any global register live, since it may 1028 have been modified by the call. */ 1029 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1030 if (global_regs[i]) 1031 SET_HARD_REG_BIT (current_live_regs, i); 1032 } 1033 1034 /* Mark anything killed in an insn to be deadened at the next 1035 label. Ignore USE insns; the only REG_DEAD notes will be for 1036 parameters. But they might be early. A CALL_INSN will usually 1037 clobber registers used for parameters. It isn't worth bothering 1038 with the unlikely case when it won't. */ 1039 if ((NONJUMP_INSN_P (real_insn) 1040 && GET_CODE (PATTERN (real_insn)) != USE 1041 && GET_CODE (PATTERN (real_insn)) != CLOBBER) 1042 || JUMP_P (real_insn) 1043 || CALL_P (real_insn)) 1044 { 1045 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) 1046 if (REG_NOTE_KIND (link) == REG_DEAD 1047 && REG_P (XEXP (link, 0)) 1048 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) 1049 add_to_hard_reg_set (&pending_dead_regs, 1050 GET_MODE (XEXP (link, 0)), 1051 REGNO (XEXP (link, 0))); 1052 1053 note_stores (PATTERN (real_insn), update_live_status, NULL); 1054 1055 /* If any registers were unused after this insn, kill them. 1056 These notes will always be accurate. */ 1057 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1)) 1058 if (REG_NOTE_KIND (link) == REG_UNUSED 1059 && REG_P (XEXP (link, 0)) 1060 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER) 1061 remove_from_hard_reg_set (¤t_live_regs, 1062 GET_MODE (XEXP (link, 0)), 1063 REGNO (XEXP (link, 0))); 1064 } 1065 1066 else if (LABEL_P (real_insn)) 1067 { 1068 basic_block bb; 1069 1070 /* A label clobbers the pending dead registers since neither 1071 reload nor jump will propagate a value across a label. */ 1072 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs); 1073 CLEAR_HARD_REG_SET (pending_dead_regs); 1074 1075 /* We must conservatively assume that all registers that used 1076 to be live here still are. The fallthrough edge may have 1077 left a live register uninitialized. */ 1078 bb = BLOCK_FOR_INSN (real_insn); 1079 if (bb) 1080 { 1081 HARD_REG_SET extra_live; 1082 1083 REG_SET_TO_HARD_REG_SET (extra_live, DF_LR_IN (bb)); 1084 IOR_HARD_REG_SET (current_live_regs, extra_live); 1085 } 1086 } 1087 1088 /* The beginning of the epilogue corresponds to the end of the 1089 RTL chain when there are no epilogue insns. Certain resources 1090 are implicitly required at that point. */ 1091 else if (NOTE_P (real_insn) 1092 && NOTE_KIND (real_insn) == NOTE_INSN_EPILOGUE_BEG) 1093 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs); 1094 } 1095 1096 COPY_HARD_REG_SET (res->regs, current_live_regs); 1097 if (tinfo != NULL) 1098 { 1099 tinfo->block = b; 1100 tinfo->bb_tick = bb_ticks[b]; 1101 } 1102 } 1103 else 1104 /* We didn't find the start of a basic block. Assume everything 1105 in use. This should happen only extremely rarely. */ 1106 SET_HARD_REG_SET (res->regs); 1107 1108 CLEAR_RESOURCE (&set); 1109 CLEAR_RESOURCE (&needed); 1110 1111 rtx_insn *jump_insn = find_dead_or_set_registers (target, res, &jump_target, 1112 0, set, needed); 1113 1114 /* If we hit an unconditional branch, we have another way of finding out 1115 what is live: we can see what is live at the branch target and include 1116 anything used but not set before the branch. We add the live 1117 resources found using the test below to those found until now. */ 1118 1119 if (jump_insn) 1120 { 1121 struct resources new_resources; 1122 rtx_insn *stop_insn = next_active_insn (jump_insn); 1123 1124 if (!ANY_RETURN_P (jump_target)) 1125 jump_target = next_active_insn (jump_target); 1126 mark_target_live_regs (insns, jump_target, &new_resources); 1127 CLEAR_RESOURCE (&set); 1128 CLEAR_RESOURCE (&needed); 1129 1130 /* Include JUMP_INSN in the needed registers. */ 1131 for (insn = target; insn != stop_insn; insn = next_active_insn (insn)) 1132 { 1133 mark_referenced_resources (insn, &needed, true); 1134 1135 COPY_HARD_REG_SET (scratch, needed.regs); 1136 AND_COMPL_HARD_REG_SET (scratch, set.regs); 1137 IOR_HARD_REG_SET (new_resources.regs, scratch); 1138 1139 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL); 1140 } 1141 1142 IOR_HARD_REG_SET (res->regs, new_resources.regs); 1143 } 1144 1145 if (tinfo != NULL) 1146 { 1147 COPY_HARD_REG_SET (tinfo->live_regs, res->regs); 1148 } 1149 } 1150 1151 /* Initialize the resources required by mark_target_live_regs (). 1152 This should be invoked before the first call to mark_target_live_regs. */ 1153 1154 void 1155 init_resource_info (rtx_insn *epilogue_insn) 1156 { 1157 int i; 1158 basic_block bb; 1159 1160 /* Indicate what resources are required to be valid at the end of the current 1161 function. The condition code never is and memory always is. 1162 The stack pointer is needed unless EXIT_IGNORE_STACK is true 1163 and there is an epilogue that restores the original stack pointer 1164 from the frame pointer. Registers used to return the function value 1165 are needed. Registers holding global variables are needed. */ 1166 1167 end_of_function_needs.cc = 0; 1168 end_of_function_needs.memory = 1; 1169 CLEAR_HARD_REG_SET (end_of_function_needs.regs); 1170 1171 if (frame_pointer_needed) 1172 { 1173 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM); 1174 if (!HARD_FRAME_POINTER_IS_FRAME_POINTER) 1175 SET_HARD_REG_BIT (end_of_function_needs.regs, 1176 HARD_FRAME_POINTER_REGNUM); 1177 } 1178 if (!(frame_pointer_needed 1179 && EXIT_IGNORE_STACK 1180 && epilogue_insn 1181 && !crtl->sp_is_unchanging)) 1182 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM); 1183 1184 if (crtl->return_rtx != 0) 1185 mark_referenced_resources (crtl->return_rtx, 1186 &end_of_function_needs, true); 1187 1188 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1189 if (global_regs[i] || EPILOGUE_USES (i)) 1190 SET_HARD_REG_BIT (end_of_function_needs.regs, i); 1191 1192 /* The registers required to be live at the end of the function are 1193 represented in the flow information as being dead just prior to 1194 reaching the end of the function. For example, the return of a value 1195 might be represented by a USE of the return register immediately 1196 followed by an unconditional jump to the return label where the 1197 return label is the end of the RTL chain. The end of the RTL chain 1198 is then taken to mean that the return register is live. 1199 1200 This sequence is no longer maintained when epilogue instructions are 1201 added to the RTL chain. To reconstruct the original meaning, the 1202 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the 1203 point where these registers become live (start_of_epilogue_needs). 1204 If epilogue instructions are present, the registers set by those 1205 instructions won't have been processed by flow. Thus, those 1206 registers are additionally required at the end of the RTL chain 1207 (end_of_function_needs). */ 1208 1209 start_of_epilogue_needs = end_of_function_needs; 1210 1211 while ((epilogue_insn = next_nonnote_insn (epilogue_insn))) 1212 { 1213 mark_set_resources (epilogue_insn, &end_of_function_needs, 0, 1214 MARK_SRC_DEST_CALL); 1215 if (return_insn_p (epilogue_insn)) 1216 break; 1217 } 1218 1219 /* Allocate and initialize the tables used by mark_target_live_regs. */ 1220 target_hash_table = XCNEWVEC (struct target_info *, TARGET_HASH_PRIME); 1221 bb_ticks = XCNEWVEC (int, last_basic_block_for_fn (cfun)); 1222 1223 /* Set the BLOCK_FOR_INSN of each label that starts a basic block. */ 1224 FOR_EACH_BB_FN (bb, cfun) 1225 if (LABEL_P (BB_HEAD (bb))) 1226 BLOCK_FOR_INSN (BB_HEAD (bb)) = bb; 1227 } 1228 1229 /* Free up the resources allocated to mark_target_live_regs (). This 1230 should be invoked after the last call to mark_target_live_regs (). */ 1231 1232 void 1233 free_resource_info (void) 1234 { 1235 basic_block bb; 1236 1237 if (target_hash_table != NULL) 1238 { 1239 int i; 1240 1241 for (i = 0; i < TARGET_HASH_PRIME; ++i) 1242 { 1243 struct target_info *ti = target_hash_table[i]; 1244 1245 while (ti) 1246 { 1247 struct target_info *next = ti->next; 1248 free (ti); 1249 ti = next; 1250 } 1251 } 1252 1253 free (target_hash_table); 1254 target_hash_table = NULL; 1255 } 1256 1257 if (bb_ticks != NULL) 1258 { 1259 free (bb_ticks); 1260 bb_ticks = NULL; 1261 } 1262 1263 FOR_EACH_BB_FN (bb, cfun) 1264 if (LABEL_P (BB_HEAD (bb))) 1265 BLOCK_FOR_INSN (BB_HEAD (bb)) = NULL; 1266 } 1267 1268 /* Clear any hashed information that we have stored for INSN. */ 1269 1270 void 1271 clear_hashed_info_for_insn (rtx_insn *insn) 1272 { 1273 struct target_info *tinfo; 1274 1275 if (target_hash_table != NULL) 1276 { 1277 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME]; 1278 tinfo; tinfo = tinfo->next) 1279 if (tinfo->uid == INSN_UID (insn)) 1280 break; 1281 1282 if (tinfo) 1283 tinfo->block = -1; 1284 } 1285 } 1286 1287 /* Increment the tick count for the basic block that contains INSN. */ 1288 1289 void 1290 incr_ticks_for_insn (rtx_insn *insn) 1291 { 1292 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH); 1293 1294 if (b != -1) 1295 bb_ticks[b]++; 1296 } 1297 1298 /* Add TRIAL to the set of resources used at the end of the current 1299 function. */ 1300 void 1301 mark_end_of_function_resources (rtx trial, bool include_delayed_effects) 1302 { 1303 mark_referenced_resources (trial, &end_of_function_needs, 1304 include_delayed_effects); 1305 } 1306