1 /* Convert tree expression to rtl instructions, for GNU compiler. 2 Copyright (C) 1988-2019 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #include "config.h" 21 #include "system.h" 22 #include "coretypes.h" 23 #include "backend.h" 24 #include "target.h" 25 #include "rtl.h" 26 #include "tree.h" 27 #include "gimple.h" 28 #include "predict.h" 29 #include "memmodel.h" 30 #include "tm_p.h" 31 #include "ssa.h" 32 #include "expmed.h" 33 #include "optabs.h" 34 #include "regs.h" 35 #include "emit-rtl.h" 36 #include "recog.h" 37 #include "cgraph.h" 38 #include "diagnostic.h" 39 #include "alias.h" 40 #include "fold-const.h" 41 #include "stor-layout.h" 42 #include "attribs.h" 43 #include "varasm.h" 44 #include "except.h" 45 #include "insn-attr.h" 46 #include "dojump.h" 47 #include "explow.h" 48 #include "calls.h" 49 #include "stmt.h" 50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */ 51 #include "expr.h" 52 #include "optabs-tree.h" 53 #include "libfuncs.h" 54 #include "reload.h" 55 #include "langhooks.h" 56 #include "common/common-target.h" 57 #include "tree-dfa.h" 58 #include "tree-ssa-live.h" 59 #include "tree-outof-ssa.h" 60 #include "tree-ssa-address.h" 61 #include "builtins.h" 62 #include "ccmp.h" 63 #include "gimple-fold.h" 64 #include "rtx-vector-builder.h" 65 66 67 /* If this is nonzero, we do not bother generating VOLATILE 68 around volatile memory references, and we are willing to 69 output indirect addresses. If cse is to follow, we reject 70 indirect addresses so a useful potential cse is generated; 71 if it is used only once, instruction combination will produce 72 the same indirect address eventually. */ 73 int cse_not_expected; 74 75 static bool block_move_libcall_safe_for_call_parm (void); 76 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT, 77 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT, 78 unsigned HOST_WIDE_INT); 79 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned); 80 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int); 81 static rtx_insn *compress_float_constant (rtx, rtx); 82 static rtx get_subtarget (rtx); 83 static void store_constructor (tree, rtx, int, poly_int64, bool); 84 static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64, 85 machine_mode, tree, alias_set_type, bool, bool); 86 87 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree); 88 89 static int is_aligning_offset (const_tree, const_tree); 90 static rtx reduce_to_bit_field_precision (rtx, rtx, tree); 91 static rtx do_store_flag (sepops, rtx, machine_mode); 92 #ifdef PUSH_ROUNDING 93 static void emit_single_push_insn (machine_mode, rtx, tree); 94 #endif 95 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx, 96 profile_probability); 97 static rtx const_vector_from_tree (tree); 98 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree); 99 static tree tree_expr_size (const_tree); 100 static HOST_WIDE_INT int_expr_size (tree); 101 static void convert_mode_scalar (rtx, rtx, int); 102 103 104 /* This is run to set up which modes can be used 105 directly in memory and to initialize the block move optab. It is run 106 at the beginning of compilation and when the target is reinitialized. */ 107 108 void 109 init_expr_target (void) 110 { 111 rtx pat; 112 int num_clobbers; 113 rtx mem, mem1; 114 rtx reg; 115 116 /* Try indexing by frame ptr and try by stack ptr. 117 It is known that on the Convex the stack ptr isn't a valid index. 118 With luck, one or the other is valid on any machine. */ 119 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx); 120 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx); 121 122 /* A scratch register we can modify in-place below to avoid 123 useless RTL allocations. */ 124 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1); 125 126 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN)); 127 pat = gen_rtx_SET (NULL_RTX, NULL_RTX); 128 PATTERN (insn) = pat; 129 130 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES; 131 mode = (machine_mode) ((int) mode + 1)) 132 { 133 int regno; 134 135 direct_load[(int) mode] = direct_store[(int) mode] = 0; 136 PUT_MODE (mem, mode); 137 PUT_MODE (mem1, mode); 138 139 /* See if there is some register that can be used in this mode and 140 directly loaded or stored from memory. */ 141 142 if (mode != VOIDmode && mode != BLKmode) 143 for (regno = 0; regno < FIRST_PSEUDO_REGISTER 144 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0); 145 regno++) 146 { 147 if (!targetm.hard_regno_mode_ok (regno, mode)) 148 continue; 149 150 set_mode_and_regno (reg, mode, regno); 151 152 SET_SRC (pat) = mem; 153 SET_DEST (pat) = reg; 154 if (recog (pat, insn, &num_clobbers) >= 0) 155 direct_load[(int) mode] = 1; 156 157 SET_SRC (pat) = mem1; 158 SET_DEST (pat) = reg; 159 if (recog (pat, insn, &num_clobbers) >= 0) 160 direct_load[(int) mode] = 1; 161 162 SET_SRC (pat) = reg; 163 SET_DEST (pat) = mem; 164 if (recog (pat, insn, &num_clobbers) >= 0) 165 direct_store[(int) mode] = 1; 166 167 SET_SRC (pat) = reg; 168 SET_DEST (pat) = mem1; 169 if (recog (pat, insn, &num_clobbers) >= 0) 170 direct_store[(int) mode] = 1; 171 } 172 } 173 174 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1)); 175 176 opt_scalar_float_mode mode_iter; 177 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT) 178 { 179 scalar_float_mode mode = mode_iter.require (); 180 scalar_float_mode srcmode; 181 FOR_EACH_MODE_UNTIL (srcmode, mode) 182 { 183 enum insn_code ic; 184 185 ic = can_extend_p (mode, srcmode, 0); 186 if (ic == CODE_FOR_nothing) 187 continue; 188 189 PUT_MODE (mem, srcmode); 190 191 if (insn_operand_matches (ic, 1, mem)) 192 float_extend_from_mem[mode][srcmode] = true; 193 } 194 } 195 } 196 197 /* This is run at the start of compiling a function. */ 198 199 void 200 init_expr (void) 201 { 202 memset (&crtl->expr, 0, sizeof (crtl->expr)); 203 } 204 205 /* Copy data from FROM to TO, where the machine modes are not the same. 206 Both modes may be integer, or both may be floating, or both may be 207 fixed-point. 208 UNSIGNEDP should be nonzero if FROM is an unsigned type. 209 This causes zero-extension instead of sign-extension. */ 210 211 void 212 convert_move (rtx to, rtx from, int unsignedp) 213 { 214 machine_mode to_mode = GET_MODE (to); 215 machine_mode from_mode = GET_MODE (from); 216 217 gcc_assert (to_mode != BLKmode); 218 gcc_assert (from_mode != BLKmode); 219 220 /* If the source and destination are already the same, then there's 221 nothing to do. */ 222 if (to == from) 223 return; 224 225 /* If FROM is a SUBREG that indicates that we have already done at least 226 the required extension, strip it. We don't handle such SUBREGs as 227 TO here. */ 228 229 scalar_int_mode to_int_mode; 230 if (GET_CODE (from) == SUBREG 231 && SUBREG_PROMOTED_VAR_P (from) 232 && is_a <scalar_int_mode> (to_mode, &to_int_mode) 233 && (GET_MODE_PRECISION (subreg_promoted_mode (from)) 234 >= GET_MODE_PRECISION (to_int_mode)) 235 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp)) 236 { 237 from = gen_lowpart (to_int_mode, SUBREG_REG (from)); 238 from_mode = to_int_mode; 239 } 240 241 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to)); 242 243 if (to_mode == from_mode 244 || (from_mode == VOIDmode && CONSTANT_P (from))) 245 { 246 emit_move_insn (to, from); 247 return; 248 } 249 250 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode)) 251 { 252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode), 253 GET_MODE_BITSIZE (to_mode))); 254 255 if (VECTOR_MODE_P (to_mode)) 256 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0); 257 else 258 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0); 259 260 emit_move_insn (to, from); 261 return; 262 } 263 264 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT) 265 { 266 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp); 267 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp); 268 return; 269 } 270 271 convert_mode_scalar (to, from, unsignedp); 272 } 273 274 /* Like convert_move, but deals only with scalar modes. */ 275 276 static void 277 convert_mode_scalar (rtx to, rtx from, int unsignedp) 278 { 279 /* Both modes should be scalar types. */ 280 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from)); 281 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to)); 282 bool to_real = SCALAR_FLOAT_MODE_P (to_mode); 283 bool from_real = SCALAR_FLOAT_MODE_P (from_mode); 284 enum insn_code code; 285 rtx libcall; 286 287 gcc_assert (to_real == from_real); 288 289 /* rtx code for making an equivalent value. */ 290 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN 291 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND)); 292 293 if (to_real) 294 { 295 rtx value; 296 rtx_insn *insns; 297 convert_optab tab; 298 299 gcc_assert ((GET_MODE_PRECISION (from_mode) 300 != GET_MODE_PRECISION (to_mode)) 301 || (DECIMAL_FLOAT_MODE_P (from_mode) 302 != DECIMAL_FLOAT_MODE_P (to_mode))); 303 304 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode)) 305 /* Conversion between decimal float and binary float, same size. */ 306 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab; 307 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)) 308 tab = sext_optab; 309 else 310 tab = trunc_optab; 311 312 /* Try converting directly if the insn is supported. */ 313 314 code = convert_optab_handler (tab, to_mode, from_mode); 315 if (code != CODE_FOR_nothing) 316 { 317 emit_unop_insn (code, to, from, 318 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE); 319 return; 320 } 321 322 /* Otherwise use a libcall. */ 323 libcall = convert_optab_libfunc (tab, to_mode, from_mode); 324 325 /* Is this conversion implemented yet? */ 326 gcc_assert (libcall); 327 328 start_sequence (); 329 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode, 330 from, from_mode); 331 insns = get_insns (); 332 end_sequence (); 333 emit_libcall_block (insns, to, value, 334 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode, 335 from) 336 : gen_rtx_FLOAT_EXTEND (to_mode, from)); 337 return; 338 } 339 340 /* Handle pointer conversion. */ /* SPEE 900220. */ 341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */ 342 { 343 convert_optab ctab; 344 345 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode)) 346 ctab = trunc_optab; 347 else if (unsignedp) 348 ctab = zext_optab; 349 else 350 ctab = sext_optab; 351 352 if (convert_optab_handler (ctab, to_mode, from_mode) 353 != CODE_FOR_nothing) 354 { 355 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode), 356 to, from, UNKNOWN); 357 return; 358 } 359 } 360 361 /* Targets are expected to provide conversion insns between PxImode and 362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */ 363 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT) 364 { 365 scalar_int_mode full_mode 366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode)); 367 368 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode) 369 != CODE_FOR_nothing); 370 371 if (full_mode != from_mode) 372 from = convert_to_mode (full_mode, from, unsignedp); 373 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode), 374 to, from, UNKNOWN); 375 return; 376 } 377 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT) 378 { 379 rtx new_from; 380 scalar_int_mode full_mode 381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode)); 382 convert_optab ctab = unsignedp ? zext_optab : sext_optab; 383 enum insn_code icode; 384 385 icode = convert_optab_handler (ctab, full_mode, from_mode); 386 gcc_assert (icode != CODE_FOR_nothing); 387 388 if (to_mode == full_mode) 389 { 390 emit_unop_insn (icode, to, from, UNKNOWN); 391 return; 392 } 393 394 new_from = gen_reg_rtx (full_mode); 395 emit_unop_insn (icode, new_from, from, UNKNOWN); 396 397 /* else proceed to integer conversions below. */ 398 from_mode = full_mode; 399 from = new_from; 400 } 401 402 /* Make sure both are fixed-point modes or both are not. */ 403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) == 404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode)); 405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode)) 406 { 407 /* If we widen from_mode to to_mode and they are in the same class, 408 we won't saturate the result. 409 Otherwise, always saturate the result to play safe. */ 410 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode) 411 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode)) 412 expand_fixed_convert (to, from, 0, 0); 413 else 414 expand_fixed_convert (to, from, 0, 1); 415 return; 416 } 417 418 /* Now both modes are integers. */ 419 420 /* Handle expanding beyond a word. */ 421 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode) 422 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD) 423 { 424 rtx_insn *insns; 425 rtx lowpart; 426 rtx fill_value; 427 rtx lowfrom; 428 int i; 429 scalar_mode lowpart_mode; 430 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD); 431 432 /* Try converting directly if the insn is supported. */ 433 if ((code = can_extend_p (to_mode, from_mode, unsignedp)) 434 != CODE_FOR_nothing) 435 { 436 /* If FROM is a SUBREG, put it into a register. Do this 437 so that we always generate the same set of insns for 438 better cse'ing; if an intermediate assignment occurred, 439 we won't be doing the operation directly on the SUBREG. */ 440 if (optimize > 0 && GET_CODE (from) == SUBREG) 441 from = force_reg (from_mode, from); 442 emit_unop_insn (code, to, from, equiv_code); 443 return; 444 } 445 /* Next, try converting via full word. */ 446 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD 447 && ((code = can_extend_p (to_mode, word_mode, unsignedp)) 448 != CODE_FOR_nothing)) 449 { 450 rtx word_to = gen_reg_rtx (word_mode); 451 if (REG_P (to)) 452 { 453 if (reg_overlap_mentioned_p (to, from)) 454 from = force_reg (from_mode, from); 455 emit_clobber (to); 456 } 457 convert_move (word_to, from, unsignedp); 458 emit_unop_insn (code, to, word_to, equiv_code); 459 return; 460 } 461 462 /* No special multiword conversion insn; do it by hand. */ 463 start_sequence (); 464 465 /* Since we will turn this into a no conflict block, we must ensure 466 the source does not overlap the target so force it into an isolated 467 register when maybe so. Likewise for any MEM input, since the 468 conversion sequence might require several references to it and we 469 must ensure we're getting the same value every time. */ 470 471 if (MEM_P (from) || reg_overlap_mentioned_p (to, from)) 472 from = force_reg (from_mode, from); 473 474 /* Get a copy of FROM widened to a word, if necessary. */ 475 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD) 476 lowpart_mode = word_mode; 477 else 478 lowpart_mode = from_mode; 479 480 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp); 481 482 lowpart = gen_lowpart (lowpart_mode, to); 483 emit_move_insn (lowpart, lowfrom); 484 485 /* Compute the value to put in each remaining word. */ 486 if (unsignedp) 487 fill_value = const0_rtx; 488 else 489 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode), 490 LT, lowfrom, const0_rtx, 491 lowpart_mode, 0, -1); 492 493 /* Fill the remaining words. */ 494 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++) 495 { 496 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i); 497 rtx subword = operand_subword (to, index, 1, to_mode); 498 499 gcc_assert (subword); 500 501 if (fill_value != subword) 502 emit_move_insn (subword, fill_value); 503 } 504 505 insns = get_insns (); 506 end_sequence (); 507 508 emit_insn (insns); 509 return; 510 } 511 512 /* Truncating multi-word to a word or less. */ 513 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD 514 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD) 515 { 516 if (!((MEM_P (from) 517 && ! MEM_VOLATILE_P (from) 518 && direct_load[(int) to_mode] 519 && ! mode_dependent_address_p (XEXP (from, 0), 520 MEM_ADDR_SPACE (from))) 521 || REG_P (from) 522 || GET_CODE (from) == SUBREG)) 523 from = force_reg (from_mode, from); 524 convert_move (to, gen_lowpart (word_mode, from), 0); 525 return; 526 } 527 528 /* Now follow all the conversions between integers 529 no more than a word long. */ 530 531 /* For truncation, usually we can just refer to FROM in a narrower mode. */ 532 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode) 533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode)) 534 { 535 if (!((MEM_P (from) 536 && ! MEM_VOLATILE_P (from) 537 && direct_load[(int) to_mode] 538 && ! mode_dependent_address_p (XEXP (from, 0), 539 MEM_ADDR_SPACE (from))) 540 || REG_P (from) 541 || GET_CODE (from) == SUBREG)) 542 from = force_reg (from_mode, from); 543 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER 544 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode)) 545 from = copy_to_reg (from); 546 emit_move_insn (to, gen_lowpart (to_mode, from)); 547 return; 548 } 549 550 /* Handle extension. */ 551 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode)) 552 { 553 /* Convert directly if that works. */ 554 if ((code = can_extend_p (to_mode, from_mode, unsignedp)) 555 != CODE_FOR_nothing) 556 { 557 emit_unop_insn (code, to, from, equiv_code); 558 return; 559 } 560 else 561 { 562 scalar_mode intermediate; 563 rtx tmp; 564 int shift_amount; 565 566 /* Search for a mode to convert via. */ 567 opt_scalar_mode intermediate_iter; 568 FOR_EACH_MODE_FROM (intermediate_iter, from_mode) 569 { 570 scalar_mode intermediate = intermediate_iter.require (); 571 if (((can_extend_p (to_mode, intermediate, unsignedp) 572 != CODE_FOR_nothing) 573 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate) 574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, 575 intermediate))) 576 && (can_extend_p (intermediate, from_mode, unsignedp) 577 != CODE_FOR_nothing)) 578 { 579 convert_move (to, convert_to_mode (intermediate, from, 580 unsignedp), unsignedp); 581 return; 582 } 583 } 584 585 /* No suitable intermediate mode. 586 Generate what we need with shifts. */ 587 shift_amount = (GET_MODE_PRECISION (to_mode) 588 - GET_MODE_PRECISION (from_mode)); 589 from = gen_lowpart (to_mode, force_reg (from_mode, from)); 590 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount, 591 to, unsignedp); 592 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount, 593 to, unsignedp); 594 if (tmp != to) 595 emit_move_insn (to, tmp); 596 return; 597 } 598 } 599 600 /* Support special truncate insns for certain modes. */ 601 if (convert_optab_handler (trunc_optab, to_mode, 602 from_mode) != CODE_FOR_nothing) 603 { 604 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode), 605 to, from, UNKNOWN); 606 return; 607 } 608 609 /* Handle truncation of volatile memrefs, and so on; 610 the things that couldn't be truncated directly, 611 and for which there was no special instruction. 612 613 ??? Code above formerly short-circuited this, for most integer 614 mode pairs, with a force_reg in from_mode followed by a recursive 615 call to this routine. Appears always to have been wrong. */ 616 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode)) 617 { 618 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from)); 619 emit_move_insn (to, temp); 620 return; 621 } 622 623 /* Mode combination is not recognized. */ 624 gcc_unreachable (); 625 } 626 627 /* Return an rtx for a value that would result 628 from converting X to mode MODE. 629 Both X and MODE may be floating, or both integer. 630 UNSIGNEDP is nonzero if X is an unsigned value. 631 This can be done by referring to a part of X in place 632 or by copying to a new temporary with conversion. */ 633 634 rtx 635 convert_to_mode (machine_mode mode, rtx x, int unsignedp) 636 { 637 return convert_modes (mode, VOIDmode, x, unsignedp); 638 } 639 640 /* Return an rtx for a value that would result 641 from converting X from mode OLDMODE to mode MODE. 642 Both modes may be floating, or both integer. 643 UNSIGNEDP is nonzero if X is an unsigned value. 644 645 This can be done by referring to a part of X in place 646 or by copying to a new temporary with conversion. 647 648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */ 649 650 rtx 651 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp) 652 { 653 rtx temp; 654 scalar_int_mode int_mode; 655 656 /* If FROM is a SUBREG that indicates that we have already done at least 657 the required extension, strip it. */ 658 659 if (GET_CODE (x) == SUBREG 660 && SUBREG_PROMOTED_VAR_P (x) 661 && is_a <scalar_int_mode> (mode, &int_mode) 662 && (GET_MODE_PRECISION (subreg_promoted_mode (x)) 663 >= GET_MODE_PRECISION (int_mode)) 664 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp)) 665 x = gen_lowpart (int_mode, SUBREG_REG (x)); 666 667 if (GET_MODE (x) != VOIDmode) 668 oldmode = GET_MODE (x); 669 670 if (mode == oldmode) 671 return x; 672 673 if (CONST_SCALAR_INT_P (x) 674 && is_int_mode (mode, &int_mode)) 675 { 676 /* If the caller did not tell us the old mode, then there is not 677 much to do with respect to canonicalization. We have to 678 assume that all the bits are significant. */ 679 if (GET_MODE_CLASS (oldmode) != MODE_INT) 680 oldmode = MAX_MODE_INT; 681 wide_int w = wide_int::from (rtx_mode_t (x, oldmode), 682 GET_MODE_PRECISION (int_mode), 683 unsignedp ? UNSIGNED : SIGNED); 684 return immed_wide_int_const (w, int_mode); 685 } 686 687 /* We can do this with a gen_lowpart if both desired and current modes 688 are integer, and this is either a constant integer, a register, or a 689 non-volatile MEM. */ 690 scalar_int_mode int_oldmode; 691 if (is_int_mode (mode, &int_mode) 692 && is_int_mode (oldmode, &int_oldmode) 693 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode) 694 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode]) 695 || CONST_POLY_INT_P (x) 696 || (REG_P (x) 697 && (!HARD_REGISTER_P (x) 698 || targetm.hard_regno_mode_ok (REGNO (x), int_mode)) 699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x))))) 700 return gen_lowpart (int_mode, x); 701 702 /* Converting from integer constant into mode is always equivalent to an 703 subreg operation. */ 704 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode) 705 { 706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode), 707 GET_MODE_BITSIZE (oldmode))); 708 return simplify_gen_subreg (mode, x, oldmode, 0); 709 } 710 711 temp = gen_reg_rtx (mode); 712 convert_move (temp, x, unsignedp); 713 return temp; 714 } 715 716 /* Return the largest alignment we can use for doing a move (or store) 717 of MAX_PIECES. ALIGN is the largest alignment we could use. */ 718 719 static unsigned int 720 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align) 721 { 722 scalar_int_mode tmode 723 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require (); 724 725 if (align >= GET_MODE_ALIGNMENT (tmode)) 726 align = GET_MODE_ALIGNMENT (tmode); 727 else 728 { 729 scalar_int_mode xmode = NARROWEST_INT_MODE; 730 opt_scalar_int_mode mode_iter; 731 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) 732 { 733 tmode = mode_iter.require (); 734 if (GET_MODE_SIZE (tmode) > max_pieces 735 || targetm.slow_unaligned_access (tmode, align)) 736 break; 737 xmode = tmode; 738 } 739 740 align = MAX (align, GET_MODE_ALIGNMENT (xmode)); 741 } 742 743 return align; 744 } 745 746 /* Return the widest integer mode that is narrower than SIZE bytes. */ 747 748 static scalar_int_mode 749 widest_int_mode_for_size (unsigned int size) 750 { 751 scalar_int_mode result = NARROWEST_INT_MODE; 752 753 gcc_checking_assert (size > 1); 754 755 opt_scalar_int_mode tmode; 756 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT) 757 if (GET_MODE_SIZE (tmode.require ()) < size) 758 result = tmode.require (); 759 760 return result; 761 } 762 763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can 764 and should be performed piecewise. */ 765 766 static bool 767 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align, 768 enum by_pieces_operation op) 769 { 770 return targetm.use_by_pieces_infrastructure_p (len, align, op, 771 optimize_insn_for_speed_p ()); 772 } 773 774 /* Determine whether the LEN bytes can be moved by using several move 775 instructions. Return nonzero if a call to move_by_pieces should 776 succeed. */ 777 778 bool 779 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align) 780 { 781 return can_do_by_pieces (len, align, MOVE_BY_PIECES); 782 } 783 784 /* Return number of insns required to perform operation OP by pieces 785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */ 786 787 unsigned HOST_WIDE_INT 788 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align, 789 unsigned int max_size, by_pieces_operation op) 790 { 791 unsigned HOST_WIDE_INT n_insns = 0; 792 793 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); 794 795 while (max_size > 1 && l > 0) 796 { 797 scalar_int_mode mode = widest_int_mode_for_size (max_size); 798 enum insn_code icode; 799 800 unsigned int modesize = GET_MODE_SIZE (mode); 801 802 icode = optab_handler (mov_optab, mode); 803 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode)) 804 { 805 unsigned HOST_WIDE_INT n_pieces = l / modesize; 806 l %= modesize; 807 switch (op) 808 { 809 default: 810 n_insns += n_pieces; 811 break; 812 813 case COMPARE_BY_PIECES: 814 int batch = targetm.compare_by_pieces_branch_ratio (mode); 815 int batch_ops = 4 * batch - 1; 816 unsigned HOST_WIDE_INT full = n_pieces / batch; 817 n_insns += full * batch_ops; 818 if (n_pieces % batch != 0) 819 n_insns++; 820 break; 821 822 } 823 } 824 max_size = modesize; 825 } 826 827 gcc_assert (!l); 828 return n_insns; 829 } 830 831 /* Used when performing piecewise block operations, holds information 832 about one of the memory objects involved. The member functions 833 can be used to generate code for loading from the object and 834 updating the address when iterating. */ 835 836 class pieces_addr 837 { 838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate 839 stack pushes. */ 840 rtx m_obj; 841 /* The address of the object. Can differ from that seen in the 842 MEM rtx if we copied the address to a register. */ 843 rtx m_addr; 844 /* Nonzero if the address on the object has an autoincrement already, 845 signifies whether that was an increment or decrement. */ 846 signed char m_addr_inc; 847 /* Nonzero if we intend to use autoinc without the address already 848 having autoinc form. We will insert add insns around each memory 849 reference, expecting later passes to form autoinc addressing modes. 850 The only supported options are predecrement and postincrement. */ 851 signed char m_explicit_inc; 852 /* True if we have either of the two possible cases of using 853 autoincrement. */ 854 bool m_auto; 855 /* True if this is an address to be used for load operations rather 856 than stores. */ 857 bool m_is_load; 858 859 /* Optionally, a function to obtain constants for any given offset into 860 the objects, and data associated with it. */ 861 by_pieces_constfn m_constfn; 862 void *m_cfndata; 863 public: 864 pieces_addr (rtx, bool, by_pieces_constfn, void *); 865 rtx adjust (scalar_int_mode, HOST_WIDE_INT); 866 void increment_address (HOST_WIDE_INT); 867 void maybe_predec (HOST_WIDE_INT); 868 void maybe_postinc (HOST_WIDE_INT); 869 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT); 870 int get_addr_inc () 871 { 872 return m_addr_inc; 873 } 874 }; 875 876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is 877 true if the operation to be performed on this object is a load 878 rather than a store. For stores, OBJ can be NULL, in which case we 879 assume the operation is a stack push. For loads, the optional 880 CONSTFN and its associated CFNDATA can be used in place of the 881 memory load. */ 882 883 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn, 884 void *cfndata) 885 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata) 886 { 887 m_addr_inc = 0; 888 m_auto = false; 889 if (obj) 890 { 891 rtx addr = XEXP (obj, 0); 892 rtx_code code = GET_CODE (addr); 893 m_addr = addr; 894 bool dec = code == PRE_DEC || code == POST_DEC; 895 bool inc = code == PRE_INC || code == POST_INC; 896 m_auto = inc || dec; 897 if (m_auto) 898 m_addr_inc = dec ? -1 : 1; 899 900 /* While we have always looked for these codes here, the code 901 implementing the memory operation has never handled them. 902 Support could be added later if necessary or beneficial. */ 903 gcc_assert (code != PRE_INC && code != POST_DEC); 904 } 905 else 906 { 907 m_addr = NULL_RTX; 908 if (!is_load) 909 { 910 m_auto = true; 911 if (STACK_GROWS_DOWNWARD) 912 m_addr_inc = -1; 913 else 914 m_addr_inc = 1; 915 } 916 else 917 gcc_assert (constfn != NULL); 918 } 919 m_explicit_inc = 0; 920 if (constfn) 921 gcc_assert (is_load); 922 } 923 924 /* Decide whether to use autoinc for an address involved in a memory op. 925 MODE is the mode of the accesses, REVERSE is true if we've decided to 926 perform the operation starting from the end, and LEN is the length of 927 the operation. Don't override an earlier decision to set m_auto. */ 928 929 void 930 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse, 931 HOST_WIDE_INT len) 932 { 933 if (m_auto || m_obj == NULL_RTX) 934 return; 935 936 bool use_predec = (m_is_load 937 ? USE_LOAD_PRE_DECREMENT (mode) 938 : USE_STORE_PRE_DECREMENT (mode)); 939 bool use_postinc = (m_is_load 940 ? USE_LOAD_POST_INCREMENT (mode) 941 : USE_STORE_POST_INCREMENT (mode)); 942 machine_mode addr_mode = get_address_mode (m_obj); 943 944 if (use_predec && reverse) 945 { 946 m_addr = copy_to_mode_reg (addr_mode, 947 plus_constant (addr_mode, 948 m_addr, len)); 949 m_auto = true; 950 m_explicit_inc = -1; 951 } 952 else if (use_postinc && !reverse) 953 { 954 m_addr = copy_to_mode_reg (addr_mode, m_addr); 955 m_auto = true; 956 m_explicit_inc = 1; 957 } 958 else if (CONSTANT_P (m_addr)) 959 m_addr = copy_to_mode_reg (addr_mode, m_addr); 960 } 961 962 /* Adjust the address to refer to the data at OFFSET in MODE. If we 963 are using autoincrement for this address, we don't add the offset, 964 but we still modify the MEM's properties. */ 965 966 rtx 967 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset) 968 { 969 if (m_constfn) 970 return m_constfn (m_cfndata, offset, mode); 971 if (m_obj == NULL_RTX) 972 return NULL_RTX; 973 if (m_auto) 974 return adjust_automodify_address (m_obj, mode, m_addr, offset); 975 else 976 return adjust_address (m_obj, mode, offset); 977 } 978 979 /* Emit an add instruction to increment the address by SIZE. */ 980 981 void 982 pieces_addr::increment_address (HOST_WIDE_INT size) 983 { 984 rtx amount = gen_int_mode (size, GET_MODE (m_addr)); 985 emit_insn (gen_add2_insn (m_addr, amount)); 986 } 987 988 /* If we are supposed to decrement the address after each access, emit code 989 to do so now. Increment by SIZE (which has should have the correct sign 990 already). */ 991 992 void 993 pieces_addr::maybe_predec (HOST_WIDE_INT size) 994 { 995 if (m_explicit_inc >= 0) 996 return; 997 gcc_assert (HAVE_PRE_DECREMENT); 998 increment_address (size); 999 } 1000 1001 /* If we are supposed to decrement the address after each access, emit code 1002 to do so now. Increment by SIZE. */ 1003 1004 void 1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size) 1006 { 1007 if (m_explicit_inc <= 0) 1008 return; 1009 gcc_assert (HAVE_POST_INCREMENT); 1010 increment_address (size); 1011 } 1012 1013 /* This structure is used by do_op_by_pieces to describe the operation 1014 to be performed. */ 1015 1016 class op_by_pieces_d 1017 { 1018 protected: 1019 pieces_addr m_to, m_from; 1020 unsigned HOST_WIDE_INT m_len; 1021 HOST_WIDE_INT m_offset; 1022 unsigned int m_align; 1023 unsigned int m_max_size; 1024 bool m_reverse; 1025 1026 /* Virtual functions, overriden by derived classes for the specific 1027 operation. */ 1028 virtual void generate (rtx, rtx, machine_mode) = 0; 1029 virtual bool prepare_mode (machine_mode, unsigned int) = 0; 1030 virtual void finish_mode (machine_mode) 1031 { 1032 } 1033 1034 public: 1035 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *, 1036 unsigned HOST_WIDE_INT, unsigned int); 1037 void run (); 1038 }; 1039 1040 /* The constructor for an op_by_pieces_d structure. We require two 1041 objects named TO and FROM, which are identified as loads or stores 1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN 1043 and its associated FROM_CFN_DATA can be used to replace loads with 1044 constant values. LEN describes the length of the operation. */ 1045 1046 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load, 1047 rtx from, bool from_load, 1048 by_pieces_constfn from_cfn, 1049 void *from_cfn_data, 1050 unsigned HOST_WIDE_INT len, 1051 unsigned int align) 1052 : m_to (to, to_load, NULL, NULL), 1053 m_from (from, from_load, from_cfn, from_cfn_data), 1054 m_len (len), m_max_size (MOVE_MAX_PIECES + 1) 1055 { 1056 int toi = m_to.get_addr_inc (); 1057 int fromi = m_from.get_addr_inc (); 1058 if (toi >= 0 && fromi >= 0) 1059 m_reverse = false; 1060 else if (toi <= 0 && fromi <= 0) 1061 m_reverse = true; 1062 else 1063 gcc_unreachable (); 1064 1065 m_offset = m_reverse ? len : 0; 1066 align = MIN (to ? MEM_ALIGN (to) : align, 1067 from ? MEM_ALIGN (from) : align); 1068 1069 /* If copying requires more than two move insns, 1070 copy addresses to registers (to make displacements shorter) 1071 and use post-increment if available. */ 1072 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2) 1073 { 1074 /* Find the mode of the largest comparison. */ 1075 scalar_int_mode mode = widest_int_mode_for_size (m_max_size); 1076 1077 m_from.decide_autoinc (mode, m_reverse, len); 1078 m_to.decide_autoinc (mode, m_reverse, len); 1079 } 1080 1081 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align); 1082 m_align = align; 1083 } 1084 1085 /* This function contains the main loop used for expanding a block 1086 operation. First move what we can in the largest integer mode, 1087 then go to successively smaller modes. For every access, call 1088 GENFUN with the two operands and the EXTRA_DATA. */ 1089 1090 void 1091 op_by_pieces_d::run () 1092 { 1093 while (m_max_size > 1 && m_len > 0) 1094 { 1095 scalar_int_mode mode = widest_int_mode_for_size (m_max_size); 1096 1097 if (prepare_mode (mode, m_align)) 1098 { 1099 unsigned int size = GET_MODE_SIZE (mode); 1100 rtx to1 = NULL_RTX, from1; 1101 1102 while (m_len >= size) 1103 { 1104 if (m_reverse) 1105 m_offset -= size; 1106 1107 to1 = m_to.adjust (mode, m_offset); 1108 from1 = m_from.adjust (mode, m_offset); 1109 1110 m_to.maybe_predec (-(HOST_WIDE_INT)size); 1111 m_from.maybe_predec (-(HOST_WIDE_INT)size); 1112 1113 generate (to1, from1, mode); 1114 1115 m_to.maybe_postinc (size); 1116 m_from.maybe_postinc (size); 1117 1118 if (!m_reverse) 1119 m_offset += size; 1120 1121 m_len -= size; 1122 } 1123 1124 finish_mode (mode); 1125 } 1126 1127 m_max_size = GET_MODE_SIZE (mode); 1128 } 1129 1130 /* The code above should have handled everything. */ 1131 gcc_assert (!m_len); 1132 } 1133 1134 /* Derived class from op_by_pieces_d, providing support for block move 1135 operations. */ 1136 1137 class move_by_pieces_d : public op_by_pieces_d 1138 { 1139 insn_gen_fn m_gen_fun; 1140 void generate (rtx, rtx, machine_mode); 1141 bool prepare_mode (machine_mode, unsigned int); 1142 1143 public: 1144 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len, 1145 unsigned int align) 1146 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align) 1147 { 1148 } 1149 rtx finish_retmode (memop_ret); 1150 }; 1151 1152 /* Return true if MODE can be used for a set of copies, given an 1153 alignment ALIGN. Prepare whatever data is necessary for later 1154 calls to generate. */ 1155 1156 bool 1157 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) 1158 { 1159 insn_code icode = optab_handler (mov_optab, mode); 1160 m_gen_fun = GEN_FCN (icode); 1161 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode); 1162 } 1163 1164 /* A callback used when iterating for a compare_by_pieces_operation. 1165 OP0 and OP1 are the values that have been loaded and should be 1166 compared in MODE. If OP0 is NULL, this means we should generate a 1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn 1168 gen function that should be used to generate the mode. */ 1169 1170 void 1171 move_by_pieces_d::generate (rtx op0, rtx op1, 1172 machine_mode mode ATTRIBUTE_UNUSED) 1173 { 1174 #ifdef PUSH_ROUNDING 1175 if (op0 == NULL_RTX) 1176 { 1177 emit_single_push_insn (mode, op1, NULL); 1178 return; 1179 } 1180 #endif 1181 emit_insn (m_gen_fun (op0, op1)); 1182 } 1183 1184 /* Perform the final adjustment at the end of a string to obtain the 1185 correct return value for the block operation. 1186 Return value is based on RETMODE argument. */ 1187 1188 rtx 1189 move_by_pieces_d::finish_retmode (memop_ret retmode) 1190 { 1191 gcc_assert (!m_reverse); 1192 if (retmode == RETURN_END_MINUS_ONE) 1193 { 1194 m_to.maybe_postinc (-1); 1195 --m_offset; 1196 } 1197 return m_to.adjust (QImode, m_offset); 1198 } 1199 1200 /* Generate several move instructions to copy LEN bytes from block FROM to 1201 block TO. (These are MEM rtx's with BLKmode). 1202 1203 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is 1204 used to push FROM to the stack. 1205 1206 ALIGN is maximum stack alignment we can assume. 1207 1208 Return value is based on RETMODE argument. */ 1209 1210 rtx 1211 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len, 1212 unsigned int align, memop_ret retmode) 1213 { 1214 #ifndef PUSH_ROUNDING 1215 if (to == NULL) 1216 gcc_unreachable (); 1217 #endif 1218 1219 move_by_pieces_d data (to, from, len, align); 1220 1221 data.run (); 1222 1223 if (retmode != RETURN_BEGIN) 1224 return data.finish_retmode (retmode); 1225 else 1226 return to; 1227 } 1228 1229 /* Derived class from op_by_pieces_d, providing support for block move 1230 operations. */ 1231 1232 class store_by_pieces_d : public op_by_pieces_d 1233 { 1234 insn_gen_fn m_gen_fun; 1235 void generate (rtx, rtx, machine_mode); 1236 bool prepare_mode (machine_mode, unsigned int); 1237 1238 public: 1239 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data, 1240 unsigned HOST_WIDE_INT len, unsigned int align) 1241 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align) 1242 { 1243 } 1244 rtx finish_retmode (memop_ret); 1245 }; 1246 1247 /* Return true if MODE can be used for a set of stores, given an 1248 alignment ALIGN. Prepare whatever data is necessary for later 1249 calls to generate. */ 1250 1251 bool 1252 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) 1253 { 1254 insn_code icode = optab_handler (mov_optab, mode); 1255 m_gen_fun = GEN_FCN (icode); 1256 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode); 1257 } 1258 1259 /* A callback used when iterating for a store_by_pieces_operation. 1260 OP0 and OP1 are the values that have been loaded and should be 1261 compared in MODE. If OP0 is NULL, this means we should generate a 1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn 1263 gen function that should be used to generate the mode. */ 1264 1265 void 1266 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode) 1267 { 1268 emit_insn (m_gen_fun (op0, op1)); 1269 } 1270 1271 /* Perform the final adjustment at the end of a string to obtain the 1272 correct return value for the block operation. 1273 Return value is based on RETMODE argument. */ 1274 1275 rtx 1276 store_by_pieces_d::finish_retmode (memop_ret retmode) 1277 { 1278 gcc_assert (!m_reverse); 1279 if (retmode == RETURN_END_MINUS_ONE) 1280 { 1281 m_to.maybe_postinc (-1); 1282 --m_offset; 1283 } 1284 return m_to.adjust (QImode, m_offset); 1285 } 1286 1287 /* Determine whether the LEN bytes generated by CONSTFUN can be 1288 stored to memory using several move instructions. CONSTFUNDATA is 1289 a pointer which will be passed as argument in every CONSTFUN call. 1290 ALIGN is maximum alignment we can assume. MEMSETP is true if this is 1291 a memset operation and false if it's a copy of a constant string. 1292 Return nonzero if a call to store_by_pieces should succeed. */ 1293 1294 int 1295 can_store_by_pieces (unsigned HOST_WIDE_INT len, 1296 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode), 1297 void *constfundata, unsigned int align, bool memsetp) 1298 { 1299 unsigned HOST_WIDE_INT l; 1300 unsigned int max_size; 1301 HOST_WIDE_INT offset = 0; 1302 enum insn_code icode; 1303 int reverse; 1304 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */ 1305 rtx cst ATTRIBUTE_UNUSED; 1306 1307 if (len == 0) 1308 return 1; 1309 1310 if (!targetm.use_by_pieces_infrastructure_p (len, align, 1311 memsetp 1312 ? SET_BY_PIECES 1313 : STORE_BY_PIECES, 1314 optimize_insn_for_speed_p ())) 1315 return 0; 1316 1317 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align); 1318 1319 /* We would first store what we can in the largest integer mode, then go to 1320 successively smaller modes. */ 1321 1322 for (reverse = 0; 1323 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT); 1324 reverse++) 1325 { 1326 l = len; 1327 max_size = STORE_MAX_PIECES + 1; 1328 while (max_size > 1 && l > 0) 1329 { 1330 scalar_int_mode mode = widest_int_mode_for_size (max_size); 1331 1332 icode = optab_handler (mov_optab, mode); 1333 if (icode != CODE_FOR_nothing 1334 && align >= GET_MODE_ALIGNMENT (mode)) 1335 { 1336 unsigned int size = GET_MODE_SIZE (mode); 1337 1338 while (l >= size) 1339 { 1340 if (reverse) 1341 offset -= size; 1342 1343 cst = (*constfun) (constfundata, offset, mode); 1344 if (!targetm.legitimate_constant_p (mode, cst)) 1345 return 0; 1346 1347 if (!reverse) 1348 offset += size; 1349 1350 l -= size; 1351 } 1352 } 1353 1354 max_size = GET_MODE_SIZE (mode); 1355 } 1356 1357 /* The code above should have handled everything. */ 1358 gcc_assert (!l); 1359 } 1360 1361 return 1; 1362 } 1363 1364 /* Generate several move instructions to store LEN bytes generated by 1365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a 1366 pointer which will be passed as argument in every CONSTFUN call. 1367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is 1368 a memset operation and false if it's a copy of a constant string. 1369 Return value is based on RETMODE argument. */ 1370 1371 rtx 1372 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len, 1373 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode), 1374 void *constfundata, unsigned int align, bool memsetp, 1375 memop_ret retmode) 1376 { 1377 if (len == 0) 1378 { 1379 gcc_assert (retmode != RETURN_END_MINUS_ONE); 1380 return to; 1381 } 1382 1383 gcc_assert (targetm.use_by_pieces_infrastructure_p 1384 (len, align, 1385 memsetp ? SET_BY_PIECES : STORE_BY_PIECES, 1386 optimize_insn_for_speed_p ())); 1387 1388 store_by_pieces_d data (to, constfun, constfundata, len, align); 1389 data.run (); 1390 1391 if (retmode != RETURN_BEGIN) 1392 return data.finish_retmode (retmode); 1393 else 1394 return to; 1395 } 1396 1397 /* Callback routine for clear_by_pieces. 1398 Return const0_rtx unconditionally. */ 1399 1400 static rtx 1401 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode) 1402 { 1403 return const0_rtx; 1404 } 1405 1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM 1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */ 1408 1409 static void 1410 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align) 1411 { 1412 if (len == 0) 1413 return; 1414 1415 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align); 1416 data.run (); 1417 } 1418 1419 /* Context used by compare_by_pieces_genfn. It stores the fail label 1420 to jump to in case of miscomparison, and for branch ratios greater than 1, 1421 it stores an accumulator and the current and maximum counts before 1422 emitting another branch. */ 1423 1424 class compare_by_pieces_d : public op_by_pieces_d 1425 { 1426 rtx_code_label *m_fail_label; 1427 rtx m_accumulator; 1428 int m_count, m_batch; 1429 1430 void generate (rtx, rtx, machine_mode); 1431 bool prepare_mode (machine_mode, unsigned int); 1432 void finish_mode (machine_mode); 1433 public: 1434 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn, 1435 void *op1_cfn_data, HOST_WIDE_INT len, int align, 1436 rtx_code_label *fail_label) 1437 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align) 1438 { 1439 m_fail_label = fail_label; 1440 } 1441 }; 1442 1443 /* A callback used when iterating for a compare_by_pieces_operation. 1444 OP0 and OP1 are the values that have been loaded and should be 1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data 1446 context structure. */ 1447 1448 void 1449 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode) 1450 { 1451 if (m_batch > 1) 1452 { 1453 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX, 1454 true, OPTAB_LIB_WIDEN); 1455 if (m_count != 0) 1456 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp, 1457 true, OPTAB_LIB_WIDEN); 1458 m_accumulator = temp; 1459 1460 if (++m_count < m_batch) 1461 return; 1462 1463 m_count = 0; 1464 op0 = m_accumulator; 1465 op1 = const0_rtx; 1466 m_accumulator = NULL_RTX; 1467 } 1468 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL, 1469 m_fail_label, profile_probability::uninitialized ()); 1470 } 1471 1472 /* Return true if MODE can be used for a set of moves and comparisons, 1473 given an alignment ALIGN. Prepare whatever data is necessary for 1474 later calls to generate. */ 1475 1476 bool 1477 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align) 1478 { 1479 insn_code icode = optab_handler (mov_optab, mode); 1480 if (icode == CODE_FOR_nothing 1481 || align < GET_MODE_ALIGNMENT (mode) 1482 || !can_compare_p (EQ, mode, ccp_jump)) 1483 return false; 1484 m_batch = targetm.compare_by_pieces_branch_ratio (mode); 1485 if (m_batch < 0) 1486 return false; 1487 m_accumulator = NULL_RTX; 1488 m_count = 0; 1489 return true; 1490 } 1491 1492 /* Called after expanding a series of comparisons in MODE. If we have 1493 accumulated results for which we haven't emitted a branch yet, do 1494 so now. */ 1495 1496 void 1497 compare_by_pieces_d::finish_mode (machine_mode mode) 1498 { 1499 if (m_accumulator != NULL_RTX) 1500 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode, 1501 NULL_RTX, NULL, m_fail_label, 1502 profile_probability::uninitialized ()); 1503 } 1504 1505 /* Generate several move instructions to compare LEN bytes from blocks 1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode). 1507 1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is 1509 used to push FROM to the stack. 1510 1511 ALIGN is maximum stack alignment we can assume. 1512 1513 Optionally, the caller can pass a constfn and associated data in A1_CFN 1514 and A1_CFN_DATA. describing that the second operand being compared is a 1515 known constant and how to obtain its data. */ 1516 1517 static rtx 1518 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len, 1519 rtx target, unsigned int align, 1520 by_pieces_constfn a1_cfn, void *a1_cfn_data) 1521 { 1522 rtx_code_label *fail_label = gen_label_rtx (); 1523 rtx_code_label *end_label = gen_label_rtx (); 1524 1525 if (target == NULL_RTX 1526 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER) 1527 target = gen_reg_rtx (TYPE_MODE (integer_type_node)); 1528 1529 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align, 1530 fail_label); 1531 1532 data.run (); 1533 1534 emit_move_insn (target, const0_rtx); 1535 emit_jump (end_label); 1536 emit_barrier (); 1537 emit_label (fail_label); 1538 emit_move_insn (target, const1_rtx); 1539 emit_label (end_label); 1540 1541 return target; 1542 } 1543 1544 /* Emit code to move a block Y to a block X. This may be done with 1545 string-move instructions, with multiple scalar move instructions, 1546 or with a library call. 1547 1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode. 1549 SIZE is an rtx that says how long they are. 1550 ALIGN is the maximum alignment we can assume they have. 1551 METHOD describes what kind of copy this is, and what mechanisms may be used. 1552 MIN_SIZE is the minimal size of block to move 1553 MAX_SIZE is the maximal size of block to move, if it cannot be represented 1554 in unsigned HOST_WIDE_INT, than it is mask of all ones. 1555 1556 Return the address of the new block, if memcpy is called and returns it, 1557 0 otherwise. */ 1558 1559 rtx 1560 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method, 1561 unsigned int expected_align, HOST_WIDE_INT expected_size, 1562 unsigned HOST_WIDE_INT min_size, 1563 unsigned HOST_WIDE_INT max_size, 1564 unsigned HOST_WIDE_INT probable_max_size) 1565 { 1566 int may_use_call; 1567 rtx retval = 0; 1568 unsigned int align; 1569 1570 gcc_assert (size); 1571 if (CONST_INT_P (size) && INTVAL (size) == 0) 1572 return 0; 1573 1574 switch (method) 1575 { 1576 case BLOCK_OP_NORMAL: 1577 case BLOCK_OP_TAILCALL: 1578 may_use_call = 1; 1579 break; 1580 1581 case BLOCK_OP_CALL_PARM: 1582 may_use_call = block_move_libcall_safe_for_call_parm (); 1583 1584 /* Make inhibit_defer_pop nonzero around the library call 1585 to force it to pop the arguments right away. */ 1586 NO_DEFER_POP; 1587 break; 1588 1589 case BLOCK_OP_NO_LIBCALL: 1590 may_use_call = 0; 1591 break; 1592 1593 case BLOCK_OP_NO_LIBCALL_RET: 1594 may_use_call = -1; 1595 break; 1596 1597 default: 1598 gcc_unreachable (); 1599 } 1600 1601 gcc_assert (MEM_P (x) && MEM_P (y)); 1602 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); 1603 gcc_assert (align >= BITS_PER_UNIT); 1604 1605 /* Make sure we've got BLKmode addresses; store_one_arg can decide that 1606 block copy is more efficient for other large modes, e.g. DCmode. */ 1607 x = adjust_address (x, BLKmode, 0); 1608 y = adjust_address (y, BLKmode, 0); 1609 1610 /* Set MEM_SIZE as appropriate for this block copy. The main place this 1611 can be incorrect is coming from __builtin_memcpy. */ 1612 poly_int64 const_size; 1613 if (poly_int_rtx_p (size, &const_size)) 1614 { 1615 x = shallow_copy_rtx (x); 1616 y = shallow_copy_rtx (y); 1617 set_mem_size (x, const_size); 1618 set_mem_size (y, const_size); 1619 } 1620 1621 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align)) 1622 move_by_pieces (x, y, INTVAL (size), align, RETURN_BEGIN); 1623 else if (emit_block_move_via_movmem (x, y, size, align, 1624 expected_align, expected_size, 1625 min_size, max_size, probable_max_size)) 1626 ; 1627 else if (may_use_call 1628 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x)) 1629 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y))) 1630 { 1631 if (may_use_call < 0) 1632 return pc_rtx; 1633 1634 retval = emit_block_copy_via_libcall (x, y, size, 1635 method == BLOCK_OP_TAILCALL); 1636 } 1637 1638 else 1639 emit_block_move_via_loop (x, y, size, align); 1640 1641 if (method == BLOCK_OP_CALL_PARM) 1642 OK_DEFER_POP; 1643 1644 return retval; 1645 } 1646 1647 rtx 1648 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method) 1649 { 1650 unsigned HOST_WIDE_INT max, min = 0; 1651 if (GET_CODE (size) == CONST_INT) 1652 min = max = UINTVAL (size); 1653 else 1654 max = GET_MODE_MASK (GET_MODE (size)); 1655 return emit_block_move_hints (x, y, size, method, 0, -1, 1656 min, max, max); 1657 } 1658 1659 /* A subroutine of emit_block_move. Returns true if calling the 1660 block move libcall will not clobber any parameters which may have 1661 already been placed on the stack. */ 1662 1663 static bool 1664 block_move_libcall_safe_for_call_parm (void) 1665 { 1666 #if defined (REG_PARM_STACK_SPACE) 1667 tree fn; 1668 #endif 1669 1670 /* If arguments are pushed on the stack, then they're safe. */ 1671 if (PUSH_ARGS) 1672 return true; 1673 1674 /* If registers go on the stack anyway, any argument is sure to clobber 1675 an outgoing argument. */ 1676 #if defined (REG_PARM_STACK_SPACE) 1677 fn = builtin_decl_implicit (BUILT_IN_MEMCPY); 1678 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't 1679 depend on its argument. */ 1680 (void) fn; 1681 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn))) 1682 && REG_PARM_STACK_SPACE (fn) != 0) 1683 return false; 1684 #endif 1685 1686 /* If any argument goes in memory, then it might clobber an outgoing 1687 argument. */ 1688 { 1689 CUMULATIVE_ARGS args_so_far_v; 1690 cumulative_args_t args_so_far; 1691 tree fn, arg; 1692 1693 fn = builtin_decl_implicit (BUILT_IN_MEMCPY); 1694 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3); 1695 args_so_far = pack_cumulative_args (&args_so_far_v); 1696 1697 arg = TYPE_ARG_TYPES (TREE_TYPE (fn)); 1698 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg)) 1699 { 1700 machine_mode mode = TYPE_MODE (TREE_VALUE (arg)); 1701 rtx tmp = targetm.calls.function_arg (args_so_far, mode, 1702 NULL_TREE, true); 1703 if (!tmp || !REG_P (tmp)) 1704 return false; 1705 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1)) 1706 return false; 1707 targetm.calls.function_arg_advance (args_so_far, mode, 1708 NULL_TREE, true); 1709 } 1710 } 1711 return true; 1712 } 1713 1714 /* A subroutine of emit_block_move. Expand a movmem pattern; 1715 return true if successful. */ 1716 1717 static bool 1718 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align, 1719 unsigned int expected_align, HOST_WIDE_INT expected_size, 1720 unsigned HOST_WIDE_INT min_size, 1721 unsigned HOST_WIDE_INT max_size, 1722 unsigned HOST_WIDE_INT probable_max_size) 1723 { 1724 int save_volatile_ok = volatile_ok; 1725 1726 if (expected_align < align) 1727 expected_align = align; 1728 if (expected_size != -1) 1729 { 1730 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size) 1731 expected_size = probable_max_size; 1732 if ((unsigned HOST_WIDE_INT)expected_size < min_size) 1733 expected_size = min_size; 1734 } 1735 1736 /* Since this is a move insn, we don't care about volatility. */ 1737 volatile_ok = 1; 1738 1739 /* Try the most limited insn first, because there's no point 1740 including more than one in the machine description unless 1741 the more limited one has some advantage. */ 1742 1743 opt_scalar_int_mode mode_iter; 1744 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) 1745 { 1746 scalar_int_mode mode = mode_iter.require (); 1747 enum insn_code code = direct_optab_handler (movmem_optab, mode); 1748 1749 if (code != CODE_FOR_nothing 1750 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT 1751 here because if SIZE is less than the mode mask, as it is 1752 returned by the macro, it will definitely be less than the 1753 actual mode mask. Since SIZE is within the Pmode address 1754 space, we limit MODE to Pmode. */ 1755 && ((CONST_INT_P (size) 1756 && ((unsigned HOST_WIDE_INT) INTVAL (size) 1757 <= (GET_MODE_MASK (mode) >> 1))) 1758 || max_size <= (GET_MODE_MASK (mode) >> 1) 1759 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) 1760 { 1761 struct expand_operand ops[9]; 1762 unsigned int nops; 1763 1764 /* ??? When called via emit_block_move_for_call, it'd be 1765 nice if there were some way to inform the backend, so 1766 that it doesn't fail the expansion because it thinks 1767 emitting the libcall would be more efficient. */ 1768 nops = insn_data[(int) code].n_generator_args; 1769 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); 1770 1771 create_fixed_operand (&ops[0], x); 1772 create_fixed_operand (&ops[1], y); 1773 /* The check above guarantees that this size conversion is valid. */ 1774 create_convert_operand_to (&ops[2], size, mode, true); 1775 create_integer_operand (&ops[3], align / BITS_PER_UNIT); 1776 if (nops >= 6) 1777 { 1778 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); 1779 create_integer_operand (&ops[5], expected_size); 1780 } 1781 if (nops >= 8) 1782 { 1783 create_integer_operand (&ops[6], min_size); 1784 /* If we cannot represent the maximal size, 1785 make parameter NULL. */ 1786 if ((HOST_WIDE_INT) max_size != -1) 1787 create_integer_operand (&ops[7], max_size); 1788 else 1789 create_fixed_operand (&ops[7], NULL); 1790 } 1791 if (nops == 9) 1792 { 1793 /* If we cannot represent the maximal size, 1794 make parameter NULL. */ 1795 if ((HOST_WIDE_INT) probable_max_size != -1) 1796 create_integer_operand (&ops[8], probable_max_size); 1797 else 1798 create_fixed_operand (&ops[8], NULL); 1799 } 1800 if (maybe_expand_insn (code, nops, ops)) 1801 { 1802 volatile_ok = save_volatile_ok; 1803 return true; 1804 } 1805 } 1806 } 1807 1808 volatile_ok = save_volatile_ok; 1809 return false; 1810 } 1811 1812 /* A subroutine of emit_block_move. Copy the data via an explicit 1813 loop. This is used only when libcalls are forbidden. */ 1814 /* ??? It'd be nice to copy in hunks larger than QImode. */ 1815 1816 static void 1817 emit_block_move_via_loop (rtx x, rtx y, rtx size, 1818 unsigned int align ATTRIBUTE_UNUSED) 1819 { 1820 rtx_code_label *cmp_label, *top_label; 1821 rtx iter, x_addr, y_addr, tmp; 1822 machine_mode x_addr_mode = get_address_mode (x); 1823 machine_mode y_addr_mode = get_address_mode (y); 1824 machine_mode iter_mode; 1825 1826 iter_mode = GET_MODE (size); 1827 if (iter_mode == VOIDmode) 1828 iter_mode = word_mode; 1829 1830 top_label = gen_label_rtx (); 1831 cmp_label = gen_label_rtx (); 1832 iter = gen_reg_rtx (iter_mode); 1833 1834 emit_move_insn (iter, const0_rtx); 1835 1836 x_addr = force_operand (XEXP (x, 0), NULL_RTX); 1837 y_addr = force_operand (XEXP (y, 0), NULL_RTX); 1838 do_pending_stack_adjust (); 1839 1840 emit_jump (cmp_label); 1841 emit_label (top_label); 1842 1843 tmp = convert_modes (x_addr_mode, iter_mode, iter, true); 1844 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp); 1845 1846 if (x_addr_mode != y_addr_mode) 1847 tmp = convert_modes (y_addr_mode, iter_mode, iter, true); 1848 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp); 1849 1850 x = change_address (x, QImode, x_addr); 1851 y = change_address (y, QImode, y_addr); 1852 1853 emit_move_insn (x, y); 1854 1855 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter, 1856 true, OPTAB_LIB_WIDEN); 1857 if (tmp != iter) 1858 emit_move_insn (iter, tmp); 1859 1860 emit_label (cmp_label); 1861 1862 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode, 1863 true, top_label, 1864 profile_probability::guessed_always () 1865 .apply_scale (9, 10)); 1866 } 1867 1868 /* Expand a call to memcpy or memmove or memcmp, and return the result. 1869 TAILCALL is true if this is a tail call. */ 1870 1871 rtx 1872 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src, 1873 rtx size, bool tailcall) 1874 { 1875 rtx dst_addr, src_addr; 1876 tree call_expr, dst_tree, src_tree, size_tree; 1877 machine_mode size_mode; 1878 1879 /* Since dst and src are passed to a libcall, mark the corresponding 1880 tree EXPR as addressable. */ 1881 tree dst_expr = MEM_EXPR (dst); 1882 tree src_expr = MEM_EXPR (src); 1883 if (dst_expr) 1884 mark_addressable (dst_expr); 1885 if (src_expr) 1886 mark_addressable (src_expr); 1887 1888 dst_addr = copy_addr_to_reg (XEXP (dst, 0)); 1889 dst_addr = convert_memory_address (ptr_mode, dst_addr); 1890 dst_tree = make_tree (ptr_type_node, dst_addr); 1891 1892 src_addr = copy_addr_to_reg (XEXP (src, 0)); 1893 src_addr = convert_memory_address (ptr_mode, src_addr); 1894 src_tree = make_tree (ptr_type_node, src_addr); 1895 1896 size_mode = TYPE_MODE (sizetype); 1897 size = convert_to_mode (size_mode, size, 1); 1898 size = copy_to_mode_reg (size_mode, size); 1899 size_tree = make_tree (sizetype, size); 1900 1901 /* It is incorrect to use the libcall calling conventions for calls to 1902 memcpy/memmove/memcmp because they can be provided by the user. */ 1903 tree fn = builtin_decl_implicit (fncode); 1904 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree); 1905 CALL_EXPR_TAILCALL (call_expr) = tailcall; 1906 1907 return expand_call (call_expr, NULL_RTX, false); 1908 } 1909 1910 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands. 1911 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success, 1912 otherwise return null. */ 1913 1914 rtx 1915 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx, 1916 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx, 1917 HOST_WIDE_INT align) 1918 { 1919 machine_mode insn_mode = insn_data[icode].operand[0].mode; 1920 1921 if (target && (!REG_P (target) || HARD_REGISTER_P (target))) 1922 target = NULL_RTX; 1923 1924 struct expand_operand ops[5]; 1925 create_output_operand (&ops[0], target, insn_mode); 1926 create_fixed_operand (&ops[1], arg1_rtx); 1927 create_fixed_operand (&ops[2], arg2_rtx); 1928 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type), 1929 TYPE_UNSIGNED (arg3_type)); 1930 create_integer_operand (&ops[4], align); 1931 if (maybe_expand_insn (icode, 5, ops)) 1932 return ops[0].value; 1933 return NULL_RTX; 1934 } 1935 1936 /* Expand a block compare between X and Y with length LEN using the 1937 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type 1938 of the expression that was used to calculate the length. ALIGN 1939 gives the known minimum common alignment. */ 1940 1941 static rtx 1942 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target, 1943 unsigned align) 1944 { 1945 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for 1946 implementing memcmp because it will stop if it encounters two 1947 zero bytes. */ 1948 insn_code icode = direct_optab_handler (cmpmem_optab, SImode); 1949 1950 if (icode == CODE_FOR_nothing) 1951 return NULL_RTX; 1952 1953 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align); 1954 } 1955 1956 /* Emit code to compare a block Y to a block X. This may be done with 1957 string-compare instructions, with multiple scalar instructions, 1958 or with a library call. 1959 1960 Both X and Y must be MEM rtx's. LEN is an rtx that says how long 1961 they are. LEN_TYPE is the type of the expression that was used to 1962 calculate it. 1963 1964 If EQUALITY_ONLY is true, it means we don't have to return the tri-state 1965 value of a normal memcmp call, instead we can just compare for equality. 1966 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than 1967 returning NULL_RTX. 1968 1969 Optionally, the caller can pass a constfn and associated data in Y_CFN 1970 and Y_CFN_DATA. describing that the second operand being compared is a 1971 known constant and how to obtain its data. 1972 Return the result of the comparison, or NULL_RTX if we failed to 1973 perform the operation. */ 1974 1975 rtx 1976 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target, 1977 bool equality_only, by_pieces_constfn y_cfn, 1978 void *y_cfndata) 1979 { 1980 rtx result = 0; 1981 1982 if (CONST_INT_P (len) && INTVAL (len) == 0) 1983 return const0_rtx; 1984 1985 gcc_assert (MEM_P (x) && MEM_P (y)); 1986 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y)); 1987 gcc_assert (align >= BITS_PER_UNIT); 1988 1989 x = adjust_address (x, BLKmode, 0); 1990 y = adjust_address (y, BLKmode, 0); 1991 1992 if (equality_only 1993 && CONST_INT_P (len) 1994 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES)) 1995 result = compare_by_pieces (x, y, INTVAL (len), target, align, 1996 y_cfn, y_cfndata); 1997 else 1998 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align); 1999 2000 return result; 2001 } 2002 2003 /* Copy all or part of a value X into registers starting at REGNO. 2004 The number of registers to be filled is NREGS. */ 2005 2006 void 2007 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode) 2008 { 2009 if (nregs == 0) 2010 return; 2011 2012 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) 2013 x = validize_mem (force_const_mem (mode, x)); 2014 2015 /* See if the machine can do this with a load multiple insn. */ 2016 if (targetm.have_load_multiple ()) 2017 { 2018 rtx_insn *last = get_last_insn (); 2019 rtx first = gen_rtx_REG (word_mode, regno); 2020 if (rtx_insn *pat = targetm.gen_load_multiple (first, x, 2021 GEN_INT (nregs))) 2022 { 2023 emit_insn (pat); 2024 return; 2025 } 2026 else 2027 delete_insns_since (last); 2028 } 2029 2030 for (int i = 0; i < nregs; i++) 2031 emit_move_insn (gen_rtx_REG (word_mode, regno + i), 2032 operand_subword_force (x, i, mode)); 2033 } 2034 2035 /* Copy all or part of a BLKmode value X out of registers starting at REGNO. 2036 The number of registers to be filled is NREGS. */ 2037 2038 void 2039 move_block_from_reg (int regno, rtx x, int nregs) 2040 { 2041 if (nregs == 0) 2042 return; 2043 2044 /* See if the machine can do this with a store multiple insn. */ 2045 if (targetm.have_store_multiple ()) 2046 { 2047 rtx_insn *last = get_last_insn (); 2048 rtx first = gen_rtx_REG (word_mode, regno); 2049 if (rtx_insn *pat = targetm.gen_store_multiple (x, first, 2050 GEN_INT (nregs))) 2051 { 2052 emit_insn (pat); 2053 return; 2054 } 2055 else 2056 delete_insns_since (last); 2057 } 2058 2059 for (int i = 0; i < nregs; i++) 2060 { 2061 rtx tem = operand_subword (x, i, 1, BLKmode); 2062 2063 gcc_assert (tem); 2064 2065 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i)); 2066 } 2067 } 2068 2069 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from 2070 ORIG, where ORIG is a non-consecutive group of registers represented by 2071 a PARALLEL. The clone is identical to the original except in that the 2072 original set of registers is replaced by a new set of pseudo registers. 2073 The new set has the same modes as the original set. */ 2074 2075 rtx 2076 gen_group_rtx (rtx orig) 2077 { 2078 int i, length; 2079 rtx *tmps; 2080 2081 gcc_assert (GET_CODE (orig) == PARALLEL); 2082 2083 length = XVECLEN (orig, 0); 2084 tmps = XALLOCAVEC (rtx, length); 2085 2086 /* Skip a NULL entry in first slot. */ 2087 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1; 2088 2089 if (i) 2090 tmps[0] = 0; 2091 2092 for (; i < length; i++) 2093 { 2094 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0)); 2095 rtx offset = XEXP (XVECEXP (orig, 0, i), 1); 2096 2097 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset); 2098 } 2099 2100 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps)); 2101 } 2102 2103 /* A subroutine of emit_group_load. Arguments as for emit_group_load, 2104 except that values are placed in TMPS[i], and must later be moved 2105 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */ 2106 2107 static void 2108 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, 2109 poly_int64 ssize) 2110 { 2111 rtx src; 2112 int start, i; 2113 machine_mode m = GET_MODE (orig_src); 2114 2115 gcc_assert (GET_CODE (dst) == PARALLEL); 2116 2117 if (m != VOIDmode 2118 && !SCALAR_INT_MODE_P (m) 2119 && !MEM_P (orig_src) 2120 && GET_CODE (orig_src) != CONCAT) 2121 { 2122 scalar_int_mode imode; 2123 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode)) 2124 { 2125 src = gen_reg_rtx (imode); 2126 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src); 2127 } 2128 else 2129 { 2130 src = assign_stack_temp (GET_MODE (orig_src), ssize); 2131 emit_move_insn (src, orig_src); 2132 } 2133 emit_group_load_1 (tmps, dst, src, type, ssize); 2134 return; 2135 } 2136 2137 /* Check for a NULL entry, used to indicate that the parameter goes 2138 both on the stack and in registers. */ 2139 if (XEXP (XVECEXP (dst, 0, 0), 0)) 2140 start = 0; 2141 else 2142 start = 1; 2143 2144 /* Process the pieces. */ 2145 for (i = start; i < XVECLEN (dst, 0); i++) 2146 { 2147 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0)); 2148 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (dst, 0, i), 1)); 2149 poly_int64 bytelen = GET_MODE_SIZE (mode); 2150 poly_int64 shift = 0; 2151 2152 /* Handle trailing fragments that run over the size of the struct. 2153 It's the target's responsibility to make sure that the fragment 2154 cannot be strictly smaller in some cases and strictly larger 2155 in others. */ 2156 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize)); 2157 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)) 2158 { 2159 /* Arrange to shift the fragment to where it belongs. 2160 extract_bit_field loads to the lsb of the reg. */ 2161 if ( 2162 #ifdef BLOCK_REG_PADDING 2163 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start) 2164 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD) 2165 #else 2166 BYTES_BIG_ENDIAN 2167 #endif 2168 ) 2169 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; 2170 bytelen = ssize - bytepos; 2171 gcc_assert (maybe_gt (bytelen, 0)); 2172 } 2173 2174 /* If we won't be loading directly from memory, protect the real source 2175 from strange tricks we might play; but make sure that the source can 2176 be loaded directly into the destination. */ 2177 src = orig_src; 2178 if (!MEM_P (orig_src) 2179 && (!CONSTANT_P (orig_src) 2180 || (GET_MODE (orig_src) != mode 2181 && GET_MODE (orig_src) != VOIDmode))) 2182 { 2183 if (GET_MODE (orig_src) == VOIDmode) 2184 src = gen_reg_rtx (mode); 2185 else 2186 src = gen_reg_rtx (GET_MODE (orig_src)); 2187 2188 emit_move_insn (src, orig_src); 2189 } 2190 2191 /* Optimize the access just a bit. */ 2192 if (MEM_P (src) 2193 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src)) 2194 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode)) 2195 && multiple_p (bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode)) 2196 && known_eq (bytelen, GET_MODE_SIZE (mode))) 2197 { 2198 tmps[i] = gen_reg_rtx (mode); 2199 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos)); 2200 } 2201 else if (COMPLEX_MODE_P (mode) 2202 && GET_MODE (src) == mode 2203 && known_eq (bytelen, GET_MODE_SIZE (mode))) 2204 /* Let emit_move_complex do the bulk of the work. */ 2205 tmps[i] = src; 2206 else if (GET_CODE (src) == CONCAT) 2207 { 2208 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src)); 2209 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0))); 2210 unsigned int elt; 2211 poly_int64 subpos; 2212 2213 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos) 2214 && known_le (subpos + bytelen, slen0)) 2215 { 2216 /* The following assumes that the concatenated objects all 2217 have the same size. In this case, a simple calculation 2218 can be used to determine the object and the bit field 2219 to be extracted. */ 2220 tmps[i] = XEXP (src, elt); 2221 if (maybe_ne (subpos, 0) 2222 || maybe_ne (subpos + bytelen, slen0) 2223 || (!CONSTANT_P (tmps[i]) 2224 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))) 2225 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT, 2226 subpos * BITS_PER_UNIT, 2227 1, NULL_RTX, mode, mode, false, 2228 NULL); 2229 } 2230 else 2231 { 2232 rtx mem; 2233 2234 gcc_assert (known_eq (bytepos, 0)); 2235 mem = assign_stack_temp (GET_MODE (src), slen); 2236 emit_move_insn (mem, src); 2237 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT, 2238 0, 1, NULL_RTX, mode, mode, false, 2239 NULL); 2240 } 2241 } 2242 /* FIXME: A SIMD parallel will eventually lead to a subreg of a 2243 SIMD register, which is currently broken. While we get GCC 2244 to emit proper RTL for these cases, let's dump to memory. */ 2245 else if (VECTOR_MODE_P (GET_MODE (dst)) 2246 && REG_P (src)) 2247 { 2248 poly_uint64 slen = GET_MODE_SIZE (GET_MODE (src)); 2249 rtx mem; 2250 2251 mem = assign_stack_temp (GET_MODE (src), slen); 2252 emit_move_insn (mem, src); 2253 tmps[i] = adjust_address (mem, mode, bytepos); 2254 } 2255 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode 2256 && XVECLEN (dst, 0) > 1) 2257 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos); 2258 else if (CONSTANT_P (src)) 2259 { 2260 if (known_eq (bytelen, ssize)) 2261 tmps[i] = src; 2262 else 2263 { 2264 rtx first, second; 2265 2266 /* TODO: const_wide_int can have sizes other than this... */ 2267 gcc_assert (known_eq (2 * bytelen, ssize)); 2268 split_double (src, &first, &second); 2269 if (i) 2270 tmps[i] = second; 2271 else 2272 tmps[i] = first; 2273 } 2274 } 2275 else if (REG_P (src) && GET_MODE (src) == mode) 2276 tmps[i] = src; 2277 else 2278 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT, 2279 bytepos * BITS_PER_UNIT, 1, NULL_RTX, 2280 mode, mode, false, NULL); 2281 2282 if (maybe_ne (shift, 0)) 2283 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i], 2284 shift, tmps[i], 0); 2285 } 2286 } 2287 2288 /* Emit code to move a block SRC of type TYPE to a block DST, 2289 where DST is non-consecutive registers represented by a PARALLEL. 2290 SSIZE represents the total size of block ORIG_SRC in bytes, or -1 2291 if not known. */ 2292 2293 void 2294 emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize) 2295 { 2296 rtx *tmps; 2297 int i; 2298 2299 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0)); 2300 emit_group_load_1 (tmps, dst, src, type, ssize); 2301 2302 /* Copy the extracted pieces into the proper (probable) hard regs. */ 2303 for (i = 0; i < XVECLEN (dst, 0); i++) 2304 { 2305 rtx d = XEXP (XVECEXP (dst, 0, i), 0); 2306 if (d == NULL) 2307 continue; 2308 emit_move_insn (d, tmps[i]); 2309 } 2310 } 2311 2312 /* Similar, but load SRC into new pseudos in a format that looks like 2313 PARALLEL. This can later be fed to emit_group_move to get things 2314 in the right place. */ 2315 2316 rtx 2317 emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize) 2318 { 2319 rtvec vec; 2320 int i; 2321 2322 vec = rtvec_alloc (XVECLEN (parallel, 0)); 2323 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize); 2324 2325 /* Convert the vector to look just like the original PARALLEL, except 2326 with the computed values. */ 2327 for (i = 0; i < XVECLEN (parallel, 0); i++) 2328 { 2329 rtx e = XVECEXP (parallel, 0, i); 2330 rtx d = XEXP (e, 0); 2331 2332 if (d) 2333 { 2334 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i)); 2335 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1)); 2336 } 2337 RTVEC_ELT (vec, i) = e; 2338 } 2339 2340 return gen_rtx_PARALLEL (GET_MODE (parallel), vec); 2341 } 2342 2343 /* Emit code to move a block SRC to block DST, where SRC and DST are 2344 non-consecutive groups of registers, each represented by a PARALLEL. */ 2345 2346 void 2347 emit_group_move (rtx dst, rtx src) 2348 { 2349 int i; 2350 2351 gcc_assert (GET_CODE (src) == PARALLEL 2352 && GET_CODE (dst) == PARALLEL 2353 && XVECLEN (src, 0) == XVECLEN (dst, 0)); 2354 2355 /* Skip first entry if NULL. */ 2356 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++) 2357 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0), 2358 XEXP (XVECEXP (src, 0, i), 0)); 2359 } 2360 2361 /* Move a group of registers represented by a PARALLEL into pseudos. */ 2362 2363 rtx 2364 emit_group_move_into_temps (rtx src) 2365 { 2366 rtvec vec = rtvec_alloc (XVECLEN (src, 0)); 2367 int i; 2368 2369 for (i = 0; i < XVECLEN (src, 0); i++) 2370 { 2371 rtx e = XVECEXP (src, 0, i); 2372 rtx d = XEXP (e, 0); 2373 2374 if (d) 2375 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1)); 2376 RTVEC_ELT (vec, i) = e; 2377 } 2378 2379 return gen_rtx_PARALLEL (GET_MODE (src), vec); 2380 } 2381 2382 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE, 2383 where SRC is non-consecutive registers represented by a PARALLEL. 2384 SSIZE represents the total size of block ORIG_DST, or -1 if not 2385 known. */ 2386 2387 void 2388 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED, 2389 poly_int64 ssize) 2390 { 2391 rtx *tmps, dst; 2392 int start, finish, i; 2393 machine_mode m = GET_MODE (orig_dst); 2394 2395 gcc_assert (GET_CODE (src) == PARALLEL); 2396 2397 if (!SCALAR_INT_MODE_P (m) 2398 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT) 2399 { 2400 scalar_int_mode imode; 2401 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode)) 2402 { 2403 dst = gen_reg_rtx (imode); 2404 emit_group_store (dst, src, type, ssize); 2405 dst = gen_lowpart (GET_MODE (orig_dst), dst); 2406 } 2407 else 2408 { 2409 dst = assign_stack_temp (GET_MODE (orig_dst), ssize); 2410 emit_group_store (dst, src, type, ssize); 2411 } 2412 emit_move_insn (orig_dst, dst); 2413 return; 2414 } 2415 2416 /* Check for a NULL entry, used to indicate that the parameter goes 2417 both on the stack and in registers. */ 2418 if (XEXP (XVECEXP (src, 0, 0), 0)) 2419 start = 0; 2420 else 2421 start = 1; 2422 finish = XVECLEN (src, 0); 2423 2424 tmps = XALLOCAVEC (rtx, finish); 2425 2426 /* Copy the (probable) hard regs into pseudos. */ 2427 for (i = start; i < finish; i++) 2428 { 2429 rtx reg = XEXP (XVECEXP (src, 0, i), 0); 2430 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) 2431 { 2432 tmps[i] = gen_reg_rtx (GET_MODE (reg)); 2433 emit_move_insn (tmps[i], reg); 2434 } 2435 else 2436 tmps[i] = reg; 2437 } 2438 2439 /* If we won't be storing directly into memory, protect the real destination 2440 from strange tricks we might play. */ 2441 dst = orig_dst; 2442 if (GET_CODE (dst) == PARALLEL) 2443 { 2444 rtx temp; 2445 2446 /* We can get a PARALLEL dst if there is a conditional expression in 2447 a return statement. In that case, the dst and src are the same, 2448 so no action is necessary. */ 2449 if (rtx_equal_p (dst, src)) 2450 return; 2451 2452 /* It is unclear if we can ever reach here, but we may as well handle 2453 it. Allocate a temporary, and split this into a store/load to/from 2454 the temporary. */ 2455 temp = assign_stack_temp (GET_MODE (dst), ssize); 2456 emit_group_store (temp, src, type, ssize); 2457 emit_group_load (dst, temp, type, ssize); 2458 return; 2459 } 2460 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT) 2461 { 2462 machine_mode outer = GET_MODE (dst); 2463 machine_mode inner; 2464 poly_int64 bytepos; 2465 bool done = false; 2466 rtx temp; 2467 2468 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER) 2469 dst = gen_reg_rtx (outer); 2470 2471 /* Make life a bit easier for combine. */ 2472 /* If the first element of the vector is the low part 2473 of the destination mode, use a paradoxical subreg to 2474 initialize the destination. */ 2475 if (start < finish) 2476 { 2477 inner = GET_MODE (tmps[start]); 2478 bytepos = subreg_lowpart_offset (inner, outer); 2479 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, start), 1)), 2480 bytepos)) 2481 { 2482 temp = simplify_gen_subreg (outer, tmps[start], 2483 inner, 0); 2484 if (temp) 2485 { 2486 emit_move_insn (dst, temp); 2487 done = true; 2488 start++; 2489 } 2490 } 2491 } 2492 2493 /* If the first element wasn't the low part, try the last. */ 2494 if (!done 2495 && start < finish - 1) 2496 { 2497 inner = GET_MODE (tmps[finish - 1]); 2498 bytepos = subreg_lowpart_offset (inner, outer); 2499 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, 2500 finish - 1), 1)), 2501 bytepos)) 2502 { 2503 temp = simplify_gen_subreg (outer, tmps[finish - 1], 2504 inner, 0); 2505 if (temp) 2506 { 2507 emit_move_insn (dst, temp); 2508 done = true; 2509 finish--; 2510 } 2511 } 2512 } 2513 2514 /* Otherwise, simply initialize the result to zero. */ 2515 if (!done) 2516 emit_move_insn (dst, CONST0_RTX (outer)); 2517 } 2518 2519 /* Process the pieces. */ 2520 for (i = start; i < finish; i++) 2521 { 2522 poly_int64 bytepos = rtx_to_poly_int64 (XEXP (XVECEXP (src, 0, i), 1)); 2523 machine_mode mode = GET_MODE (tmps[i]); 2524 poly_int64 bytelen = GET_MODE_SIZE (mode); 2525 poly_uint64 adj_bytelen; 2526 rtx dest = dst; 2527 2528 /* Handle trailing fragments that run over the size of the struct. 2529 It's the target's responsibility to make sure that the fragment 2530 cannot be strictly smaller in some cases and strictly larger 2531 in others. */ 2532 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize)); 2533 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)) 2534 adj_bytelen = ssize - bytepos; 2535 else 2536 adj_bytelen = bytelen; 2537 2538 if (GET_CODE (dst) == CONCAT) 2539 { 2540 if (known_le (bytepos + adj_bytelen, 2541 GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))) 2542 dest = XEXP (dst, 0); 2543 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))))) 2544 { 2545 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0))); 2546 dest = XEXP (dst, 1); 2547 } 2548 else 2549 { 2550 machine_mode dest_mode = GET_MODE (dest); 2551 machine_mode tmp_mode = GET_MODE (tmps[i]); 2552 2553 gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0)); 2554 2555 if (GET_MODE_ALIGNMENT (dest_mode) 2556 >= GET_MODE_ALIGNMENT (tmp_mode)) 2557 { 2558 dest = assign_stack_temp (dest_mode, 2559 GET_MODE_SIZE (dest_mode)); 2560 emit_move_insn (adjust_address (dest, 2561 tmp_mode, 2562 bytepos), 2563 tmps[i]); 2564 dst = dest; 2565 } 2566 else 2567 { 2568 dest = assign_stack_temp (tmp_mode, 2569 GET_MODE_SIZE (tmp_mode)); 2570 emit_move_insn (dest, tmps[i]); 2571 dst = adjust_address (dest, dest_mode, bytepos); 2572 } 2573 break; 2574 } 2575 } 2576 2577 /* Handle trailing fragments that run over the size of the struct. */ 2578 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize)) 2579 { 2580 /* store_bit_field always takes its value from the lsb. 2581 Move the fragment to the lsb if it's not already there. */ 2582 if ( 2583 #ifdef BLOCK_REG_PADDING 2584 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start) 2585 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD) 2586 #else 2587 BYTES_BIG_ENDIAN 2588 #endif 2589 ) 2590 { 2591 poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT; 2592 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i], 2593 shift, tmps[i], 0); 2594 } 2595 2596 /* Make sure not to write past the end of the struct. */ 2597 store_bit_field (dest, 2598 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, 2599 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1, 2600 VOIDmode, tmps[i], false); 2601 } 2602 2603 /* Optimize the access just a bit. */ 2604 else if (MEM_P (dest) 2605 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest)) 2606 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode)) 2607 && multiple_p (bytepos * BITS_PER_UNIT, 2608 GET_MODE_ALIGNMENT (mode)) 2609 && known_eq (bytelen, GET_MODE_SIZE (mode))) 2610 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]); 2611 2612 else 2613 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT, 2614 0, 0, mode, tmps[i], false); 2615 } 2616 2617 /* Copy from the pseudo into the (probable) hard reg. */ 2618 if (orig_dst != dst) 2619 emit_move_insn (orig_dst, dst); 2620 } 2621 2622 /* Return a form of X that does not use a PARALLEL. TYPE is the type 2623 of the value stored in X. */ 2624 2625 rtx 2626 maybe_emit_group_store (rtx x, tree type) 2627 { 2628 machine_mode mode = TYPE_MODE (type); 2629 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode); 2630 if (GET_CODE (x) == PARALLEL) 2631 { 2632 rtx result = gen_reg_rtx (mode); 2633 emit_group_store (result, x, type, int_size_in_bytes (type)); 2634 return result; 2635 } 2636 return x; 2637 } 2638 2639 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET. 2640 2641 This is used on targets that return BLKmode values in registers. */ 2642 2643 static void 2644 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type) 2645 { 2646 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type); 2647 rtx src = NULL, dst = NULL; 2648 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD); 2649 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0; 2650 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */ 2651 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg)); 2652 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target)); 2653 fixed_size_mode copy_mode; 2654 2655 /* BLKmode registers created in the back-end shouldn't have survived. */ 2656 gcc_assert (mode != BLKmode); 2657 2658 /* If the structure doesn't take up a whole number of words, see whether 2659 SRCREG is padded on the left or on the right. If it's on the left, 2660 set PADDING_CORRECTION to the number of bits to skip. 2661 2662 In most ABIs, the structure will be returned at the least end of 2663 the register, which translates to right padding on little-endian 2664 targets and left padding on big-endian targets. The opposite 2665 holds if the structure is returned at the most significant 2666 end of the register. */ 2667 if (bytes % UNITS_PER_WORD != 0 2668 && (targetm.calls.return_in_msb (type) 2669 ? !BYTES_BIG_ENDIAN 2670 : BYTES_BIG_ENDIAN)) 2671 padding_correction 2672 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT)); 2673 2674 /* We can use a single move if we have an exact mode for the size. */ 2675 else if (MEM_P (target) 2676 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target)) 2677 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode)) 2678 && bytes == GET_MODE_SIZE (mode)) 2679 { 2680 emit_move_insn (adjust_address (target, mode, 0), srcreg); 2681 return; 2682 } 2683 2684 /* And if we additionally have the same mode for a register. */ 2685 else if (REG_P (target) 2686 && GET_MODE (target) == mode 2687 && bytes == GET_MODE_SIZE (mode)) 2688 { 2689 emit_move_insn (target, srcreg); 2690 return; 2691 } 2692 2693 /* This code assumes srcreg is at least a full word. If it isn't, copy it 2694 into a new pseudo which is a full word. */ 2695 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) 2696 { 2697 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type)); 2698 mode = word_mode; 2699 } 2700 2701 /* Copy the structure BITSIZE bits at a time. If the target lives in 2702 memory, take care of not reading/writing past its end by selecting 2703 a copy mode suited to BITSIZE. This should always be possible given 2704 how it is computed. 2705 2706 If the target lives in register, make sure not to select a copy mode 2707 larger than the mode of the register. 2708 2709 We could probably emit more efficient code for machines which do not use 2710 strict alignment, but it doesn't seem worth the effort at the current 2711 time. */ 2712 2713 copy_mode = word_mode; 2714 if (MEM_P (target)) 2715 { 2716 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1); 2717 if (mem_mode.exists ()) 2718 copy_mode = mem_mode.require (); 2719 } 2720 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD) 2721 copy_mode = tmode; 2722 2723 for (bitpos = 0, xbitpos = padding_correction; 2724 bitpos < bytes * BITS_PER_UNIT; 2725 bitpos += bitsize, xbitpos += bitsize) 2726 { 2727 /* We need a new source operand each time xbitpos is on a 2728 word boundary and when xbitpos == padding_correction 2729 (the first time through). */ 2730 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction) 2731 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode); 2732 2733 /* We need a new destination operand each time bitpos is on 2734 a word boundary. */ 2735 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD) 2736 dst = target; 2737 else if (bitpos % BITS_PER_WORD == 0) 2738 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode); 2739 2740 /* Use xbitpos for the source extraction (right justified) and 2741 bitpos for the destination store (left justified). */ 2742 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode, 2743 extract_bit_field (src, bitsize, 2744 xbitpos % BITS_PER_WORD, 1, 2745 NULL_RTX, copy_mode, copy_mode, 2746 false, NULL), 2747 false); 2748 } 2749 } 2750 2751 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the 2752 register if it contains any data, otherwise return null. 2753 2754 This is used on targets that return BLKmode values in registers. */ 2755 2756 rtx 2757 copy_blkmode_to_reg (machine_mode mode_in, tree src) 2758 { 2759 int i, n_regs; 2760 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes; 2761 unsigned int bitsize; 2762 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX; 2763 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */ 2764 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in); 2765 fixed_size_mode dst_mode; 2766 scalar_int_mode min_mode; 2767 2768 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode); 2769 2770 x = expand_normal (src); 2771 2772 bytes = arg_int_size_in_bytes (TREE_TYPE (src)); 2773 if (bytes == 0) 2774 return NULL_RTX; 2775 2776 /* If the structure doesn't take up a whole number of words, see 2777 whether the register value should be padded on the left or on 2778 the right. Set PADDING_CORRECTION to the number of padding 2779 bits needed on the left side. 2780 2781 In most ABIs, the structure will be returned at the least end of 2782 the register, which translates to right padding on little-endian 2783 targets and left padding on big-endian targets. The opposite 2784 holds if the structure is returned at the most significant 2785 end of the register. */ 2786 if (bytes % UNITS_PER_WORD != 0 2787 && (targetm.calls.return_in_msb (TREE_TYPE (src)) 2788 ? !BYTES_BIG_ENDIAN 2789 : BYTES_BIG_ENDIAN)) 2790 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) 2791 * BITS_PER_UNIT)); 2792 2793 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; 2794 dst_words = XALLOCAVEC (rtx, n_regs); 2795 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD); 2796 min_mode = smallest_int_mode_for_size (bitsize); 2797 2798 /* Copy the structure BITSIZE bits at a time. */ 2799 for (bitpos = 0, xbitpos = padding_correction; 2800 bitpos < bytes * BITS_PER_UNIT; 2801 bitpos += bitsize, xbitpos += bitsize) 2802 { 2803 /* We need a new destination pseudo each time xbitpos is 2804 on a word boundary and when xbitpos == padding_correction 2805 (the first time through). */ 2806 if (xbitpos % BITS_PER_WORD == 0 2807 || xbitpos == padding_correction) 2808 { 2809 /* Generate an appropriate register. */ 2810 dst_word = gen_reg_rtx (word_mode); 2811 dst_words[xbitpos / BITS_PER_WORD] = dst_word; 2812 2813 /* Clear the destination before we move anything into it. */ 2814 emit_move_insn (dst_word, CONST0_RTX (word_mode)); 2815 } 2816 2817 /* Find the largest integer mode that can be used to copy all or as 2818 many bits as possible of the structure if the target supports larger 2819 copies. There are too many corner cases here w.r.t to alignments on 2820 the read/writes. So if there is any padding just use single byte 2821 operations. */ 2822 opt_scalar_int_mode mode_iter; 2823 if (padding_correction == 0 && !STRICT_ALIGNMENT) 2824 { 2825 FOR_EACH_MODE_FROM (mode_iter, min_mode) 2826 { 2827 unsigned int msize = GET_MODE_BITSIZE (mode_iter.require ()); 2828 if (msize <= ((bytes * BITS_PER_UNIT) - bitpos) 2829 && msize <= BITS_PER_WORD) 2830 bitsize = msize; 2831 else 2832 break; 2833 } 2834 } 2835 2836 /* We need a new source operand each time bitpos is on a word 2837 boundary. */ 2838 if (bitpos % BITS_PER_WORD == 0) 2839 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode); 2840 2841 /* Use bitpos for the source extraction (left justified) and 2842 xbitpos for the destination store (right justified). */ 2843 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD, 2844 0, 0, word_mode, 2845 extract_bit_field (src_word, bitsize, 2846 bitpos % BITS_PER_WORD, 1, 2847 NULL_RTX, word_mode, word_mode, 2848 false, NULL), 2849 false); 2850 } 2851 2852 if (mode == BLKmode) 2853 { 2854 /* Find the smallest integer mode large enough to hold the 2855 entire structure. */ 2856 opt_scalar_int_mode mode_iter; 2857 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) 2858 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes) 2859 break; 2860 2861 /* A suitable mode should have been found. */ 2862 mode = mode_iter.require (); 2863 } 2864 2865 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode)) 2866 dst_mode = word_mode; 2867 else 2868 dst_mode = mode; 2869 dst = gen_reg_rtx (dst_mode); 2870 2871 for (i = 0; i < n_regs; i++) 2872 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]); 2873 2874 if (mode != dst_mode) 2875 dst = gen_lowpart (mode, dst); 2876 2877 return dst; 2878 } 2879 2880 /* Add a USE expression for REG to the (possibly empty) list pointed 2881 to by CALL_FUSAGE. REG must denote a hard register. */ 2882 2883 void 2884 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode) 2885 { 2886 gcc_assert (REG_P (reg)); 2887 2888 if (!HARD_REGISTER_P (reg)) 2889 return; 2890 2891 *call_fusage 2892 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage); 2893 } 2894 2895 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed 2896 to by CALL_FUSAGE. REG must denote a hard register. */ 2897 2898 void 2899 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode) 2900 { 2901 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER); 2902 2903 *call_fusage 2904 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage); 2905 } 2906 2907 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs, 2908 starting at REGNO. All of these registers must be hard registers. */ 2909 2910 void 2911 use_regs (rtx *call_fusage, int regno, int nregs) 2912 { 2913 int i; 2914 2915 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); 2916 2917 for (i = 0; i < nregs; i++) 2918 use_reg (call_fusage, regno_reg_rtx[regno + i]); 2919 } 2920 2921 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the 2922 PARALLEL REGS. This is for calls that pass values in multiple 2923 non-contiguous locations. The Irix 6 ABI has examples of this. */ 2924 2925 void 2926 use_group_regs (rtx *call_fusage, rtx regs) 2927 { 2928 int i; 2929 2930 for (i = 0; i < XVECLEN (regs, 0); i++) 2931 { 2932 rtx reg = XEXP (XVECEXP (regs, 0, i), 0); 2933 2934 /* A NULL entry means the parameter goes both on the stack and in 2935 registers. This can also be a MEM for targets that pass values 2936 partially on the stack and partially in registers. */ 2937 if (reg != 0 && REG_P (reg)) 2938 use_reg (call_fusage, reg); 2939 } 2940 } 2941 2942 /* Return the defining gimple statement for SSA_NAME NAME if it is an 2943 assigment and the code of the expresion on the RHS is CODE. Return 2944 NULL otherwise. */ 2945 2946 static gimple * 2947 get_def_for_expr (tree name, enum tree_code code) 2948 { 2949 gimple *def_stmt; 2950 2951 if (TREE_CODE (name) != SSA_NAME) 2952 return NULL; 2953 2954 def_stmt = get_gimple_for_ssa_name (name); 2955 if (!def_stmt 2956 || gimple_assign_rhs_code (def_stmt) != code) 2957 return NULL; 2958 2959 return def_stmt; 2960 } 2961 2962 /* Return the defining gimple statement for SSA_NAME NAME if it is an 2963 assigment and the class of the expresion on the RHS is CLASS. Return 2964 NULL otherwise. */ 2965 2966 static gimple * 2967 get_def_for_expr_class (tree name, enum tree_code_class tclass) 2968 { 2969 gimple *def_stmt; 2970 2971 if (TREE_CODE (name) != SSA_NAME) 2972 return NULL; 2973 2974 def_stmt = get_gimple_for_ssa_name (name); 2975 if (!def_stmt 2976 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass) 2977 return NULL; 2978 2979 return def_stmt; 2980 } 2981 2982 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is 2983 its length in bytes. */ 2984 2985 rtx 2986 clear_storage_hints (rtx object, rtx size, enum block_op_methods method, 2987 unsigned int expected_align, HOST_WIDE_INT expected_size, 2988 unsigned HOST_WIDE_INT min_size, 2989 unsigned HOST_WIDE_INT max_size, 2990 unsigned HOST_WIDE_INT probable_max_size) 2991 { 2992 machine_mode mode = GET_MODE (object); 2993 unsigned int align; 2994 2995 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL); 2996 2997 /* If OBJECT is not BLKmode and SIZE is the same size as its mode, 2998 just move a zero. Otherwise, do this a piece at a time. */ 2999 poly_int64 size_val; 3000 if (mode != BLKmode 3001 && poly_int_rtx_p (size, &size_val) 3002 && known_eq (size_val, GET_MODE_SIZE (mode))) 3003 { 3004 rtx zero = CONST0_RTX (mode); 3005 if (zero != NULL) 3006 { 3007 emit_move_insn (object, zero); 3008 return NULL; 3009 } 3010 3011 if (COMPLEX_MODE_P (mode)) 3012 { 3013 zero = CONST0_RTX (GET_MODE_INNER (mode)); 3014 if (zero != NULL) 3015 { 3016 write_complex_part (object, zero, 0); 3017 write_complex_part (object, zero, 1); 3018 return NULL; 3019 } 3020 } 3021 } 3022 3023 if (size == const0_rtx) 3024 return NULL; 3025 3026 align = MEM_ALIGN (object); 3027 3028 if (CONST_INT_P (size) 3029 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align, 3030 CLEAR_BY_PIECES, 3031 optimize_insn_for_speed_p ())) 3032 clear_by_pieces (object, INTVAL (size), align); 3033 else if (set_storage_via_setmem (object, size, const0_rtx, align, 3034 expected_align, expected_size, 3035 min_size, max_size, probable_max_size)) 3036 ; 3037 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object))) 3038 return set_storage_via_libcall (object, size, const0_rtx, 3039 method == BLOCK_OP_TAILCALL); 3040 else 3041 gcc_unreachable (); 3042 3043 return NULL; 3044 } 3045 3046 rtx 3047 clear_storage (rtx object, rtx size, enum block_op_methods method) 3048 { 3049 unsigned HOST_WIDE_INT max, min = 0; 3050 if (GET_CODE (size) == CONST_INT) 3051 min = max = UINTVAL (size); 3052 else 3053 max = GET_MODE_MASK (GET_MODE (size)); 3054 return clear_storage_hints (object, size, method, 0, -1, min, max, max); 3055 } 3056 3057 3058 /* A subroutine of clear_storage. Expand a call to memset. 3059 Return the return value of memset, 0 otherwise. */ 3060 3061 rtx 3062 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall) 3063 { 3064 tree call_expr, fn, object_tree, size_tree, val_tree; 3065 machine_mode size_mode; 3066 3067 object = copy_addr_to_reg (XEXP (object, 0)); 3068 object_tree = make_tree (ptr_type_node, object); 3069 3070 if (!CONST_INT_P (val)) 3071 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1); 3072 val_tree = make_tree (integer_type_node, val); 3073 3074 size_mode = TYPE_MODE (sizetype); 3075 size = convert_to_mode (size_mode, size, 1); 3076 size = copy_to_mode_reg (size_mode, size); 3077 size_tree = make_tree (sizetype, size); 3078 3079 /* It is incorrect to use the libcall calling conventions for calls to 3080 memset because it can be provided by the user. */ 3081 fn = builtin_decl_implicit (BUILT_IN_MEMSET); 3082 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree); 3083 CALL_EXPR_TAILCALL (call_expr) = tailcall; 3084 3085 return expand_call (call_expr, NULL_RTX, false); 3086 } 3087 3088 /* Expand a setmem pattern; return true if successful. */ 3089 3090 bool 3091 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align, 3092 unsigned int expected_align, HOST_WIDE_INT expected_size, 3093 unsigned HOST_WIDE_INT min_size, 3094 unsigned HOST_WIDE_INT max_size, 3095 unsigned HOST_WIDE_INT probable_max_size) 3096 { 3097 /* Try the most limited insn first, because there's no point 3098 including more than one in the machine description unless 3099 the more limited one has some advantage. */ 3100 3101 if (expected_align < align) 3102 expected_align = align; 3103 if (expected_size != -1) 3104 { 3105 if ((unsigned HOST_WIDE_INT)expected_size > max_size) 3106 expected_size = max_size; 3107 if ((unsigned HOST_WIDE_INT)expected_size < min_size) 3108 expected_size = min_size; 3109 } 3110 3111 opt_scalar_int_mode mode_iter; 3112 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT) 3113 { 3114 scalar_int_mode mode = mode_iter.require (); 3115 enum insn_code code = direct_optab_handler (setmem_optab, mode); 3116 3117 if (code != CODE_FOR_nothing 3118 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT 3119 here because if SIZE is less than the mode mask, as it is 3120 returned by the macro, it will definitely be less than the 3121 actual mode mask. Since SIZE is within the Pmode address 3122 space, we limit MODE to Pmode. */ 3123 && ((CONST_INT_P (size) 3124 && ((unsigned HOST_WIDE_INT) INTVAL (size) 3125 <= (GET_MODE_MASK (mode) >> 1))) 3126 || max_size <= (GET_MODE_MASK (mode) >> 1) 3127 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode))) 3128 { 3129 struct expand_operand ops[9]; 3130 unsigned int nops; 3131 3132 nops = insn_data[(int) code].n_generator_args; 3133 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9); 3134 3135 create_fixed_operand (&ops[0], object); 3136 /* The check above guarantees that this size conversion is valid. */ 3137 create_convert_operand_to (&ops[1], size, mode, true); 3138 create_convert_operand_from (&ops[2], val, byte_mode, true); 3139 create_integer_operand (&ops[3], align / BITS_PER_UNIT); 3140 if (nops >= 6) 3141 { 3142 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT); 3143 create_integer_operand (&ops[5], expected_size); 3144 } 3145 if (nops >= 8) 3146 { 3147 create_integer_operand (&ops[6], min_size); 3148 /* If we cannot represent the maximal size, 3149 make parameter NULL. */ 3150 if ((HOST_WIDE_INT) max_size != -1) 3151 create_integer_operand (&ops[7], max_size); 3152 else 3153 create_fixed_operand (&ops[7], NULL); 3154 } 3155 if (nops == 9) 3156 { 3157 /* If we cannot represent the maximal size, 3158 make parameter NULL. */ 3159 if ((HOST_WIDE_INT) probable_max_size != -1) 3160 create_integer_operand (&ops[8], probable_max_size); 3161 else 3162 create_fixed_operand (&ops[8], NULL); 3163 } 3164 if (maybe_expand_insn (code, nops, ops)) 3165 return true; 3166 } 3167 } 3168 3169 return false; 3170 } 3171 3172 3173 /* Write to one of the components of the complex value CPLX. Write VAL to 3174 the real part if IMAG_P is false, and the imaginary part if its true. */ 3175 3176 void 3177 write_complex_part (rtx cplx, rtx val, bool imag_p) 3178 { 3179 machine_mode cmode; 3180 scalar_mode imode; 3181 unsigned ibitsize; 3182 3183 if (GET_CODE (cplx) == CONCAT) 3184 { 3185 emit_move_insn (XEXP (cplx, imag_p), val); 3186 return; 3187 } 3188 3189 cmode = GET_MODE (cplx); 3190 imode = GET_MODE_INNER (cmode); 3191 ibitsize = GET_MODE_BITSIZE (imode); 3192 3193 /* For MEMs simplify_gen_subreg may generate an invalid new address 3194 because, e.g., the original address is considered mode-dependent 3195 by the target, which restricts simplify_subreg from invoking 3196 adjust_address_nv. Instead of preparing fallback support for an 3197 invalid address, we call adjust_address_nv directly. */ 3198 if (MEM_P (cplx)) 3199 { 3200 emit_move_insn (adjust_address_nv (cplx, imode, 3201 imag_p ? GET_MODE_SIZE (imode) : 0), 3202 val); 3203 return; 3204 } 3205 3206 /* If the sub-object is at least word sized, then we know that subregging 3207 will work. This special case is important, since store_bit_field 3208 wants to operate on integer modes, and there's rarely an OImode to 3209 correspond to TCmode. */ 3210 if (ibitsize >= BITS_PER_WORD 3211 /* For hard regs we have exact predicates. Assume we can split 3212 the original object if it spans an even number of hard regs. 3213 This special case is important for SCmode on 64-bit platforms 3214 where the natural size of floating-point regs is 32-bit. */ 3215 || (REG_P (cplx) 3216 && REGNO (cplx) < FIRST_PSEUDO_REGISTER 3217 && REG_NREGS (cplx) % 2 == 0)) 3218 { 3219 rtx part = simplify_gen_subreg (imode, cplx, cmode, 3220 imag_p ? GET_MODE_SIZE (imode) : 0); 3221 if (part) 3222 { 3223 emit_move_insn (part, val); 3224 return; 3225 } 3226 else 3227 /* simplify_gen_subreg may fail for sub-word MEMs. */ 3228 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); 3229 } 3230 3231 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val, 3232 false); 3233 } 3234 3235 /* Extract one of the components of the complex value CPLX. Extract the 3236 real part if IMAG_P is false, and the imaginary part if it's true. */ 3237 3238 rtx 3239 read_complex_part (rtx cplx, bool imag_p) 3240 { 3241 machine_mode cmode; 3242 scalar_mode imode; 3243 unsigned ibitsize; 3244 3245 if (GET_CODE (cplx) == CONCAT) 3246 return XEXP (cplx, imag_p); 3247 3248 cmode = GET_MODE (cplx); 3249 imode = GET_MODE_INNER (cmode); 3250 ibitsize = GET_MODE_BITSIZE (imode); 3251 3252 /* Special case reads from complex constants that got spilled to memory. */ 3253 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF) 3254 { 3255 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0)); 3256 if (decl && TREE_CODE (decl) == COMPLEX_CST) 3257 { 3258 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl); 3259 if (CONSTANT_CLASS_P (part)) 3260 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL); 3261 } 3262 } 3263 3264 /* For MEMs simplify_gen_subreg may generate an invalid new address 3265 because, e.g., the original address is considered mode-dependent 3266 by the target, which restricts simplify_subreg from invoking 3267 adjust_address_nv. Instead of preparing fallback support for an 3268 invalid address, we call adjust_address_nv directly. */ 3269 if (MEM_P (cplx)) 3270 return adjust_address_nv (cplx, imode, 3271 imag_p ? GET_MODE_SIZE (imode) : 0); 3272 3273 /* If the sub-object is at least word sized, then we know that subregging 3274 will work. This special case is important, since extract_bit_field 3275 wants to operate on integer modes, and there's rarely an OImode to 3276 correspond to TCmode. */ 3277 if (ibitsize >= BITS_PER_WORD 3278 /* For hard regs we have exact predicates. Assume we can split 3279 the original object if it spans an even number of hard regs. 3280 This special case is important for SCmode on 64-bit platforms 3281 where the natural size of floating-point regs is 32-bit. */ 3282 || (REG_P (cplx) 3283 && REGNO (cplx) < FIRST_PSEUDO_REGISTER 3284 && REG_NREGS (cplx) % 2 == 0)) 3285 { 3286 rtx ret = simplify_gen_subreg (imode, cplx, cmode, 3287 imag_p ? GET_MODE_SIZE (imode) : 0); 3288 if (ret) 3289 return ret; 3290 else 3291 /* simplify_gen_subreg may fail for sub-word MEMs. */ 3292 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD); 3293 } 3294 3295 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 3296 true, NULL_RTX, imode, imode, false, NULL); 3297 } 3298 3299 /* A subroutine of emit_move_insn_1. Yet another lowpart generator. 3300 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be 3301 represented in NEW_MODE. If FORCE is true, this will never happen, as 3302 we'll force-create a SUBREG if needed. */ 3303 3304 static rtx 3305 emit_move_change_mode (machine_mode new_mode, 3306 machine_mode old_mode, rtx x, bool force) 3307 { 3308 rtx ret; 3309 3310 if (push_operand (x, GET_MODE (x))) 3311 { 3312 ret = gen_rtx_MEM (new_mode, XEXP (x, 0)); 3313 MEM_COPY_ATTRIBUTES (ret, x); 3314 } 3315 else if (MEM_P (x)) 3316 { 3317 /* We don't have to worry about changing the address since the 3318 size in bytes is supposed to be the same. */ 3319 if (reload_in_progress) 3320 { 3321 /* Copy the MEM to change the mode and move any 3322 substitutions from the old MEM to the new one. */ 3323 ret = adjust_address_nv (x, new_mode, 0); 3324 copy_replacements (x, ret); 3325 } 3326 else 3327 ret = adjust_address (x, new_mode, 0); 3328 } 3329 else 3330 { 3331 /* Note that we do want simplify_subreg's behavior of validating 3332 that the new mode is ok for a hard register. If we were to use 3333 simplify_gen_subreg, we would create the subreg, but would 3334 probably run into the target not being able to implement it. */ 3335 /* Except, of course, when FORCE is true, when this is exactly what 3336 we want. Which is needed for CCmodes on some targets. */ 3337 if (force) 3338 ret = simplify_gen_subreg (new_mode, x, old_mode, 0); 3339 else 3340 ret = simplify_subreg (new_mode, x, old_mode, 0); 3341 } 3342 3343 return ret; 3344 } 3345 3346 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using 3347 an integer mode of the same size as MODE. Returns the instruction 3348 emitted, or NULL if such a move could not be generated. */ 3349 3350 static rtx_insn * 3351 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force) 3352 { 3353 scalar_int_mode imode; 3354 enum insn_code code; 3355 3356 /* There must exist a mode of the exact size we require. */ 3357 if (!int_mode_for_mode (mode).exists (&imode)) 3358 return NULL; 3359 3360 /* The target must support moves in this mode. */ 3361 code = optab_handler (mov_optab, imode); 3362 if (code == CODE_FOR_nothing) 3363 return NULL; 3364 3365 x = emit_move_change_mode (imode, mode, x, force); 3366 if (x == NULL_RTX) 3367 return NULL; 3368 y = emit_move_change_mode (imode, mode, y, force); 3369 if (y == NULL_RTX) 3370 return NULL; 3371 return emit_insn (GEN_FCN (code) (x, y)); 3372 } 3373 3374 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE. 3375 Return an equivalent MEM that does not use an auto-increment. */ 3376 3377 rtx 3378 emit_move_resolve_push (machine_mode mode, rtx x) 3379 { 3380 enum rtx_code code = GET_CODE (XEXP (x, 0)); 3381 rtx temp; 3382 3383 poly_int64 adjust = GET_MODE_SIZE (mode); 3384 #ifdef PUSH_ROUNDING 3385 adjust = PUSH_ROUNDING (adjust); 3386 #endif 3387 if (code == PRE_DEC || code == POST_DEC) 3388 adjust = -adjust; 3389 else if (code == PRE_MODIFY || code == POST_MODIFY) 3390 { 3391 rtx expr = XEXP (XEXP (x, 0), 1); 3392 3393 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS); 3394 poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1)); 3395 if (GET_CODE (expr) == MINUS) 3396 val = -val; 3397 gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val)); 3398 adjust = val; 3399 } 3400 3401 /* Do not use anti_adjust_stack, since we don't want to update 3402 stack_pointer_delta. */ 3403 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx, 3404 gen_int_mode (adjust, Pmode), stack_pointer_rtx, 3405 0, OPTAB_LIB_WIDEN); 3406 if (temp != stack_pointer_rtx) 3407 emit_move_insn (stack_pointer_rtx, temp); 3408 3409 switch (code) 3410 { 3411 case PRE_INC: 3412 case PRE_DEC: 3413 case PRE_MODIFY: 3414 temp = stack_pointer_rtx; 3415 break; 3416 case POST_INC: 3417 case POST_DEC: 3418 case POST_MODIFY: 3419 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust); 3420 break; 3421 default: 3422 gcc_unreachable (); 3423 } 3424 3425 return replace_equiv_address (x, temp); 3426 } 3427 3428 /* A subroutine of emit_move_complex. Generate a move from Y into X. 3429 X is known to satisfy push_operand, and MODE is known to be complex. 3430 Returns the last instruction emitted. */ 3431 3432 rtx_insn * 3433 emit_move_complex_push (machine_mode mode, rtx x, rtx y) 3434 { 3435 scalar_mode submode = GET_MODE_INNER (mode); 3436 bool imag_first; 3437 3438 #ifdef PUSH_ROUNDING 3439 poly_int64 submodesize = GET_MODE_SIZE (submode); 3440 3441 /* In case we output to the stack, but the size is smaller than the 3442 machine can push exactly, we need to use move instructions. */ 3443 if (maybe_ne (PUSH_ROUNDING (submodesize), submodesize)) 3444 { 3445 x = emit_move_resolve_push (mode, x); 3446 return emit_move_insn (x, y); 3447 } 3448 #endif 3449 3450 /* Note that the real part always precedes the imag part in memory 3451 regardless of machine's endianness. */ 3452 switch (GET_CODE (XEXP (x, 0))) 3453 { 3454 case PRE_DEC: 3455 case POST_DEC: 3456 imag_first = true; 3457 break; 3458 case PRE_INC: 3459 case POST_INC: 3460 imag_first = false; 3461 break; 3462 default: 3463 gcc_unreachable (); 3464 } 3465 3466 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), 3467 read_complex_part (y, imag_first)); 3468 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)), 3469 read_complex_part (y, !imag_first)); 3470 } 3471 3472 /* A subroutine of emit_move_complex. Perform the move from Y to X 3473 via two moves of the parts. Returns the last instruction emitted. */ 3474 3475 rtx_insn * 3476 emit_move_complex_parts (rtx x, rtx y) 3477 { 3478 /* Show the output dies here. This is necessary for SUBREGs 3479 of pseudos since we cannot track their lifetimes correctly; 3480 hard regs shouldn't appear here except as return values. */ 3481 if (!reload_completed && !reload_in_progress 3482 && REG_P (x) && !reg_overlap_mentioned_p (x, y)) 3483 emit_clobber (x); 3484 3485 write_complex_part (x, read_complex_part (y, false), false); 3486 write_complex_part (x, read_complex_part (y, true), true); 3487 3488 return get_last_insn (); 3489 } 3490 3491 /* A subroutine of emit_move_insn_1. Generate a move from Y into X. 3492 MODE is known to be complex. Returns the last instruction emitted. */ 3493 3494 static rtx_insn * 3495 emit_move_complex (machine_mode mode, rtx x, rtx y) 3496 { 3497 bool try_int; 3498 3499 /* Need to take special care for pushes, to maintain proper ordering 3500 of the data, and possibly extra padding. */ 3501 if (push_operand (x, mode)) 3502 return emit_move_complex_push (mode, x, y); 3503 3504 /* See if we can coerce the target into moving both values at once, except 3505 for floating point where we favor moving as parts if this is easy. */ 3506 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT 3507 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing 3508 && !(REG_P (x) 3509 && HARD_REGISTER_P (x) 3510 && REG_NREGS (x) == 1) 3511 && !(REG_P (y) 3512 && HARD_REGISTER_P (y) 3513 && REG_NREGS (y) == 1)) 3514 try_int = false; 3515 /* Not possible if the values are inherently not adjacent. */ 3516 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT) 3517 try_int = false; 3518 /* Is possible if both are registers (or subregs of registers). */ 3519 else if (register_operand (x, mode) && register_operand (y, mode)) 3520 try_int = true; 3521 /* If one of the operands is a memory, and alignment constraints 3522 are friendly enough, we may be able to do combined memory operations. 3523 We do not attempt this if Y is a constant because that combination is 3524 usually better with the by-parts thing below. */ 3525 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y)) 3526 && (!STRICT_ALIGNMENT 3527 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT)) 3528 try_int = true; 3529 else 3530 try_int = false; 3531 3532 if (try_int) 3533 { 3534 rtx_insn *ret; 3535 3536 /* For memory to memory moves, optimal behavior can be had with the 3537 existing block move logic. */ 3538 if (MEM_P (x) && MEM_P (y)) 3539 { 3540 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode), 3541 BLOCK_OP_NO_LIBCALL); 3542 return get_last_insn (); 3543 } 3544 3545 ret = emit_move_via_integer (mode, x, y, true); 3546 if (ret) 3547 return ret; 3548 } 3549 3550 return emit_move_complex_parts (x, y); 3551 } 3552 3553 /* A subroutine of emit_move_insn_1. Generate a move from Y into X. 3554 MODE is known to be MODE_CC. Returns the last instruction emitted. */ 3555 3556 static rtx_insn * 3557 emit_move_ccmode (machine_mode mode, rtx x, rtx y) 3558 { 3559 rtx_insn *ret; 3560 3561 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */ 3562 if (mode != CCmode) 3563 { 3564 enum insn_code code = optab_handler (mov_optab, CCmode); 3565 if (code != CODE_FOR_nothing) 3566 { 3567 x = emit_move_change_mode (CCmode, mode, x, true); 3568 y = emit_move_change_mode (CCmode, mode, y, true); 3569 return emit_insn (GEN_FCN (code) (x, y)); 3570 } 3571 } 3572 3573 /* Otherwise, find the MODE_INT mode of the same width. */ 3574 ret = emit_move_via_integer (mode, x, y, false); 3575 gcc_assert (ret != NULL); 3576 return ret; 3577 } 3578 3579 /* Return true if word I of OP lies entirely in the 3580 undefined bits of a paradoxical subreg. */ 3581 3582 static bool 3583 undefined_operand_subword_p (const_rtx op, int i) 3584 { 3585 if (GET_CODE (op) != SUBREG) 3586 return false; 3587 machine_mode innermostmode = GET_MODE (SUBREG_REG (op)); 3588 poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op); 3589 return (known_ge (offset, GET_MODE_SIZE (innermostmode)) 3590 || known_le (offset, -UNITS_PER_WORD)); 3591 } 3592 3593 /* A subroutine of emit_move_insn_1. Generate a move from Y into X. 3594 MODE is any multi-word or full-word mode that lacks a move_insn 3595 pattern. Note that you will get better code if you define such 3596 patterns, even if they must turn into multiple assembler instructions. */ 3597 3598 static rtx_insn * 3599 emit_move_multi_word (machine_mode mode, rtx x, rtx y) 3600 { 3601 rtx_insn *last_insn = 0; 3602 rtx_insn *seq; 3603 rtx inner; 3604 bool need_clobber; 3605 int i, mode_size; 3606 3607 /* This function can only handle cases where the number of words is 3608 known at compile time. */ 3609 mode_size = GET_MODE_SIZE (mode).to_constant (); 3610 gcc_assert (mode_size >= UNITS_PER_WORD); 3611 3612 /* If X is a push on the stack, do the push now and replace 3613 X with a reference to the stack pointer. */ 3614 if (push_operand (x, mode)) 3615 x = emit_move_resolve_push (mode, x); 3616 3617 /* If we are in reload, see if either operand is a MEM whose address 3618 is scheduled for replacement. */ 3619 if (reload_in_progress && MEM_P (x) 3620 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0)) 3621 x = replace_equiv_address_nv (x, inner); 3622 if (reload_in_progress && MEM_P (y) 3623 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0)) 3624 y = replace_equiv_address_nv (y, inner); 3625 3626 start_sequence (); 3627 3628 need_clobber = false; 3629 for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++) 3630 { 3631 rtx xpart = operand_subword (x, i, 1, mode); 3632 rtx ypart; 3633 3634 /* Do not generate code for a move if it would come entirely 3635 from the undefined bits of a paradoxical subreg. */ 3636 if (undefined_operand_subword_p (y, i)) 3637 continue; 3638 3639 ypart = operand_subword (y, i, 1, mode); 3640 3641 /* If we can't get a part of Y, put Y into memory if it is a 3642 constant. Otherwise, force it into a register. Then we must 3643 be able to get a part of Y. */ 3644 if (ypart == 0 && CONSTANT_P (y)) 3645 { 3646 y = use_anchored_address (force_const_mem (mode, y)); 3647 ypart = operand_subword (y, i, 1, mode); 3648 } 3649 else if (ypart == 0) 3650 ypart = operand_subword_force (y, i, mode); 3651 3652 gcc_assert (xpart && ypart); 3653 3654 need_clobber |= (GET_CODE (xpart) == SUBREG); 3655 3656 last_insn = emit_move_insn (xpart, ypart); 3657 } 3658 3659 seq = get_insns (); 3660 end_sequence (); 3661 3662 /* Show the output dies here. This is necessary for SUBREGs 3663 of pseudos since we cannot track their lifetimes correctly; 3664 hard regs shouldn't appear here except as return values. 3665 We never want to emit such a clobber after reload. */ 3666 if (x != y 3667 && ! (reload_in_progress || reload_completed) 3668 && need_clobber != 0) 3669 emit_clobber (x); 3670 3671 emit_insn (seq); 3672 3673 return last_insn; 3674 } 3675 3676 /* Low level part of emit_move_insn. 3677 Called just like emit_move_insn, but assumes X and Y 3678 are basically valid. */ 3679 3680 rtx_insn * 3681 emit_move_insn_1 (rtx x, rtx y) 3682 { 3683 machine_mode mode = GET_MODE (x); 3684 enum insn_code code; 3685 3686 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE); 3687 3688 code = optab_handler (mov_optab, mode); 3689 if (code != CODE_FOR_nothing) 3690 return emit_insn (GEN_FCN (code) (x, y)); 3691 3692 /* Expand complex moves by moving real part and imag part. */ 3693 if (COMPLEX_MODE_P (mode)) 3694 return emit_move_complex (mode, x, y); 3695 3696 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT 3697 || ALL_FIXED_POINT_MODE_P (mode)) 3698 { 3699 rtx_insn *result = emit_move_via_integer (mode, x, y, true); 3700 3701 /* If we can't find an integer mode, use multi words. */ 3702 if (result) 3703 return result; 3704 else 3705 return emit_move_multi_word (mode, x, y); 3706 } 3707 3708 if (GET_MODE_CLASS (mode) == MODE_CC) 3709 return emit_move_ccmode (mode, x, y); 3710 3711 /* Try using a move pattern for the corresponding integer mode. This is 3712 only safe when simplify_subreg can convert MODE constants into integer 3713 constants. At present, it can only do this reliably if the value 3714 fits within a HOST_WIDE_INT. */ 3715 if (!CONSTANT_P (y) 3716 || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT)) 3717 { 3718 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress); 3719 3720 if (ret) 3721 { 3722 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0) 3723 return ret; 3724 } 3725 } 3726 3727 return emit_move_multi_word (mode, x, y); 3728 } 3729 3730 /* Generate code to copy Y into X. 3731 Both Y and X must have the same mode, except that 3732 Y can be a constant with VOIDmode. 3733 This mode cannot be BLKmode; use emit_block_move for that. 3734 3735 Return the last instruction emitted. */ 3736 3737 rtx_insn * 3738 emit_move_insn (rtx x, rtx y) 3739 { 3740 machine_mode mode = GET_MODE (x); 3741 rtx y_cst = NULL_RTX; 3742 rtx_insn *last_insn; 3743 rtx set; 3744 3745 gcc_assert (mode != BLKmode 3746 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode)); 3747 3748 if (CONSTANT_P (y)) 3749 { 3750 if (optimize 3751 && SCALAR_FLOAT_MODE_P (GET_MODE (x)) 3752 && (last_insn = compress_float_constant (x, y))) 3753 return last_insn; 3754 3755 y_cst = y; 3756 3757 if (!targetm.legitimate_constant_p (mode, y)) 3758 { 3759 y = force_const_mem (mode, y); 3760 3761 /* If the target's cannot_force_const_mem prevented the spill, 3762 assume that the target's move expanders will also take care 3763 of the non-legitimate constant. */ 3764 if (!y) 3765 y = y_cst; 3766 else 3767 y = use_anchored_address (y); 3768 } 3769 } 3770 3771 /* If X or Y are memory references, verify that their addresses are valid 3772 for the machine. */ 3773 if (MEM_P (x) 3774 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0), 3775 MEM_ADDR_SPACE (x)) 3776 && ! push_operand (x, GET_MODE (x)))) 3777 x = validize_mem (x); 3778 3779 if (MEM_P (y) 3780 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0), 3781 MEM_ADDR_SPACE (y))) 3782 y = validize_mem (y); 3783 3784 gcc_assert (mode != BLKmode); 3785 3786 last_insn = emit_move_insn_1 (x, y); 3787 3788 if (y_cst && REG_P (x) 3789 && (set = single_set (last_insn)) != NULL_RTX 3790 && SET_DEST (set) == x 3791 && ! rtx_equal_p (y_cst, SET_SRC (set))) 3792 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst)); 3793 3794 return last_insn; 3795 } 3796 3797 /* Generate the body of an instruction to copy Y into X. 3798 It may be a list of insns, if one insn isn't enough. */ 3799 3800 rtx_insn * 3801 gen_move_insn (rtx x, rtx y) 3802 { 3803 rtx_insn *seq; 3804 3805 start_sequence (); 3806 emit_move_insn_1 (x, y); 3807 seq = get_insns (); 3808 end_sequence (); 3809 return seq; 3810 } 3811 3812 /* If Y is representable exactly in a narrower mode, and the target can 3813 perform the extension directly from constant or memory, then emit the 3814 move as an extension. */ 3815 3816 static rtx_insn * 3817 compress_float_constant (rtx x, rtx y) 3818 { 3819 machine_mode dstmode = GET_MODE (x); 3820 machine_mode orig_srcmode = GET_MODE (y); 3821 machine_mode srcmode; 3822 const REAL_VALUE_TYPE *r; 3823 int oldcost, newcost; 3824 bool speed = optimize_insn_for_speed_p (); 3825 3826 r = CONST_DOUBLE_REAL_VALUE (y); 3827 3828 if (targetm.legitimate_constant_p (dstmode, y)) 3829 oldcost = set_src_cost (y, orig_srcmode, speed); 3830 else 3831 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed); 3832 3833 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode) 3834 { 3835 enum insn_code ic; 3836 rtx trunc_y; 3837 rtx_insn *last_insn; 3838 3839 /* Skip if the target can't extend this way. */ 3840 ic = can_extend_p (dstmode, srcmode, 0); 3841 if (ic == CODE_FOR_nothing) 3842 continue; 3843 3844 /* Skip if the narrowed value isn't exact. */ 3845 if (! exact_real_truncate (srcmode, r)) 3846 continue; 3847 3848 trunc_y = const_double_from_real_value (*r, srcmode); 3849 3850 if (targetm.legitimate_constant_p (srcmode, trunc_y)) 3851 { 3852 /* Skip if the target needs extra instructions to perform 3853 the extension. */ 3854 if (!insn_operand_matches (ic, 1, trunc_y)) 3855 continue; 3856 /* This is valid, but may not be cheaper than the original. */ 3857 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), 3858 dstmode, speed); 3859 if (oldcost < newcost) 3860 continue; 3861 } 3862 else if (float_extend_from_mem[dstmode][srcmode]) 3863 { 3864 trunc_y = force_const_mem (srcmode, trunc_y); 3865 /* This is valid, but may not be cheaper than the original. */ 3866 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y), 3867 dstmode, speed); 3868 if (oldcost < newcost) 3869 continue; 3870 trunc_y = validize_mem (trunc_y); 3871 } 3872 else 3873 continue; 3874 3875 /* For CSE's benefit, force the compressed constant pool entry 3876 into a new pseudo. This constant may be used in different modes, 3877 and if not, combine will put things back together for us. */ 3878 trunc_y = force_reg (srcmode, trunc_y); 3879 3880 /* If x is a hard register, perform the extension into a pseudo, 3881 so that e.g. stack realignment code is aware of it. */ 3882 rtx target = x; 3883 if (REG_P (x) && HARD_REGISTER_P (x)) 3884 target = gen_reg_rtx (dstmode); 3885 3886 emit_unop_insn (ic, target, trunc_y, UNKNOWN); 3887 last_insn = get_last_insn (); 3888 3889 if (REG_P (target)) 3890 set_unique_reg_note (last_insn, REG_EQUAL, y); 3891 3892 if (target != x) 3893 return emit_move_insn (x, target); 3894 return last_insn; 3895 } 3896 3897 return NULL; 3898 } 3899 3900 /* Pushing data onto the stack. */ 3901 3902 /* Push a block of length SIZE (perhaps variable) 3903 and return an rtx to address the beginning of the block. 3904 The value may be virtual_outgoing_args_rtx. 3905 3906 EXTRA is the number of bytes of padding to push in addition to SIZE. 3907 BELOW nonzero means this padding comes at low addresses; 3908 otherwise, the padding comes at high addresses. */ 3909 3910 rtx 3911 push_block (rtx size, poly_int64 extra, int below) 3912 { 3913 rtx temp; 3914 3915 size = convert_modes (Pmode, ptr_mode, size, 1); 3916 if (CONSTANT_P (size)) 3917 anti_adjust_stack (plus_constant (Pmode, size, extra)); 3918 else if (REG_P (size) && known_eq (extra, 0)) 3919 anti_adjust_stack (size); 3920 else 3921 { 3922 temp = copy_to_mode_reg (Pmode, size); 3923 if (maybe_ne (extra, 0)) 3924 temp = expand_binop (Pmode, add_optab, temp, 3925 gen_int_mode (extra, Pmode), 3926 temp, 0, OPTAB_LIB_WIDEN); 3927 anti_adjust_stack (temp); 3928 } 3929 3930 if (STACK_GROWS_DOWNWARD) 3931 { 3932 temp = virtual_outgoing_args_rtx; 3933 if (maybe_ne (extra, 0) && below) 3934 temp = plus_constant (Pmode, temp, extra); 3935 } 3936 else 3937 { 3938 poly_int64 csize; 3939 if (poly_int_rtx_p (size, &csize)) 3940 temp = plus_constant (Pmode, virtual_outgoing_args_rtx, 3941 -csize - (below ? 0 : extra)); 3942 else if (maybe_ne (extra, 0) && !below) 3943 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, 3944 negate_rtx (Pmode, plus_constant (Pmode, size, 3945 extra))); 3946 else 3947 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx, 3948 negate_rtx (Pmode, size)); 3949 } 3950 3951 return memory_address (NARROWEST_INT_MODE, temp); 3952 } 3953 3954 /* A utility routine that returns the base of an auto-inc memory, or NULL. */ 3955 3956 static rtx 3957 mem_autoinc_base (rtx mem) 3958 { 3959 if (MEM_P (mem)) 3960 { 3961 rtx addr = XEXP (mem, 0); 3962 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC) 3963 return XEXP (addr, 0); 3964 } 3965 return NULL; 3966 } 3967 3968 /* A utility routine used here, in reload, and in try_split. The insns 3969 after PREV up to and including LAST are known to adjust the stack, 3970 with a final value of END_ARGS_SIZE. Iterate backward from LAST 3971 placing notes as appropriate. PREV may be NULL, indicating the 3972 entire insn sequence prior to LAST should be scanned. 3973 3974 The set of allowed stack pointer modifications is small: 3975 (1) One or more auto-inc style memory references (aka pushes), 3976 (2) One or more addition/subtraction with the SP as destination, 3977 (3) A single move insn with the SP as destination, 3978 (4) A call_pop insn, 3979 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS. 3980 3981 Insns in the sequence that do not modify the SP are ignored, 3982 except for noreturn calls. 3983 3984 The return value is the amount of adjustment that can be trivially 3985 verified, via immediate operand or auto-inc. If the adjustment 3986 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */ 3987 3988 poly_int64 3989 find_args_size_adjust (rtx_insn *insn) 3990 { 3991 rtx dest, set, pat; 3992 int i; 3993 3994 pat = PATTERN (insn); 3995 set = NULL; 3996 3997 /* Look for a call_pop pattern. */ 3998 if (CALL_P (insn)) 3999 { 4000 /* We have to allow non-call_pop patterns for the case 4001 of emit_single_push_insn of a TLS address. */ 4002 if (GET_CODE (pat) != PARALLEL) 4003 return 0; 4004 4005 /* All call_pop have a stack pointer adjust in the parallel. 4006 The call itself is always first, and the stack adjust is 4007 usually last, so search from the end. */ 4008 for (i = XVECLEN (pat, 0) - 1; i > 0; --i) 4009 { 4010 set = XVECEXP (pat, 0, i); 4011 if (GET_CODE (set) != SET) 4012 continue; 4013 dest = SET_DEST (set); 4014 if (dest == stack_pointer_rtx) 4015 break; 4016 } 4017 /* We'd better have found the stack pointer adjust. */ 4018 if (i == 0) 4019 return 0; 4020 /* Fall through to process the extracted SET and DEST 4021 as if it was a standalone insn. */ 4022 } 4023 else if (GET_CODE (pat) == SET) 4024 set = pat; 4025 else if ((set = single_set (insn)) != NULL) 4026 ; 4027 else if (GET_CODE (pat) == PARALLEL) 4028 { 4029 /* ??? Some older ports use a parallel with a stack adjust 4030 and a store for a PUSH_ROUNDING pattern, rather than a 4031 PRE/POST_MODIFY rtx. Don't force them to update yet... */ 4032 /* ??? See h8300 and m68k, pushqi1. */ 4033 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i) 4034 { 4035 set = XVECEXP (pat, 0, i); 4036 if (GET_CODE (set) != SET) 4037 continue; 4038 dest = SET_DEST (set); 4039 if (dest == stack_pointer_rtx) 4040 break; 4041 4042 /* We do not expect an auto-inc of the sp in the parallel. */ 4043 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx); 4044 gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) 4045 != stack_pointer_rtx); 4046 } 4047 if (i < 0) 4048 return 0; 4049 } 4050 else 4051 return 0; 4052 4053 dest = SET_DEST (set); 4054 4055 /* Look for direct modifications of the stack pointer. */ 4056 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM) 4057 { 4058 /* Look for a trivial adjustment, otherwise assume nothing. */ 4059 /* Note that the SPU restore_stack_block pattern refers to 4060 the stack pointer in V4SImode. Consider that non-trivial. */ 4061 poly_int64 offset; 4062 if (SCALAR_INT_MODE_P (GET_MODE (dest)) 4063 && strip_offset (SET_SRC (set), &offset) == stack_pointer_rtx) 4064 return offset; 4065 /* ??? Reload can generate no-op moves, which will be cleaned 4066 up later. Recognize it and continue searching. */ 4067 else if (rtx_equal_p (dest, SET_SRC (set))) 4068 return 0; 4069 else 4070 return HOST_WIDE_INT_MIN; 4071 } 4072 else 4073 { 4074 rtx mem, addr; 4075 4076 /* Otherwise only think about autoinc patterns. */ 4077 if (mem_autoinc_base (dest) == stack_pointer_rtx) 4078 { 4079 mem = dest; 4080 gcc_checking_assert (mem_autoinc_base (SET_SRC (set)) 4081 != stack_pointer_rtx); 4082 } 4083 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx) 4084 mem = SET_SRC (set); 4085 else 4086 return 0; 4087 4088 addr = XEXP (mem, 0); 4089 switch (GET_CODE (addr)) 4090 { 4091 case PRE_INC: 4092 case POST_INC: 4093 return GET_MODE_SIZE (GET_MODE (mem)); 4094 case PRE_DEC: 4095 case POST_DEC: 4096 return -GET_MODE_SIZE (GET_MODE (mem)); 4097 case PRE_MODIFY: 4098 case POST_MODIFY: 4099 addr = XEXP (addr, 1); 4100 gcc_assert (GET_CODE (addr) == PLUS); 4101 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx); 4102 return rtx_to_poly_int64 (XEXP (addr, 1)); 4103 default: 4104 gcc_unreachable (); 4105 } 4106 } 4107 } 4108 4109 poly_int64 4110 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last, 4111 poly_int64 end_args_size) 4112 { 4113 poly_int64 args_size = end_args_size; 4114 bool saw_unknown = false; 4115 rtx_insn *insn; 4116 4117 for (insn = last; insn != prev; insn = PREV_INSN (insn)) 4118 { 4119 if (!NONDEBUG_INSN_P (insn)) 4120 continue; 4121 4122 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing 4123 a call argument containing a TLS address that itself requires 4124 a call to __tls_get_addr. The handling of stack_pointer_delta 4125 in emit_single_push_insn is supposed to ensure that any such 4126 notes are already correct. */ 4127 rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX); 4128 gcc_assert (!note || known_eq (args_size, get_args_size (note))); 4129 4130 poly_int64 this_delta = find_args_size_adjust (insn); 4131 if (known_eq (this_delta, 0)) 4132 { 4133 if (!CALL_P (insn) 4134 || ACCUMULATE_OUTGOING_ARGS 4135 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX) 4136 continue; 4137 } 4138 4139 gcc_assert (!saw_unknown); 4140 if (known_eq (this_delta, HOST_WIDE_INT_MIN)) 4141 saw_unknown = true; 4142 4143 if (!note) 4144 add_args_size_note (insn, args_size); 4145 if (STACK_GROWS_DOWNWARD) 4146 this_delta = -poly_uint64 (this_delta); 4147 4148 if (saw_unknown) 4149 args_size = HOST_WIDE_INT_MIN; 4150 else 4151 args_size -= this_delta; 4152 } 4153 4154 return args_size; 4155 } 4156 4157 #ifdef PUSH_ROUNDING 4158 /* Emit single push insn. */ 4159 4160 static void 4161 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type) 4162 { 4163 rtx dest_addr; 4164 poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode)); 4165 rtx dest; 4166 enum insn_code icode; 4167 4168 /* If there is push pattern, use it. Otherwise try old way of throwing 4169 MEM representing push operation to move expander. */ 4170 icode = optab_handler (push_optab, mode); 4171 if (icode != CODE_FOR_nothing) 4172 { 4173 struct expand_operand ops[1]; 4174 4175 create_input_operand (&ops[0], x, mode); 4176 if (maybe_expand_insn (icode, 1, ops)) 4177 return; 4178 } 4179 if (known_eq (GET_MODE_SIZE (mode), rounded_size)) 4180 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx); 4181 /* If we are to pad downward, adjust the stack pointer first and 4182 then store X into the stack location using an offset. This is 4183 because emit_move_insn does not know how to pad; it does not have 4184 access to type. */ 4185 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD) 4186 { 4187 emit_move_insn (stack_pointer_rtx, 4188 expand_binop (Pmode, 4189 STACK_GROWS_DOWNWARD ? sub_optab 4190 : add_optab, 4191 stack_pointer_rtx, 4192 gen_int_mode (rounded_size, Pmode), 4193 NULL_RTX, 0, OPTAB_LIB_WIDEN)); 4194 4195 poly_int64 offset = rounded_size - GET_MODE_SIZE (mode); 4196 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC) 4197 /* We have already decremented the stack pointer, so get the 4198 previous value. */ 4199 offset += rounded_size; 4200 4201 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC) 4202 /* We have already incremented the stack pointer, so get the 4203 previous value. */ 4204 offset -= rounded_size; 4205 4206 dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset); 4207 } 4208 else 4209 { 4210 if (STACK_GROWS_DOWNWARD) 4211 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */ 4212 dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size); 4213 else 4214 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */ 4215 dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size); 4216 4217 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr); 4218 } 4219 4220 dest = gen_rtx_MEM (mode, dest_addr); 4221 4222 if (type != 0) 4223 { 4224 set_mem_attributes (dest, type, 1); 4225 4226 if (cfun->tail_call_marked) 4227 /* Function incoming arguments may overlap with sibling call 4228 outgoing arguments and we cannot allow reordering of reads 4229 from function arguments with stores to outgoing arguments 4230 of sibling calls. */ 4231 set_mem_alias_set (dest, 0); 4232 } 4233 emit_move_insn (dest, x); 4234 } 4235 4236 /* Emit and annotate a single push insn. */ 4237 4238 static void 4239 emit_single_push_insn (machine_mode mode, rtx x, tree type) 4240 { 4241 poly_int64 delta, old_delta = stack_pointer_delta; 4242 rtx_insn *prev = get_last_insn (); 4243 rtx_insn *last; 4244 4245 emit_single_push_insn_1 (mode, x, type); 4246 4247 /* Adjust stack_pointer_delta to describe the situation after the push 4248 we just performed. Note that we must do this after the push rather 4249 than before the push in case calculating X needs pushes and pops of 4250 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes 4251 for such pushes and pops must not include the effect of the future 4252 push of X. */ 4253 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode)); 4254 4255 last = get_last_insn (); 4256 4257 /* Notice the common case where we emitted exactly one insn. */ 4258 if (PREV_INSN (last) == prev) 4259 { 4260 add_args_size_note (last, stack_pointer_delta); 4261 return; 4262 } 4263 4264 delta = fixup_args_size_notes (prev, last, stack_pointer_delta); 4265 gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN) 4266 || known_eq (delta, old_delta)); 4267 } 4268 #endif 4269 4270 /* If reading SIZE bytes from X will end up reading from 4271 Y return the number of bytes that overlap. Return -1 4272 if there is no overlap or -2 if we can't determine 4273 (for example when X and Y have different base registers). */ 4274 4275 static int 4276 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size) 4277 { 4278 rtx tmp = plus_constant (Pmode, x, size); 4279 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y); 4280 4281 if (!CONST_INT_P (sub)) 4282 return -2; 4283 4284 HOST_WIDE_INT val = INTVAL (sub); 4285 4286 return IN_RANGE (val, 1, size) ? val : -1; 4287 } 4288 4289 /* Generate code to push X onto the stack, assuming it has mode MODE and 4290 type TYPE. 4291 MODE is redundant except when X is a CONST_INT (since they don't 4292 carry mode info). 4293 SIZE is an rtx for the size of data to be copied (in bytes), 4294 needed only if X is BLKmode. 4295 Return true if successful. May return false if asked to push a 4296 partial argument during a sibcall optimization (as specified by 4297 SIBCALL_P) and the incoming and outgoing pointers cannot be shown 4298 to not overlap. 4299 4300 ALIGN (in bits) is maximum alignment we can assume. 4301 4302 If PARTIAL and REG are both nonzero, then copy that many of the first 4303 bytes of X into registers starting with REG, and push the rest of X. 4304 The amount of space pushed is decreased by PARTIAL bytes. 4305 REG must be a hard register in this case. 4306 If REG is zero but PARTIAL is not, take any all others actions for an 4307 argument partially in registers, but do not actually load any 4308 registers. 4309 4310 EXTRA is the amount in bytes of extra space to leave next to this arg. 4311 This is ignored if an argument block has already been allocated. 4312 4313 On a machine that lacks real push insns, ARGS_ADDR is the address of 4314 the bottom of the argument block for this call. We use indexing off there 4315 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a 4316 argument block has not been preallocated. 4317 4318 ARGS_SO_FAR is the size of args previously pushed for this call. 4319 4320 REG_PARM_STACK_SPACE is nonzero if functions require stack space 4321 for arguments passed in registers. If nonzero, it will be the number 4322 of bytes required. */ 4323 4324 bool 4325 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size, 4326 unsigned int align, int partial, rtx reg, poly_int64 extra, 4327 rtx args_addr, rtx args_so_far, int reg_parm_stack_space, 4328 rtx alignment_pad, bool sibcall_p) 4329 { 4330 rtx xinner; 4331 pad_direction stack_direction 4332 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD; 4333 4334 /* Decide where to pad the argument: PAD_DOWNWARD for below, 4335 PAD_UPWARD for above, or PAD_NONE for don't pad it. 4336 Default is below for small data on big-endian machines; else above. */ 4337 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type); 4338 4339 /* Invert direction if stack is post-decrement. 4340 FIXME: why? */ 4341 if (STACK_PUSH_CODE == POST_DEC) 4342 if (where_pad != PAD_NONE) 4343 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD); 4344 4345 xinner = x; 4346 4347 int nregs = partial / UNITS_PER_WORD; 4348 rtx *tmp_regs = NULL; 4349 int overlapping = 0; 4350 4351 if (mode == BLKmode 4352 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode) 4353 && type != NULL_TREE)) 4354 { 4355 /* Copy a block into the stack, entirely or partially. */ 4356 4357 rtx temp; 4358 int used; 4359 int offset; 4360 int skip; 4361 4362 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); 4363 used = partial - offset; 4364 4365 if (mode != BLKmode) 4366 { 4367 /* A value is to be stored in an insufficiently aligned 4368 stack slot; copy via a suitably aligned slot if 4369 necessary. */ 4370 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode); 4371 if (!MEM_P (xinner)) 4372 { 4373 temp = assign_temp (type, 1, 1); 4374 emit_move_insn (temp, xinner); 4375 xinner = temp; 4376 } 4377 } 4378 4379 gcc_assert (size); 4380 4381 /* USED is now the # of bytes we need not copy to the stack 4382 because registers will take care of them. */ 4383 4384 if (partial != 0) 4385 xinner = adjust_address (xinner, BLKmode, used); 4386 4387 /* If the partial register-part of the arg counts in its stack size, 4388 skip the part of stack space corresponding to the registers. 4389 Otherwise, start copying to the beginning of the stack space, 4390 by setting SKIP to 0. */ 4391 skip = (reg_parm_stack_space == 0) ? 0 : used; 4392 4393 #ifdef PUSH_ROUNDING 4394 /* Do it with several push insns if that doesn't take lots of insns 4395 and if there is no difficulty with push insns that skip bytes 4396 on the stack for alignment purposes. */ 4397 if (args_addr == 0 4398 && PUSH_ARGS 4399 && CONST_INT_P (size) 4400 && skip == 0 4401 && MEM_ALIGN (xinner) >= align 4402 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align) 4403 /* Here we avoid the case of a structure whose weak alignment 4404 forces many pushes of a small amount of data, 4405 and such small pushes do rounding that causes trouble. */ 4406 && ((!targetm.slow_unaligned_access (word_mode, align)) 4407 || align >= BIGGEST_ALIGNMENT 4408 || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT), 4409 align / BITS_PER_UNIT)) 4410 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size))) 4411 { 4412 /* Push padding now if padding above and stack grows down, 4413 or if padding below and stack grows up. 4414 But if space already allocated, this has already been done. */ 4415 if (maybe_ne (extra, 0) 4416 && args_addr == 0 4417 && where_pad != PAD_NONE 4418 && where_pad != stack_direction) 4419 anti_adjust_stack (gen_int_mode (extra, Pmode)); 4420 4421 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 4422 RETURN_BEGIN); 4423 } 4424 else 4425 #endif /* PUSH_ROUNDING */ 4426 { 4427 rtx target; 4428 4429 /* Otherwise make space on the stack and copy the data 4430 to the address of that space. */ 4431 4432 /* Deduct words put into registers from the size we must copy. */ 4433 if (partial != 0) 4434 { 4435 if (CONST_INT_P (size)) 4436 size = GEN_INT (INTVAL (size) - used); 4437 else 4438 size = expand_binop (GET_MODE (size), sub_optab, size, 4439 gen_int_mode (used, GET_MODE (size)), 4440 NULL_RTX, 0, OPTAB_LIB_WIDEN); 4441 } 4442 4443 /* Get the address of the stack space. 4444 In this case, we do not deal with EXTRA separately. 4445 A single stack adjust will do. */ 4446 poly_int64 offset; 4447 if (! args_addr) 4448 { 4449 temp = push_block (size, extra, where_pad == PAD_DOWNWARD); 4450 extra = 0; 4451 } 4452 else if (poly_int_rtx_p (args_so_far, &offset)) 4453 temp = memory_address (BLKmode, 4454 plus_constant (Pmode, args_addr, 4455 skip + offset)); 4456 else 4457 temp = memory_address (BLKmode, 4458 plus_constant (Pmode, 4459 gen_rtx_PLUS (Pmode, 4460 args_addr, 4461 args_so_far), 4462 skip)); 4463 4464 if (!ACCUMULATE_OUTGOING_ARGS) 4465 { 4466 /* If the source is referenced relative to the stack pointer, 4467 copy it to another register to stabilize it. We do not need 4468 to do this if we know that we won't be changing sp. */ 4469 4470 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp) 4471 || reg_mentioned_p (virtual_outgoing_args_rtx, temp)) 4472 temp = copy_to_reg (temp); 4473 } 4474 4475 target = gen_rtx_MEM (BLKmode, temp); 4476 4477 /* We do *not* set_mem_attributes here, because incoming arguments 4478 may overlap with sibling call outgoing arguments and we cannot 4479 allow reordering of reads from function arguments with stores 4480 to outgoing arguments of sibling calls. We do, however, want 4481 to record the alignment of the stack slot. */ 4482 /* ALIGN may well be better aligned than TYPE, e.g. due to 4483 PARM_BOUNDARY. Assume the caller isn't lying. */ 4484 set_mem_align (target, align); 4485 4486 /* If part should go in registers and pushing to that part would 4487 overwrite some of the values that need to go into regs, load the 4488 overlapping values into temporary pseudos to be moved into the hard 4489 regs at the end after the stack pushing has completed. 4490 We cannot load them directly into the hard regs here because 4491 they can be clobbered by the block move expansions. 4492 See PR 65358. */ 4493 4494 if (partial > 0 && reg != 0 && mode == BLKmode 4495 && GET_CODE (reg) != PARALLEL) 4496 { 4497 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial); 4498 if (overlapping > 0) 4499 { 4500 gcc_assert (overlapping % UNITS_PER_WORD == 0); 4501 overlapping /= UNITS_PER_WORD; 4502 4503 tmp_regs = XALLOCAVEC (rtx, overlapping); 4504 4505 for (int i = 0; i < overlapping; i++) 4506 tmp_regs[i] = gen_reg_rtx (word_mode); 4507 4508 for (int i = 0; i < overlapping; i++) 4509 emit_move_insn (tmp_regs[i], 4510 operand_subword_force (target, i, mode)); 4511 } 4512 else if (overlapping == -1) 4513 overlapping = 0; 4514 /* Could not determine whether there is overlap. 4515 Fail the sibcall. */ 4516 else 4517 { 4518 overlapping = 0; 4519 if (sibcall_p) 4520 return false; 4521 } 4522 } 4523 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM); 4524 } 4525 } 4526 else if (partial > 0) 4527 { 4528 /* Scalar partly in registers. This case is only supported 4529 for fixed-wdth modes. */ 4530 int size = GET_MODE_SIZE (mode).to_constant (); 4531 size /= UNITS_PER_WORD; 4532 int i; 4533 int not_stack; 4534 /* # bytes of start of argument 4535 that we must make space for but need not store. */ 4536 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT); 4537 int args_offset = INTVAL (args_so_far); 4538 int skip; 4539 4540 /* Push padding now if padding above and stack grows down, 4541 or if padding below and stack grows up. 4542 But if space already allocated, this has already been done. */ 4543 if (maybe_ne (extra, 0) 4544 && args_addr == 0 4545 && where_pad != PAD_NONE 4546 && where_pad != stack_direction) 4547 anti_adjust_stack (gen_int_mode (extra, Pmode)); 4548 4549 /* If we make space by pushing it, we might as well push 4550 the real data. Otherwise, we can leave OFFSET nonzero 4551 and leave the space uninitialized. */ 4552 if (args_addr == 0) 4553 offset = 0; 4554 4555 /* Now NOT_STACK gets the number of words that we don't need to 4556 allocate on the stack. Convert OFFSET to words too. */ 4557 not_stack = (partial - offset) / UNITS_PER_WORD; 4558 offset /= UNITS_PER_WORD; 4559 4560 /* If the partial register-part of the arg counts in its stack size, 4561 skip the part of stack space corresponding to the registers. 4562 Otherwise, start copying to the beginning of the stack space, 4563 by setting SKIP to 0. */ 4564 skip = (reg_parm_stack_space == 0) ? 0 : not_stack; 4565 4566 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x)) 4567 x = validize_mem (force_const_mem (mode, x)); 4568 4569 /* If X is a hard register in a non-integer mode, copy it into a pseudo; 4570 SUBREGs of such registers are not allowed. */ 4571 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER 4572 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT)) 4573 x = copy_to_reg (x); 4574 4575 /* Loop over all the words allocated on the stack for this arg. */ 4576 /* We can do it by words, because any scalar bigger than a word 4577 has a size a multiple of a word. */ 4578 for (i = size - 1; i >= not_stack; i--) 4579 if (i >= not_stack + offset) 4580 if (!emit_push_insn (operand_subword_force (x, i, mode), 4581 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX, 4582 0, args_addr, 4583 GEN_INT (args_offset + ((i - not_stack + skip) 4584 * UNITS_PER_WORD)), 4585 reg_parm_stack_space, alignment_pad, sibcall_p)) 4586 return false; 4587 } 4588 else 4589 { 4590 rtx addr; 4591 rtx dest; 4592 4593 /* Push padding now if padding above and stack grows down, 4594 or if padding below and stack grows up. 4595 But if space already allocated, this has already been done. */ 4596 if (maybe_ne (extra, 0) 4597 && args_addr == 0 4598 && where_pad != PAD_NONE 4599 && where_pad != stack_direction) 4600 anti_adjust_stack (gen_int_mode (extra, Pmode)); 4601 4602 #ifdef PUSH_ROUNDING 4603 if (args_addr == 0 && PUSH_ARGS) 4604 emit_single_push_insn (mode, x, type); 4605 else 4606 #endif 4607 { 4608 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far); 4609 dest = gen_rtx_MEM (mode, memory_address (mode, addr)); 4610 4611 /* We do *not* set_mem_attributes here, because incoming arguments 4612 may overlap with sibling call outgoing arguments and we cannot 4613 allow reordering of reads from function arguments with stores 4614 to outgoing arguments of sibling calls. We do, however, want 4615 to record the alignment of the stack slot. */ 4616 /* ALIGN may well be better aligned than TYPE, e.g. due to 4617 PARM_BOUNDARY. Assume the caller isn't lying. */ 4618 set_mem_align (dest, align); 4619 4620 emit_move_insn (dest, x); 4621 } 4622 } 4623 4624 /* Move the partial arguments into the registers and any overlapping 4625 values that we moved into the pseudos in tmp_regs. */ 4626 if (partial > 0 && reg != 0) 4627 { 4628 /* Handle calls that pass values in multiple non-contiguous locations. 4629 The Irix 6 ABI has examples of this. */ 4630 if (GET_CODE (reg) == PARALLEL) 4631 emit_group_load (reg, x, type, -1); 4632 else 4633 { 4634 gcc_assert (partial % UNITS_PER_WORD == 0); 4635 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode); 4636 4637 for (int i = 0; i < overlapping; i++) 4638 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg) 4639 + nregs - overlapping + i), 4640 tmp_regs[i]); 4641 4642 } 4643 } 4644 4645 if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction) 4646 anti_adjust_stack (gen_int_mode (extra, Pmode)); 4647 4648 if (alignment_pad && args_addr == 0) 4649 anti_adjust_stack (alignment_pad); 4650 4651 return true; 4652 } 4653 4654 /* Return X if X can be used as a subtarget in a sequence of arithmetic 4655 operations. */ 4656 4657 static rtx 4658 get_subtarget (rtx x) 4659 { 4660 return (optimize 4661 || x == 0 4662 /* Only registers can be subtargets. */ 4663 || !REG_P (x) 4664 /* Don't use hard regs to avoid extending their life. */ 4665 || REGNO (x) < FIRST_PSEUDO_REGISTER 4666 ? 0 : x); 4667 } 4668 4669 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where 4670 FIELD is a bitfield. Returns true if the optimization was successful, 4671 and there's nothing else to do. */ 4672 4673 static bool 4674 optimize_bitfield_assignment_op (poly_uint64 pbitsize, 4675 poly_uint64 pbitpos, 4676 poly_uint64 pbitregion_start, 4677 poly_uint64 pbitregion_end, 4678 machine_mode mode1, rtx str_rtx, 4679 tree to, tree src, bool reverse) 4680 { 4681 /* str_mode is not guaranteed to be a scalar type. */ 4682 machine_mode str_mode = GET_MODE (str_rtx); 4683 unsigned int str_bitsize; 4684 tree op0, op1; 4685 rtx value, result; 4686 optab binop; 4687 gimple *srcstmt; 4688 enum tree_code code; 4689 4690 unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end; 4691 if (mode1 != VOIDmode 4692 || !pbitsize.is_constant (&bitsize) 4693 || !pbitpos.is_constant (&bitpos) 4694 || !pbitregion_start.is_constant (&bitregion_start) 4695 || !pbitregion_end.is_constant (&bitregion_end) 4696 || bitsize >= BITS_PER_WORD 4697 || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize) 4698 || str_bitsize > BITS_PER_WORD 4699 || TREE_SIDE_EFFECTS (to) 4700 || TREE_THIS_VOLATILE (to)) 4701 return false; 4702 4703 STRIP_NOPS (src); 4704 if (TREE_CODE (src) != SSA_NAME) 4705 return false; 4706 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE) 4707 return false; 4708 4709 srcstmt = get_gimple_for_ssa_name (src); 4710 if (!srcstmt 4711 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary) 4712 return false; 4713 4714 code = gimple_assign_rhs_code (srcstmt); 4715 4716 op0 = gimple_assign_rhs1 (srcstmt); 4717 4718 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain 4719 to find its initialization. Hopefully the initialization will 4720 be from a bitfield load. */ 4721 if (TREE_CODE (op0) == SSA_NAME) 4722 { 4723 gimple *op0stmt = get_gimple_for_ssa_name (op0); 4724 4725 /* We want to eventually have OP0 be the same as TO, which 4726 should be a bitfield. */ 4727 if (!op0stmt 4728 || !is_gimple_assign (op0stmt) 4729 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to)) 4730 return false; 4731 op0 = gimple_assign_rhs1 (op0stmt); 4732 } 4733 4734 op1 = gimple_assign_rhs2 (srcstmt); 4735 4736 if (!operand_equal_p (to, op0, 0)) 4737 return false; 4738 4739 if (MEM_P (str_rtx)) 4740 { 4741 unsigned HOST_WIDE_INT offset1; 4742 4743 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD) 4744 str_bitsize = BITS_PER_WORD; 4745 4746 scalar_int_mode best_mode; 4747 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end, 4748 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode)) 4749 return false; 4750 str_mode = best_mode; 4751 str_bitsize = GET_MODE_BITSIZE (best_mode); 4752 4753 offset1 = bitpos; 4754 bitpos %= str_bitsize; 4755 offset1 = (offset1 - bitpos) / BITS_PER_UNIT; 4756 str_rtx = adjust_address (str_rtx, str_mode, offset1); 4757 } 4758 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG) 4759 return false; 4760 4761 /* If the bit field covers the whole REG/MEM, store_field 4762 will likely generate better code. */ 4763 if (bitsize >= str_bitsize) 4764 return false; 4765 4766 /* We can't handle fields split across multiple entities. */ 4767 if (bitpos + bitsize > str_bitsize) 4768 return false; 4769 4770 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) 4771 bitpos = str_bitsize - bitpos - bitsize; 4772 4773 switch (code) 4774 { 4775 case PLUS_EXPR: 4776 case MINUS_EXPR: 4777 /* For now, just optimize the case of the topmost bitfield 4778 where we don't need to do any masking and also 4779 1 bit bitfields where xor can be used. 4780 We might win by one instruction for the other bitfields 4781 too if insv/extv instructions aren't used, so that 4782 can be added later. */ 4783 if ((reverse || bitpos + bitsize != str_bitsize) 4784 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST)) 4785 break; 4786 4787 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL); 4788 value = convert_modes (str_mode, 4789 TYPE_MODE (TREE_TYPE (op1)), value, 4790 TYPE_UNSIGNED (TREE_TYPE (op1))); 4791 4792 /* We may be accessing data outside the field, which means 4793 we can alias adjacent data. */ 4794 if (MEM_P (str_rtx)) 4795 { 4796 str_rtx = shallow_copy_rtx (str_rtx); 4797 set_mem_alias_set (str_rtx, 0); 4798 set_mem_expr (str_rtx, 0); 4799 } 4800 4801 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize)) 4802 { 4803 value = expand_and (str_mode, value, const1_rtx, NULL); 4804 binop = xor_optab; 4805 } 4806 else 4807 binop = code == PLUS_EXPR ? add_optab : sub_optab; 4808 4809 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); 4810 if (reverse) 4811 value = flip_storage_order (str_mode, value); 4812 result = expand_binop (str_mode, binop, str_rtx, 4813 value, str_rtx, 1, OPTAB_WIDEN); 4814 if (result != str_rtx) 4815 emit_move_insn (str_rtx, result); 4816 return true; 4817 4818 case BIT_IOR_EXPR: 4819 case BIT_XOR_EXPR: 4820 if (TREE_CODE (op1) != INTEGER_CST) 4821 break; 4822 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL); 4823 value = convert_modes (str_mode, 4824 TYPE_MODE (TREE_TYPE (op1)), value, 4825 TYPE_UNSIGNED (TREE_TYPE (op1))); 4826 4827 /* We may be accessing data outside the field, which means 4828 we can alias adjacent data. */ 4829 if (MEM_P (str_rtx)) 4830 { 4831 str_rtx = shallow_copy_rtx (str_rtx); 4832 set_mem_alias_set (str_rtx, 0); 4833 set_mem_expr (str_rtx, 0); 4834 } 4835 4836 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab; 4837 if (bitpos + bitsize != str_bitsize) 4838 { 4839 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1, 4840 str_mode); 4841 value = expand_and (str_mode, value, mask, NULL_RTX); 4842 } 4843 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1); 4844 if (reverse) 4845 value = flip_storage_order (str_mode, value); 4846 result = expand_binop (str_mode, binop, str_rtx, 4847 value, str_rtx, 1, OPTAB_WIDEN); 4848 if (result != str_rtx) 4849 emit_move_insn (str_rtx, result); 4850 return true; 4851 4852 default: 4853 break; 4854 } 4855 4856 return false; 4857 } 4858 4859 /* In the C++ memory model, consecutive bit fields in a structure are 4860 considered one memory location. 4861 4862 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function 4863 returns the bit range of consecutive bits in which this COMPONENT_REF 4864 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS 4865 and *OFFSET may be adjusted in the process. 4866 4867 If the access does not need to be restricted, 0 is returned in both 4868 *BITSTART and *BITEND. */ 4869 4870 void 4871 get_bit_range (poly_uint64_pod *bitstart, poly_uint64_pod *bitend, tree exp, 4872 poly_int64_pod *bitpos, tree *offset) 4873 { 4874 poly_int64 bitoffset; 4875 tree field, repr; 4876 4877 gcc_assert (TREE_CODE (exp) == COMPONENT_REF); 4878 4879 field = TREE_OPERAND (exp, 1); 4880 repr = DECL_BIT_FIELD_REPRESENTATIVE (field); 4881 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no 4882 need to limit the range we can access. */ 4883 if (!repr) 4884 { 4885 *bitstart = *bitend = 0; 4886 return; 4887 } 4888 4889 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is 4890 part of a larger bit field, then the representative does not serve any 4891 useful purpose. This can occur in Ada. */ 4892 if (handled_component_p (TREE_OPERAND (exp, 0))) 4893 { 4894 machine_mode rmode; 4895 poly_int64 rbitsize, rbitpos; 4896 tree roffset; 4897 int unsignedp, reversep, volatilep = 0; 4898 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos, 4899 &roffset, &rmode, &unsignedp, &reversep, 4900 &volatilep); 4901 if (!multiple_p (rbitpos, BITS_PER_UNIT)) 4902 { 4903 *bitstart = *bitend = 0; 4904 return; 4905 } 4906 } 4907 4908 /* Compute the adjustment to bitpos from the offset of the field 4909 relative to the representative. DECL_FIELD_OFFSET of field and 4910 repr are the same by construction if they are not constants, 4911 see finish_bitfield_layout. */ 4912 poly_uint64 field_offset, repr_offset; 4913 if (poly_int_tree_p (DECL_FIELD_OFFSET (field), &field_offset) 4914 && poly_int_tree_p (DECL_FIELD_OFFSET (repr), &repr_offset)) 4915 bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT; 4916 else 4917 bitoffset = 0; 4918 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field)) 4919 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr))); 4920 4921 /* If the adjustment is larger than bitpos, we would have a negative bit 4922 position for the lower bound and this may wreak havoc later. Adjust 4923 offset and bitpos to make the lower bound non-negative in that case. */ 4924 if (maybe_gt (bitoffset, *bitpos)) 4925 { 4926 poly_int64 adjust_bits = upper_bound (bitoffset, *bitpos) - *bitpos; 4927 poly_int64 adjust_bytes = exact_div (adjust_bits, BITS_PER_UNIT); 4928 4929 *bitpos += adjust_bits; 4930 if (*offset == NULL_TREE) 4931 *offset = size_int (-adjust_bytes); 4932 else 4933 *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes)); 4934 *bitstart = 0; 4935 } 4936 else 4937 *bitstart = *bitpos - bitoffset; 4938 4939 *bitend = *bitstart + tree_to_poly_uint64 (DECL_SIZE (repr)) - 1; 4940 } 4941 4942 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside 4943 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if 4944 DECL_RTL was not set yet, return NORTL. */ 4945 4946 static inline bool 4947 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl) 4948 { 4949 if (TREE_CODE (addr) != ADDR_EXPR) 4950 return false; 4951 4952 tree base = TREE_OPERAND (addr, 0); 4953 4954 if (!DECL_P (base) 4955 || TREE_ADDRESSABLE (base) 4956 || DECL_MODE (base) == BLKmode) 4957 return false; 4958 4959 if (!DECL_RTL_SET_P (base)) 4960 return nortl; 4961 4962 return (!MEM_P (DECL_RTL (base))); 4963 } 4964 4965 /* Returns true if the MEM_REF REF refers to an object that does not 4966 reside in memory and has non-BLKmode. */ 4967 4968 static inline bool 4969 mem_ref_refers_to_non_mem_p (tree ref) 4970 { 4971 tree base = TREE_OPERAND (ref, 0); 4972 return addr_expr_of_non_mem_decl_p_1 (base, false); 4973 } 4974 4975 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL 4976 is true, try generating a nontemporal store. */ 4977 4978 void 4979 expand_assignment (tree to, tree from, bool nontemporal) 4980 { 4981 rtx to_rtx = 0; 4982 rtx result; 4983 machine_mode mode; 4984 unsigned int align; 4985 enum insn_code icode; 4986 4987 /* Don't crash if the lhs of the assignment was erroneous. */ 4988 if (TREE_CODE (to) == ERROR_MARK) 4989 { 4990 expand_normal (from); 4991 return; 4992 } 4993 4994 /* Optimize away no-op moves without side-effects. */ 4995 if (operand_equal_p (to, from, 0)) 4996 return; 4997 4998 /* Handle misaligned stores. */ 4999 mode = TYPE_MODE (TREE_TYPE (to)); 5000 if ((TREE_CODE (to) == MEM_REF 5001 || TREE_CODE (to) == TARGET_MEM_REF) 5002 && mode != BLKmode 5003 && !mem_ref_refers_to_non_mem_p (to) 5004 && ((align = get_object_alignment (to)) 5005 < GET_MODE_ALIGNMENT (mode)) 5006 && (((icode = optab_handler (movmisalign_optab, mode)) 5007 != CODE_FOR_nothing) 5008 || targetm.slow_unaligned_access (mode, align))) 5009 { 5010 rtx reg, mem; 5011 5012 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL); 5013 reg = force_not_mem (reg); 5014 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); 5015 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to)) 5016 reg = flip_storage_order (mode, reg); 5017 5018 if (icode != CODE_FOR_nothing) 5019 { 5020 struct expand_operand ops[2]; 5021 5022 create_fixed_operand (&ops[0], mem); 5023 create_input_operand (&ops[1], reg, mode); 5024 /* The movmisalign<mode> pattern cannot fail, else the assignment 5025 would silently be omitted. */ 5026 expand_insn (icode, 2, ops); 5027 } 5028 else 5029 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg, 5030 false); 5031 return; 5032 } 5033 5034 /* Assignment of a structure component needs special treatment 5035 if the structure component's rtx is not simply a MEM. 5036 Assignment of an array element at a constant index, and assignment of 5037 an array element in an unaligned packed structure field, has the same 5038 problem. Same for (partially) storing into a non-memory object. */ 5039 if (handled_component_p (to) 5040 || (TREE_CODE (to) == MEM_REF 5041 && (REF_REVERSE_STORAGE_ORDER (to) 5042 || mem_ref_refers_to_non_mem_p (to))) 5043 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE) 5044 { 5045 machine_mode mode1; 5046 poly_int64 bitsize, bitpos; 5047 poly_uint64 bitregion_start = 0; 5048 poly_uint64 bitregion_end = 0; 5049 tree offset; 5050 int unsignedp, reversep, volatilep = 0; 5051 tree tem; 5052 5053 push_temp_slots (); 5054 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1, 5055 &unsignedp, &reversep, &volatilep); 5056 5057 /* Make sure bitpos is not negative, it can wreak havoc later. */ 5058 if (maybe_lt (bitpos, 0)) 5059 { 5060 gcc_assert (offset == NULL_TREE); 5061 offset = size_int (bits_to_bytes_round_down (bitpos)); 5062 bitpos = num_trailing_bits (bitpos); 5063 } 5064 5065 if (TREE_CODE (to) == COMPONENT_REF 5066 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1))) 5067 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset); 5068 /* The C++ memory model naturally applies to byte-aligned fields. 5069 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or 5070 BITSIZE are not byte-aligned, there is no need to limit the range 5071 we can access. This can occur with packed structures in Ada. */ 5072 else if (maybe_gt (bitsize, 0) 5073 && multiple_p (bitsize, BITS_PER_UNIT) 5074 && multiple_p (bitpos, BITS_PER_UNIT)) 5075 { 5076 bitregion_start = bitpos; 5077 bitregion_end = bitpos + bitsize - 1; 5078 } 5079 5080 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE); 5081 5082 /* If the field has a mode, we want to access it in the 5083 field's mode, not the computed mode. 5084 If a MEM has VOIDmode (external with incomplete type), 5085 use BLKmode for it instead. */ 5086 if (MEM_P (to_rtx)) 5087 { 5088 if (mode1 != VOIDmode) 5089 to_rtx = adjust_address (to_rtx, mode1, 0); 5090 else if (GET_MODE (to_rtx) == VOIDmode) 5091 to_rtx = adjust_address (to_rtx, BLKmode, 0); 5092 } 5093 5094 if (offset != 0) 5095 { 5096 machine_mode address_mode; 5097 rtx offset_rtx; 5098 5099 if (!MEM_P (to_rtx)) 5100 { 5101 /* We can get constant negative offsets into arrays with broken 5102 user code. Translate this to a trap instead of ICEing. */ 5103 gcc_assert (TREE_CODE (offset) == INTEGER_CST); 5104 expand_builtin_trap (); 5105 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx); 5106 } 5107 5108 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM); 5109 address_mode = get_address_mode (to_rtx); 5110 if (GET_MODE (offset_rtx) != address_mode) 5111 { 5112 /* We cannot be sure that the RTL in offset_rtx is valid outside 5113 of a memory address context, so force it into a register 5114 before attempting to convert it to the desired mode. */ 5115 offset_rtx = force_operand (offset_rtx, NULL_RTX); 5116 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); 5117 } 5118 5119 /* If we have an expression in OFFSET_RTX and a non-zero 5120 byte offset in BITPOS, adding the byte offset before the 5121 OFFSET_RTX results in better intermediate code, which makes 5122 later rtl optimization passes perform better. 5123 5124 We prefer intermediate code like this: 5125 5126 r124:DI=r123:DI+0x18 5127 [r124:DI]=r121:DI 5128 5129 ... instead of ... 5130 5131 r124:DI=r123:DI+0x10 5132 [r124:DI+0x8]=r121:DI 5133 5134 This is only done for aligned data values, as these can 5135 be expected to result in single move instructions. */ 5136 poly_int64 bytepos; 5137 if (mode1 != VOIDmode 5138 && maybe_ne (bitpos, 0) 5139 && maybe_gt (bitsize, 0) 5140 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos) 5141 && multiple_p (bitpos, bitsize) 5142 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1)) 5143 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1)) 5144 { 5145 to_rtx = adjust_address (to_rtx, mode1, bytepos); 5146 bitregion_start = 0; 5147 if (known_ge (bitregion_end, poly_uint64 (bitpos))) 5148 bitregion_end -= bitpos; 5149 bitpos = 0; 5150 } 5151 5152 to_rtx = offset_address (to_rtx, offset_rtx, 5153 highest_pow2_factor_for_target (to, 5154 offset)); 5155 } 5156 5157 /* No action is needed if the target is not a memory and the field 5158 lies completely outside that target. This can occur if the source 5159 code contains an out-of-bounds access to a small array. */ 5160 if (!MEM_P (to_rtx) 5161 && GET_MODE (to_rtx) != BLKmode 5162 && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx)))) 5163 { 5164 expand_normal (from); 5165 result = NULL; 5166 } 5167 /* Handle expand_expr of a complex value returning a CONCAT. */ 5168 else if (GET_CODE (to_rtx) == CONCAT) 5169 { 5170 machine_mode to_mode = GET_MODE (to_rtx); 5171 gcc_checking_assert (COMPLEX_MODE_P (to_mode)); 5172 poly_int64 mode_bitsize = GET_MODE_BITSIZE (to_mode); 5173 unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode); 5174 if (TYPE_MODE (TREE_TYPE (from)) == to_mode 5175 && known_eq (bitpos, 0) 5176 && known_eq (bitsize, mode_bitsize)) 5177 result = store_expr (from, to_rtx, false, nontemporal, reversep); 5178 else if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE_INNER (to_mode) 5179 && known_eq (bitsize, inner_bitsize) 5180 && (known_eq (bitpos, 0) 5181 || known_eq (bitpos, inner_bitsize))) 5182 result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)), 5183 false, nontemporal, reversep); 5184 else if (known_le (bitpos + bitsize, inner_bitsize)) 5185 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos, 5186 bitregion_start, bitregion_end, 5187 mode1, from, get_alias_set (to), 5188 nontemporal, reversep); 5189 else if (known_ge (bitpos, inner_bitsize)) 5190 result = store_field (XEXP (to_rtx, 1), bitsize, 5191 bitpos - inner_bitsize, 5192 bitregion_start, bitregion_end, 5193 mode1, from, get_alias_set (to), 5194 nontemporal, reversep); 5195 else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize)) 5196 { 5197 result = expand_normal (from); 5198 if (GET_CODE (result) == CONCAT) 5199 { 5200 to_mode = GET_MODE_INNER (to_mode); 5201 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result)); 5202 rtx from_real 5203 = simplify_gen_subreg (to_mode, XEXP (result, 0), 5204 from_mode, 0); 5205 rtx from_imag 5206 = simplify_gen_subreg (to_mode, XEXP (result, 1), 5207 from_mode, 0); 5208 if (!from_real || !from_imag) 5209 goto concat_store_slow; 5210 emit_move_insn (XEXP (to_rtx, 0), from_real); 5211 emit_move_insn (XEXP (to_rtx, 1), from_imag); 5212 } 5213 else 5214 { 5215 rtx from_rtx; 5216 if (MEM_P (result)) 5217 from_rtx = change_address (result, to_mode, NULL_RTX); 5218 else 5219 from_rtx 5220 = simplify_gen_subreg (to_mode, result, 5221 TYPE_MODE (TREE_TYPE (from)), 0); 5222 if (from_rtx) 5223 { 5224 emit_move_insn (XEXP (to_rtx, 0), 5225 read_complex_part (from_rtx, false)); 5226 emit_move_insn (XEXP (to_rtx, 1), 5227 read_complex_part (from_rtx, true)); 5228 } 5229 else 5230 { 5231 machine_mode to_mode 5232 = GET_MODE_INNER (GET_MODE (to_rtx)); 5233 rtx from_real 5234 = simplify_gen_subreg (to_mode, result, 5235 TYPE_MODE (TREE_TYPE (from)), 5236 0); 5237 rtx from_imag 5238 = simplify_gen_subreg (to_mode, result, 5239 TYPE_MODE (TREE_TYPE (from)), 5240 GET_MODE_SIZE (to_mode)); 5241 if (!from_real || !from_imag) 5242 goto concat_store_slow; 5243 emit_move_insn (XEXP (to_rtx, 0), from_real); 5244 emit_move_insn (XEXP (to_rtx, 1), from_imag); 5245 } 5246 } 5247 } 5248 else 5249 { 5250 concat_store_slow:; 5251 rtx temp = assign_stack_temp (to_mode, 5252 GET_MODE_SIZE (GET_MODE (to_rtx))); 5253 write_complex_part (temp, XEXP (to_rtx, 0), false); 5254 write_complex_part (temp, XEXP (to_rtx, 1), true); 5255 result = store_field (temp, bitsize, bitpos, 5256 bitregion_start, bitregion_end, 5257 mode1, from, get_alias_set (to), 5258 nontemporal, reversep); 5259 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false)); 5260 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true)); 5261 } 5262 } 5263 /* For calls to functions returning variable length structures, if TO_RTX 5264 is not a MEM, go through a MEM because we must not create temporaries 5265 of the VLA type. */ 5266 else if (!MEM_P (to_rtx) 5267 && TREE_CODE (from) == CALL_EXPR 5268 && COMPLETE_TYPE_P (TREE_TYPE (from)) 5269 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) != INTEGER_CST) 5270 { 5271 rtx temp = assign_stack_temp (GET_MODE (to_rtx), 5272 GET_MODE_SIZE (GET_MODE (to_rtx))); 5273 result = store_field (temp, bitsize, bitpos, bitregion_start, 5274 bitregion_end, mode1, from, get_alias_set (to), 5275 nontemporal, reversep); 5276 emit_move_insn (to_rtx, temp); 5277 } 5278 else 5279 { 5280 if (MEM_P (to_rtx)) 5281 { 5282 /* If the field is at offset zero, we could have been given the 5283 DECL_RTX of the parent struct. Don't munge it. */ 5284 to_rtx = shallow_copy_rtx (to_rtx); 5285 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos); 5286 if (volatilep) 5287 MEM_VOLATILE_P (to_rtx) = 1; 5288 } 5289 5290 gcc_checking_assert (known_ge (bitpos, 0)); 5291 if (optimize_bitfield_assignment_op (bitsize, bitpos, 5292 bitregion_start, bitregion_end, 5293 mode1, to_rtx, to, from, 5294 reversep)) 5295 result = NULL; 5296 else 5297 result = store_field (to_rtx, bitsize, bitpos, 5298 bitregion_start, bitregion_end, 5299 mode1, from, get_alias_set (to), 5300 nontemporal, reversep); 5301 } 5302 5303 if (result) 5304 preserve_temp_slots (result); 5305 pop_temp_slots (); 5306 return; 5307 } 5308 5309 /* If the rhs is a function call and its value is not an aggregate, 5310 call the function before we start to compute the lhs. 5311 This is needed for correct code for cases such as 5312 val = setjmp (buf) on machines where reference to val 5313 requires loading up part of an address in a separate insn. 5314 5315 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG 5316 since it might be a promoted variable where the zero- or sign- extension 5317 needs to be done. Handling this in the normal way is safe because no 5318 computation is done before the call. The same is true for SSA names. */ 5319 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from) 5320 && COMPLETE_TYPE_P (TREE_TYPE (from)) 5321 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST 5322 && ! (((VAR_P (to) 5323 || TREE_CODE (to) == PARM_DECL 5324 || TREE_CODE (to) == RESULT_DECL) 5325 && REG_P (DECL_RTL (to))) 5326 || TREE_CODE (to) == SSA_NAME)) 5327 { 5328 rtx value; 5329 5330 push_temp_slots (); 5331 value = expand_normal (from); 5332 5333 if (to_rtx == 0) 5334 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); 5335 5336 /* Handle calls that return values in multiple non-contiguous locations. 5337 The Irix 6 ABI has examples of this. */ 5338 if (GET_CODE (to_rtx) == PARALLEL) 5339 { 5340 if (GET_CODE (value) == PARALLEL) 5341 emit_group_move (to_rtx, value); 5342 else 5343 emit_group_load (to_rtx, value, TREE_TYPE (from), 5344 int_size_in_bytes (TREE_TYPE (from))); 5345 } 5346 else if (GET_CODE (value) == PARALLEL) 5347 emit_group_store (to_rtx, value, TREE_TYPE (from), 5348 int_size_in_bytes (TREE_TYPE (from))); 5349 else if (GET_MODE (to_rtx) == BLKmode) 5350 { 5351 /* Handle calls that return BLKmode values in registers. */ 5352 if (REG_P (value)) 5353 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from)); 5354 else 5355 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL); 5356 } 5357 else 5358 { 5359 if (POINTER_TYPE_P (TREE_TYPE (to))) 5360 value = convert_memory_address_addr_space 5361 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value, 5362 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to)))); 5363 5364 emit_move_insn (to_rtx, value); 5365 } 5366 5367 preserve_temp_slots (to_rtx); 5368 pop_temp_slots (); 5369 return; 5370 } 5371 5372 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */ 5373 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE); 5374 5375 /* Don't move directly into a return register. */ 5376 if (TREE_CODE (to) == RESULT_DECL 5377 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL)) 5378 { 5379 rtx temp; 5380 5381 push_temp_slots (); 5382 5383 /* If the source is itself a return value, it still is in a pseudo at 5384 this point so we can move it back to the return register directly. */ 5385 if (REG_P (to_rtx) 5386 && TYPE_MODE (TREE_TYPE (from)) == BLKmode 5387 && TREE_CODE (from) != CALL_EXPR) 5388 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from); 5389 else 5390 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL); 5391 5392 /* Handle calls that return values in multiple non-contiguous locations. 5393 The Irix 6 ABI has examples of this. */ 5394 if (GET_CODE (to_rtx) == PARALLEL) 5395 { 5396 if (GET_CODE (temp) == PARALLEL) 5397 emit_group_move (to_rtx, temp); 5398 else 5399 emit_group_load (to_rtx, temp, TREE_TYPE (from), 5400 int_size_in_bytes (TREE_TYPE (from))); 5401 } 5402 else if (temp) 5403 emit_move_insn (to_rtx, temp); 5404 5405 preserve_temp_slots (to_rtx); 5406 pop_temp_slots (); 5407 return; 5408 } 5409 5410 /* In case we are returning the contents of an object which overlaps 5411 the place the value is being stored, use a safe function when copying 5412 a value through a pointer into a structure value return block. */ 5413 if (TREE_CODE (to) == RESULT_DECL 5414 && TREE_CODE (from) == INDIRECT_REF 5415 && ADDR_SPACE_GENERIC_P 5416 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0))))) 5417 && refs_may_alias_p (to, from) 5418 && cfun->returns_struct 5419 && !cfun->returns_pcc_struct) 5420 { 5421 rtx from_rtx, size; 5422 5423 push_temp_slots (); 5424 size = expr_size (from); 5425 from_rtx = expand_normal (from); 5426 5427 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size); 5428 5429 preserve_temp_slots (to_rtx); 5430 pop_temp_slots (); 5431 return; 5432 } 5433 5434 /* Compute FROM and store the value in the rtx we got. */ 5435 5436 push_temp_slots (); 5437 result = store_expr (from, to_rtx, 0, nontemporal, false); 5438 preserve_temp_slots (result); 5439 pop_temp_slots (); 5440 return; 5441 } 5442 5443 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this 5444 succeeded, false otherwise. */ 5445 5446 bool 5447 emit_storent_insn (rtx to, rtx from) 5448 { 5449 struct expand_operand ops[2]; 5450 machine_mode mode = GET_MODE (to); 5451 enum insn_code code = optab_handler (storent_optab, mode); 5452 5453 if (code == CODE_FOR_nothing) 5454 return false; 5455 5456 create_fixed_operand (&ops[0], to); 5457 create_input_operand (&ops[1], from, mode); 5458 return maybe_expand_insn (code, 2, ops); 5459 } 5460 5461 /* Helper function for store_expr storing of STRING_CST. */ 5462 5463 static rtx 5464 string_cst_read_str (void *data, HOST_WIDE_INT offset, scalar_int_mode mode) 5465 { 5466 tree str = (tree) data; 5467 5468 gcc_assert (offset >= 0); 5469 if (offset >= TREE_STRING_LENGTH (str)) 5470 return const0_rtx; 5471 5472 if ((unsigned HOST_WIDE_INT) offset + GET_MODE_SIZE (mode) 5473 > (unsigned HOST_WIDE_INT) TREE_STRING_LENGTH (str)) 5474 { 5475 char *p = XALLOCAVEC (char, GET_MODE_SIZE (mode)); 5476 size_t l = TREE_STRING_LENGTH (str) - offset; 5477 memcpy (p, TREE_STRING_POINTER (str) + offset, l); 5478 memset (p + l, '\0', GET_MODE_SIZE (mode) - l); 5479 return c_readstr (p, mode, false); 5480 } 5481 5482 return c_readstr (TREE_STRING_POINTER (str) + offset, mode, false); 5483 } 5484 5485 /* Generate code for computing expression EXP, 5486 and storing the value into TARGET. 5487 5488 If the mode is BLKmode then we may return TARGET itself. 5489 It turns out that in BLKmode it doesn't cause a problem. 5490 because C has no operators that could combine two different 5491 assignments into the same BLKmode object with different values 5492 with no sequence point. Will other languages need this to 5493 be more thorough? 5494 5495 If CALL_PARAM_P is nonzero, this is a store into a call param on the 5496 stack, and block moves may need to be treated specially. 5497 5498 If NONTEMPORAL is true, try using a nontemporal store instruction. 5499 5500 If REVERSE is true, the store is to be done in reverse order. */ 5501 5502 rtx 5503 store_expr (tree exp, rtx target, int call_param_p, 5504 bool nontemporal, bool reverse) 5505 { 5506 rtx temp; 5507 rtx alt_rtl = NULL_RTX; 5508 location_t loc = curr_insn_location (); 5509 5510 if (VOID_TYPE_P (TREE_TYPE (exp))) 5511 { 5512 /* C++ can generate ?: expressions with a throw expression in one 5513 branch and an rvalue in the other. Here, we resolve attempts to 5514 store the throw expression's nonexistent result. */ 5515 gcc_assert (!call_param_p); 5516 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); 5517 return NULL_RTX; 5518 } 5519 if (TREE_CODE (exp) == COMPOUND_EXPR) 5520 { 5521 /* Perform first part of compound expression, then assign from second 5522 part. */ 5523 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode, 5524 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); 5525 return store_expr (TREE_OPERAND (exp, 1), target, 5526 call_param_p, nontemporal, reverse); 5527 } 5528 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode) 5529 { 5530 /* For conditional expression, get safe form of the target. Then 5531 test the condition, doing the appropriate assignment on either 5532 side. This avoids the creation of unnecessary temporaries. 5533 For non-BLKmode, it is more efficient not to do this. */ 5534 5535 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx (); 5536 5537 do_pending_stack_adjust (); 5538 NO_DEFER_POP; 5539 jumpifnot (TREE_OPERAND (exp, 0), lab1, 5540 profile_probability::uninitialized ()); 5541 store_expr (TREE_OPERAND (exp, 1), target, call_param_p, 5542 nontemporal, reverse); 5543 emit_jump_insn (targetm.gen_jump (lab2)); 5544 emit_barrier (); 5545 emit_label (lab1); 5546 store_expr (TREE_OPERAND (exp, 2), target, call_param_p, 5547 nontemporal, reverse); 5548 emit_label (lab2); 5549 OK_DEFER_POP; 5550 5551 return NULL_RTX; 5552 } 5553 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target)) 5554 /* If this is a scalar in a register that is stored in a wider mode 5555 than the declared mode, compute the result into its declared mode 5556 and then convert to the wider mode. Our value is the computed 5557 expression. */ 5558 { 5559 rtx inner_target = 0; 5560 scalar_int_mode outer_mode = subreg_unpromoted_mode (target); 5561 scalar_int_mode inner_mode = subreg_promoted_mode (target); 5562 5563 /* We can do the conversion inside EXP, which will often result 5564 in some optimizations. Do the conversion in two steps: first 5565 change the signedness, if needed, then the extend. But don't 5566 do this if the type of EXP is a subtype of something else 5567 since then the conversion might involve more than just 5568 converting modes. */ 5569 if (INTEGRAL_TYPE_P (TREE_TYPE (exp)) 5570 && TREE_TYPE (TREE_TYPE (exp)) == 0 5571 && GET_MODE_PRECISION (outer_mode) 5572 == TYPE_PRECISION (TREE_TYPE (exp))) 5573 { 5574 if (!SUBREG_CHECK_PROMOTED_SIGN (target, 5575 TYPE_UNSIGNED (TREE_TYPE (exp)))) 5576 { 5577 /* Some types, e.g. Fortran's logical*4, won't have a signed 5578 version, so use the mode instead. */ 5579 tree ntype 5580 = (signed_or_unsigned_type_for 5581 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp))); 5582 if (ntype == NULL) 5583 ntype = lang_hooks.types.type_for_mode 5584 (TYPE_MODE (TREE_TYPE (exp)), 5585 SUBREG_PROMOTED_SIGN (target)); 5586 5587 exp = fold_convert_loc (loc, ntype, exp); 5588 } 5589 5590 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode 5591 (inner_mode, SUBREG_PROMOTED_SIGN (target)), 5592 exp); 5593 5594 inner_target = SUBREG_REG (target); 5595 } 5596 5597 temp = expand_expr (exp, inner_target, VOIDmode, 5598 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL); 5599 5600 5601 /* If TEMP is a VOIDmode constant, use convert_modes to make 5602 sure that we properly convert it. */ 5603 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode) 5604 { 5605 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)), 5606 temp, SUBREG_PROMOTED_SIGN (target)); 5607 temp = convert_modes (inner_mode, outer_mode, temp, 5608 SUBREG_PROMOTED_SIGN (target)); 5609 } 5610 5611 convert_move (SUBREG_REG (target), temp, 5612 SUBREG_PROMOTED_SIGN (target)); 5613 5614 return NULL_RTX; 5615 } 5616 else if ((TREE_CODE (exp) == STRING_CST 5617 || (TREE_CODE (exp) == MEM_REF 5618 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR 5619 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) 5620 == STRING_CST 5621 && integer_zerop (TREE_OPERAND (exp, 1)))) 5622 && !nontemporal && !call_param_p 5623 && MEM_P (target)) 5624 { 5625 /* Optimize initialization of an array with a STRING_CST. */ 5626 HOST_WIDE_INT exp_len, str_copy_len; 5627 rtx dest_mem; 5628 tree str = TREE_CODE (exp) == STRING_CST 5629 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0); 5630 5631 exp_len = int_expr_size (exp); 5632 if (exp_len <= 0) 5633 goto normal_expr; 5634 5635 if (TREE_STRING_LENGTH (str) <= 0) 5636 goto normal_expr; 5637 5638 if (can_store_by_pieces (exp_len, string_cst_read_str, (void *) str, 5639 MEM_ALIGN (target), false)) 5640 { 5641 store_by_pieces (target, exp_len, string_cst_read_str, (void *) str, 5642 MEM_ALIGN (target), false, RETURN_BEGIN); 5643 return NULL_RTX; 5644 } 5645 5646 str_copy_len = TREE_STRING_LENGTH (str); 5647 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0) 5648 { 5649 str_copy_len += STORE_MAX_PIECES - 1; 5650 str_copy_len &= ~(STORE_MAX_PIECES - 1); 5651 } 5652 if (str_copy_len >= exp_len) 5653 goto normal_expr; 5654 5655 if (!can_store_by_pieces (str_copy_len, string_cst_read_str, 5656 (void *) str, MEM_ALIGN (target), false)) 5657 goto normal_expr; 5658 5659 dest_mem = store_by_pieces (target, str_copy_len, string_cst_read_str, 5660 (void *) str, MEM_ALIGN (target), false, 5661 RETURN_END); 5662 clear_storage (adjust_address_1 (dest_mem, BLKmode, 0, 1, 1, 0, 5663 exp_len - str_copy_len), 5664 GEN_INT (exp_len - str_copy_len), BLOCK_OP_NORMAL); 5665 return NULL_RTX; 5666 } 5667 else 5668 { 5669 rtx tmp_target; 5670 5671 normal_expr: 5672 /* If we want to use a nontemporal or a reverse order store, force the 5673 value into a register first. */ 5674 tmp_target = nontemporal || reverse ? NULL_RTX : target; 5675 temp = expand_expr_real (exp, tmp_target, GET_MODE (target), 5676 (call_param_p 5677 ? EXPAND_STACK_PARM : EXPAND_NORMAL), 5678 &alt_rtl, false); 5679 } 5680 5681 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not 5682 the same as that of TARGET, adjust the constant. This is needed, for 5683 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want 5684 only a word-sized value. */ 5685 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode 5686 && TREE_CODE (exp) != ERROR_MARK 5687 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp))) 5688 { 5689 if (GET_MODE_CLASS (GET_MODE (target)) 5690 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp))) 5691 && known_eq (GET_MODE_BITSIZE (GET_MODE (target)), 5692 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp))))) 5693 { 5694 rtx t = simplify_gen_subreg (GET_MODE (target), temp, 5695 TYPE_MODE (TREE_TYPE (exp)), 0); 5696 if (t) 5697 temp = t; 5698 } 5699 if (GET_MODE (temp) == VOIDmode) 5700 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)), 5701 temp, TYPE_UNSIGNED (TREE_TYPE (exp))); 5702 } 5703 5704 /* If value was not generated in the target, store it there. 5705 Convert the value to TARGET's type first if necessary and emit the 5706 pending incrementations that have been queued when expanding EXP. 5707 Note that we cannot emit the whole queue blindly because this will 5708 effectively disable the POST_INC optimization later. 5709 5710 If TEMP and TARGET compare equal according to rtx_equal_p, but 5711 one or both of them are volatile memory refs, we have to distinguish 5712 two cases: 5713 - expand_expr has used TARGET. In this case, we must not generate 5714 another copy. This can be detected by TARGET being equal according 5715 to == . 5716 - expand_expr has not used TARGET - that means that the source just 5717 happens to have the same RTX form. Since temp will have been created 5718 by expand_expr, it will compare unequal according to == . 5719 We must generate a copy in this case, to reach the correct number 5720 of volatile memory references. */ 5721 5722 if ((! rtx_equal_p (temp, target) 5723 || (temp != target && (side_effects_p (temp) 5724 || side_effects_p (target)))) 5725 && TREE_CODE (exp) != ERROR_MARK 5726 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET, 5727 but TARGET is not valid memory reference, TEMP will differ 5728 from TARGET although it is really the same location. */ 5729 && !(alt_rtl 5730 && rtx_equal_p (alt_rtl, target) 5731 && !side_effects_p (alt_rtl) 5732 && !side_effects_p (target)) 5733 /* If there's nothing to copy, don't bother. Don't call 5734 expr_size unless necessary, because some front-ends (C++) 5735 expr_size-hook must not be given objects that are not 5736 supposed to be bit-copied or bit-initialized. */ 5737 && expr_size (exp) != const0_rtx) 5738 { 5739 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode) 5740 { 5741 if (GET_MODE (target) == BLKmode) 5742 { 5743 /* Handle calls that return BLKmode values in registers. */ 5744 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) 5745 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp)); 5746 else 5747 store_bit_field (target, 5748 INTVAL (expr_size (exp)) * BITS_PER_UNIT, 5749 0, 0, 0, GET_MODE (temp), temp, reverse); 5750 } 5751 else 5752 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp))); 5753 } 5754 5755 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST) 5756 { 5757 /* Handle copying a string constant into an array. The string 5758 constant may be shorter than the array. So copy just the string's 5759 actual length, and clear the rest. First get the size of the data 5760 type of the string, which is actually the size of the target. */ 5761 rtx size = expr_size (exp); 5762 5763 if (CONST_INT_P (size) 5764 && INTVAL (size) < TREE_STRING_LENGTH (exp)) 5765 emit_block_move (target, temp, size, 5766 (call_param_p 5767 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); 5768 else 5769 { 5770 machine_mode pointer_mode 5771 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target)); 5772 machine_mode address_mode = get_address_mode (target); 5773 5774 /* Compute the size of the data to copy from the string. */ 5775 tree copy_size 5776 = size_binop_loc (loc, MIN_EXPR, 5777 make_tree (sizetype, size), 5778 size_int (TREE_STRING_LENGTH (exp))); 5779 rtx copy_size_rtx 5780 = expand_expr (copy_size, NULL_RTX, VOIDmode, 5781 (call_param_p 5782 ? EXPAND_STACK_PARM : EXPAND_NORMAL)); 5783 rtx_code_label *label = 0; 5784 5785 /* Copy that much. */ 5786 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx, 5787 TYPE_UNSIGNED (sizetype)); 5788 emit_block_move (target, temp, copy_size_rtx, 5789 (call_param_p 5790 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); 5791 5792 /* Figure out how much is left in TARGET that we have to clear. 5793 Do all calculations in pointer_mode. */ 5794 poly_int64 const_copy_size; 5795 if (poly_int_rtx_p (copy_size_rtx, &const_copy_size)) 5796 { 5797 size = plus_constant (address_mode, size, -const_copy_size); 5798 target = adjust_address (target, BLKmode, const_copy_size); 5799 } 5800 else 5801 { 5802 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size, 5803 copy_size_rtx, NULL_RTX, 0, 5804 OPTAB_LIB_WIDEN); 5805 5806 if (GET_MODE (copy_size_rtx) != address_mode) 5807 copy_size_rtx = convert_to_mode (address_mode, 5808 copy_size_rtx, 5809 TYPE_UNSIGNED (sizetype)); 5810 5811 target = offset_address (target, copy_size_rtx, 5812 highest_pow2_factor (copy_size)); 5813 label = gen_label_rtx (); 5814 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX, 5815 GET_MODE (size), 0, label); 5816 } 5817 5818 if (size != const0_rtx) 5819 clear_storage (target, size, BLOCK_OP_NORMAL); 5820 5821 if (label) 5822 emit_label (label); 5823 } 5824 } 5825 /* Handle calls that return values in multiple non-contiguous locations. 5826 The Irix 6 ABI has examples of this. */ 5827 else if (GET_CODE (target) == PARALLEL) 5828 { 5829 if (GET_CODE (temp) == PARALLEL) 5830 emit_group_move (target, temp); 5831 else 5832 emit_group_load (target, temp, TREE_TYPE (exp), 5833 int_size_in_bytes (TREE_TYPE (exp))); 5834 } 5835 else if (GET_CODE (temp) == PARALLEL) 5836 emit_group_store (target, temp, TREE_TYPE (exp), 5837 int_size_in_bytes (TREE_TYPE (exp))); 5838 else if (GET_MODE (temp) == BLKmode) 5839 emit_block_move (target, temp, expr_size (exp), 5840 (call_param_p 5841 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); 5842 /* If we emit a nontemporal store, there is nothing else to do. */ 5843 else if (nontemporal && emit_storent_insn (target, temp)) 5844 ; 5845 else 5846 { 5847 if (reverse) 5848 temp = flip_storage_order (GET_MODE (target), temp); 5849 temp = force_operand (temp, target); 5850 if (temp != target) 5851 emit_move_insn (target, temp); 5852 } 5853 } 5854 5855 return NULL_RTX; 5856 } 5857 5858 /* Return true if field F of structure TYPE is a flexible array. */ 5859 5860 static bool 5861 flexible_array_member_p (const_tree f, const_tree type) 5862 { 5863 const_tree tf; 5864 5865 tf = TREE_TYPE (f); 5866 return (DECL_CHAIN (f) == NULL 5867 && TREE_CODE (tf) == ARRAY_TYPE 5868 && TYPE_DOMAIN (tf) 5869 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf)) 5870 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf))) 5871 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf)) 5872 && int_size_in_bytes (type) >= 0); 5873 } 5874 5875 /* If FOR_CTOR_P, return the number of top-level elements that a constructor 5876 must have in order for it to completely initialize a value of type TYPE. 5877 Return -1 if the number isn't known. 5878 5879 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */ 5880 5881 static HOST_WIDE_INT 5882 count_type_elements (const_tree type, bool for_ctor_p) 5883 { 5884 switch (TREE_CODE (type)) 5885 { 5886 case ARRAY_TYPE: 5887 { 5888 tree nelts; 5889 5890 nelts = array_type_nelts (type); 5891 if (nelts && tree_fits_uhwi_p (nelts)) 5892 { 5893 unsigned HOST_WIDE_INT n; 5894 5895 n = tree_to_uhwi (nelts) + 1; 5896 if (n == 0 || for_ctor_p) 5897 return n; 5898 else 5899 return n * count_type_elements (TREE_TYPE (type), false); 5900 } 5901 return for_ctor_p ? -1 : 1; 5902 } 5903 5904 case RECORD_TYPE: 5905 { 5906 unsigned HOST_WIDE_INT n; 5907 tree f; 5908 5909 n = 0; 5910 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) 5911 if (TREE_CODE (f) == FIELD_DECL) 5912 { 5913 if (!for_ctor_p) 5914 n += count_type_elements (TREE_TYPE (f), false); 5915 else if (!flexible_array_member_p (f, type)) 5916 /* Don't count flexible arrays, which are not supposed 5917 to be initialized. */ 5918 n += 1; 5919 } 5920 5921 return n; 5922 } 5923 5924 case UNION_TYPE: 5925 case QUAL_UNION_TYPE: 5926 { 5927 tree f; 5928 HOST_WIDE_INT n, m; 5929 5930 gcc_assert (!for_ctor_p); 5931 /* Estimate the number of scalars in each field and pick the 5932 maximum. Other estimates would do instead; the idea is simply 5933 to make sure that the estimate is not sensitive to the ordering 5934 of the fields. */ 5935 n = 1; 5936 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f)) 5937 if (TREE_CODE (f) == FIELD_DECL) 5938 { 5939 m = count_type_elements (TREE_TYPE (f), false); 5940 /* If the field doesn't span the whole union, add an extra 5941 scalar for the rest. */ 5942 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)), 5943 TYPE_SIZE (type)) != 1) 5944 m++; 5945 if (n < m) 5946 n = m; 5947 } 5948 return n; 5949 } 5950 5951 case COMPLEX_TYPE: 5952 return 2; 5953 5954 case VECTOR_TYPE: 5955 { 5956 unsigned HOST_WIDE_INT nelts; 5957 if (TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts)) 5958 return nelts; 5959 else 5960 return -1; 5961 } 5962 5963 case INTEGER_TYPE: 5964 case REAL_TYPE: 5965 case FIXED_POINT_TYPE: 5966 case ENUMERAL_TYPE: 5967 case BOOLEAN_TYPE: 5968 case POINTER_TYPE: 5969 case OFFSET_TYPE: 5970 case REFERENCE_TYPE: 5971 case NULLPTR_TYPE: 5972 return 1; 5973 5974 case ERROR_MARK: 5975 return 0; 5976 5977 case VOID_TYPE: 5978 case METHOD_TYPE: 5979 case FUNCTION_TYPE: 5980 case LANG_TYPE: 5981 default: 5982 gcc_unreachable (); 5983 } 5984 } 5985 5986 /* Helper for categorize_ctor_elements. Identical interface. */ 5987 5988 static bool 5989 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts, 5990 HOST_WIDE_INT *p_unique_nz_elts, 5991 HOST_WIDE_INT *p_init_elts, bool *p_complete) 5992 { 5993 unsigned HOST_WIDE_INT idx; 5994 HOST_WIDE_INT nz_elts, unique_nz_elts, init_elts, num_fields; 5995 tree value, purpose, elt_type; 5996 5997 /* Whether CTOR is a valid constant initializer, in accordance with what 5998 initializer_constant_valid_p does. If inferred from the constructor 5999 elements, true until proven otherwise. */ 6000 bool const_from_elts_p = constructor_static_from_elts_p (ctor); 6001 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor); 6002 6003 nz_elts = 0; 6004 unique_nz_elts = 0; 6005 init_elts = 0; 6006 num_fields = 0; 6007 elt_type = NULL_TREE; 6008 6009 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value) 6010 { 6011 HOST_WIDE_INT mult = 1; 6012 6013 if (purpose && TREE_CODE (purpose) == RANGE_EXPR) 6014 { 6015 tree lo_index = TREE_OPERAND (purpose, 0); 6016 tree hi_index = TREE_OPERAND (purpose, 1); 6017 6018 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index)) 6019 mult = (tree_to_uhwi (hi_index) 6020 - tree_to_uhwi (lo_index) + 1); 6021 } 6022 num_fields += mult; 6023 elt_type = TREE_TYPE (value); 6024 6025 switch (TREE_CODE (value)) 6026 { 6027 case CONSTRUCTOR: 6028 { 6029 HOST_WIDE_INT nz = 0, unz = 0, ic = 0; 6030 6031 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &unz, 6032 &ic, p_complete); 6033 6034 nz_elts += mult * nz; 6035 unique_nz_elts += unz; 6036 init_elts += mult * ic; 6037 6038 if (const_from_elts_p && const_p) 6039 const_p = const_elt_p; 6040 } 6041 break; 6042 6043 case INTEGER_CST: 6044 case REAL_CST: 6045 case FIXED_CST: 6046 if (!initializer_zerop (value)) 6047 { 6048 nz_elts += mult; 6049 unique_nz_elts++; 6050 } 6051 init_elts += mult; 6052 break; 6053 6054 case STRING_CST: 6055 nz_elts += mult * TREE_STRING_LENGTH (value); 6056 unique_nz_elts += TREE_STRING_LENGTH (value); 6057 init_elts += mult * TREE_STRING_LENGTH (value); 6058 break; 6059 6060 case COMPLEX_CST: 6061 if (!initializer_zerop (TREE_REALPART (value))) 6062 { 6063 nz_elts += mult; 6064 unique_nz_elts++; 6065 } 6066 if (!initializer_zerop (TREE_IMAGPART (value))) 6067 { 6068 nz_elts += mult; 6069 unique_nz_elts++; 6070 } 6071 init_elts += 2 * mult; 6072 break; 6073 6074 case VECTOR_CST: 6075 { 6076 /* We can only construct constant-length vectors using 6077 CONSTRUCTOR. */ 6078 unsigned int nunits = VECTOR_CST_NELTS (value).to_constant (); 6079 for (unsigned int i = 0; i < nunits; ++i) 6080 { 6081 tree v = VECTOR_CST_ELT (value, i); 6082 if (!initializer_zerop (v)) 6083 { 6084 nz_elts += mult; 6085 unique_nz_elts++; 6086 } 6087 init_elts += mult; 6088 } 6089 } 6090 break; 6091 6092 default: 6093 { 6094 HOST_WIDE_INT tc = count_type_elements (elt_type, false); 6095 nz_elts += mult * tc; 6096 unique_nz_elts += tc; 6097 init_elts += mult * tc; 6098 6099 if (const_from_elts_p && const_p) 6100 const_p 6101 = initializer_constant_valid_p (value, 6102 elt_type, 6103 TYPE_REVERSE_STORAGE_ORDER 6104 (TREE_TYPE (ctor))) 6105 != NULL_TREE; 6106 } 6107 break; 6108 } 6109 } 6110 6111 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor), 6112 num_fields, elt_type)) 6113 *p_complete = false; 6114 6115 *p_nz_elts += nz_elts; 6116 *p_unique_nz_elts += unique_nz_elts; 6117 *p_init_elts += init_elts; 6118 6119 return const_p; 6120 } 6121 6122 /* Examine CTOR to discover: 6123 * how many scalar fields are set to nonzero values, 6124 and place it in *P_NZ_ELTS; 6125 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of 6126 high - low + 1 (this can be useful for callers to determine ctors 6127 that could be cheaply initialized with - perhaps nested - loops 6128 compared to copied from huge read-only data), 6129 and place it in *P_UNIQUE_NZ_ELTS; 6130 * how many scalar fields in total are in CTOR, 6131 and place it in *P_ELT_COUNT. 6132 * whether the constructor is complete -- in the sense that every 6133 meaningful byte is explicitly given a value -- 6134 and place it in *P_COMPLETE. 6135 6136 Return whether or not CTOR is a valid static constant initializer, the same 6137 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */ 6138 6139 bool 6140 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts, 6141 HOST_WIDE_INT *p_unique_nz_elts, 6142 HOST_WIDE_INT *p_init_elts, bool *p_complete) 6143 { 6144 *p_nz_elts = 0; 6145 *p_unique_nz_elts = 0; 6146 *p_init_elts = 0; 6147 *p_complete = true; 6148 6149 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_unique_nz_elts, 6150 p_init_elts, p_complete); 6151 } 6152 6153 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last 6154 of which had type LAST_TYPE. Each element was itself a complete 6155 initializer, in the sense that every meaningful byte was explicitly 6156 given a value. Return true if the same is true for the constructor 6157 as a whole. */ 6158 6159 bool 6160 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts, 6161 const_tree last_type) 6162 { 6163 if (TREE_CODE (type) == UNION_TYPE 6164 || TREE_CODE (type) == QUAL_UNION_TYPE) 6165 { 6166 if (num_elts == 0) 6167 return false; 6168 6169 gcc_assert (num_elts == 1 && last_type); 6170 6171 /* ??? We could look at each element of the union, and find the 6172 largest element. Which would avoid comparing the size of the 6173 initialized element against any tail padding in the union. 6174 Doesn't seem worth the effort... */ 6175 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1; 6176 } 6177 6178 return count_type_elements (type, true) == num_elts; 6179 } 6180 6181 /* Return 1 if EXP contains mostly (3/4) zeros. */ 6182 6183 static int 6184 mostly_zeros_p (const_tree exp) 6185 { 6186 if (TREE_CODE (exp) == CONSTRUCTOR) 6187 { 6188 HOST_WIDE_INT nz_elts, unz_elts, init_elts; 6189 bool complete_p; 6190 6191 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts, 6192 &complete_p); 6193 return !complete_p || nz_elts < init_elts / 4; 6194 } 6195 6196 return initializer_zerop (exp); 6197 } 6198 6199 /* Return 1 if EXP contains all zeros. */ 6200 6201 static int 6202 all_zeros_p (const_tree exp) 6203 { 6204 if (TREE_CODE (exp) == CONSTRUCTOR) 6205 { 6206 HOST_WIDE_INT nz_elts, unz_elts, init_elts; 6207 bool complete_p; 6208 6209 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts, 6210 &complete_p); 6211 return nz_elts == 0; 6212 } 6213 6214 return initializer_zerop (exp); 6215 } 6216 6217 /* Helper function for store_constructor. 6218 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field. 6219 CLEARED is as for store_constructor. 6220 ALIAS_SET is the alias set to use for any stores. 6221 If REVERSE is true, the store is to be done in reverse order. 6222 6223 This provides a recursive shortcut back to store_constructor when it isn't 6224 necessary to go through store_field. This is so that we can pass through 6225 the cleared field to let store_constructor know that we may not have to 6226 clear a substructure if the outer structure has already been cleared. */ 6227 6228 static void 6229 store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos, 6230 poly_uint64 bitregion_start, 6231 poly_uint64 bitregion_end, 6232 machine_mode mode, 6233 tree exp, int cleared, 6234 alias_set_type alias_set, bool reverse) 6235 { 6236 poly_int64 bytepos; 6237 poly_uint64 bytesize; 6238 if (TREE_CODE (exp) == CONSTRUCTOR 6239 /* We can only call store_constructor recursively if the size and 6240 bit position are on a byte boundary. */ 6241 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos) 6242 && maybe_ne (bitsize, 0U) 6243 && multiple_p (bitsize, BITS_PER_UNIT, &bytesize) 6244 /* If we have a nonzero bitpos for a register target, then we just 6245 let store_field do the bitfield handling. This is unlikely to 6246 generate unnecessary clear instructions anyways. */ 6247 && (known_eq (bitpos, 0) || MEM_P (target))) 6248 { 6249 if (MEM_P (target)) 6250 { 6251 machine_mode target_mode = GET_MODE (target); 6252 if (target_mode != BLKmode 6253 && !multiple_p (bitpos, GET_MODE_ALIGNMENT (target_mode))) 6254 target_mode = BLKmode; 6255 target = adjust_address (target, target_mode, bytepos); 6256 } 6257 6258 6259 /* Update the alias set, if required. */ 6260 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target) 6261 && MEM_ALIAS_SET (target) != 0) 6262 { 6263 target = copy_rtx (target); 6264 set_mem_alias_set (target, alias_set); 6265 } 6266 6267 store_constructor (exp, target, cleared, bytesize, reverse); 6268 } 6269 else 6270 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode, 6271 exp, alias_set, false, reverse); 6272 } 6273 6274 6275 /* Returns the number of FIELD_DECLs in TYPE. */ 6276 6277 static int 6278 fields_length (const_tree type) 6279 { 6280 tree t = TYPE_FIELDS (type); 6281 int count = 0; 6282 6283 for (; t; t = DECL_CHAIN (t)) 6284 if (TREE_CODE (t) == FIELD_DECL) 6285 ++count; 6286 6287 return count; 6288 } 6289 6290 6291 /* Store the value of constructor EXP into the rtx TARGET. 6292 TARGET is either a REG or a MEM; we know it cannot conflict, since 6293 safe_from_p has been called. 6294 CLEARED is true if TARGET is known to have been zero'd. 6295 SIZE is the number of bytes of TARGET we are allowed to modify: this 6296 may not be the same as the size of EXP if we are assigning to a field 6297 which has been packed to exclude padding bits. 6298 If REVERSE is true, the store is to be done in reverse order. */ 6299 6300 static void 6301 store_constructor (tree exp, rtx target, int cleared, poly_int64 size, 6302 bool reverse) 6303 { 6304 tree type = TREE_TYPE (exp); 6305 HOST_WIDE_INT exp_size = int_size_in_bytes (type); 6306 poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0; 6307 6308 switch (TREE_CODE (type)) 6309 { 6310 case RECORD_TYPE: 6311 case UNION_TYPE: 6312 case QUAL_UNION_TYPE: 6313 { 6314 unsigned HOST_WIDE_INT idx; 6315 tree field, value; 6316 6317 /* The storage order is specified for every aggregate type. */ 6318 reverse = TYPE_REVERSE_STORAGE_ORDER (type); 6319 6320 /* If size is zero or the target is already cleared, do nothing. */ 6321 if (known_eq (size, 0) || cleared) 6322 cleared = 1; 6323 /* We either clear the aggregate or indicate the value is dead. */ 6324 else if ((TREE_CODE (type) == UNION_TYPE 6325 || TREE_CODE (type) == QUAL_UNION_TYPE) 6326 && ! CONSTRUCTOR_ELTS (exp)) 6327 /* If the constructor is empty, clear the union. */ 6328 { 6329 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); 6330 cleared = 1; 6331 } 6332 6333 /* If we are building a static constructor into a register, 6334 set the initial value as zero so we can fold the value into 6335 a constant. But if more than one register is involved, 6336 this probably loses. */ 6337 else if (REG_P (target) && TREE_STATIC (exp) 6338 && known_le (GET_MODE_SIZE (GET_MODE (target)), 6339 REGMODE_NATURAL_SIZE (GET_MODE (target)))) 6340 { 6341 emit_move_insn (target, CONST0_RTX (GET_MODE (target))); 6342 cleared = 1; 6343 } 6344 6345 /* If the constructor has fewer fields than the structure or 6346 if we are initializing the structure to mostly zeros, clear 6347 the whole structure first. Don't do this if TARGET is a 6348 register whose mode size isn't equal to SIZE since 6349 clear_storage can't handle this case. */ 6350 else if (known_size_p (size) 6351 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type)) 6352 || mostly_zeros_p (exp)) 6353 && (!REG_P (target) 6354 || known_eq (GET_MODE_SIZE (GET_MODE (target)), size))) 6355 { 6356 clear_storage (target, gen_int_mode (size, Pmode), 6357 BLOCK_OP_NORMAL); 6358 cleared = 1; 6359 } 6360 6361 if (REG_P (target) && !cleared) 6362 emit_clobber (target); 6363 6364 /* Store each element of the constructor into the 6365 corresponding field of TARGET. */ 6366 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value) 6367 { 6368 machine_mode mode; 6369 HOST_WIDE_INT bitsize; 6370 HOST_WIDE_INT bitpos = 0; 6371 tree offset; 6372 rtx to_rtx = target; 6373 6374 /* Just ignore missing fields. We cleared the whole 6375 structure, above, if any fields are missing. */ 6376 if (field == 0) 6377 continue; 6378 6379 if (cleared && initializer_zerop (value)) 6380 continue; 6381 6382 if (tree_fits_uhwi_p (DECL_SIZE (field))) 6383 bitsize = tree_to_uhwi (DECL_SIZE (field)); 6384 else 6385 gcc_unreachable (); 6386 6387 mode = DECL_MODE (field); 6388 if (DECL_BIT_FIELD (field)) 6389 mode = VOIDmode; 6390 6391 offset = DECL_FIELD_OFFSET (field); 6392 if (tree_fits_shwi_p (offset) 6393 && tree_fits_shwi_p (bit_position (field))) 6394 { 6395 bitpos = int_bit_position (field); 6396 offset = NULL_TREE; 6397 } 6398 else 6399 gcc_unreachable (); 6400 6401 /* If this initializes a field that is smaller than a 6402 word, at the start of a word, try to widen it to a full 6403 word. This special case allows us to output C++ member 6404 function initializations in a form that the optimizers 6405 can understand. */ 6406 if (WORD_REGISTER_OPERATIONS 6407 && REG_P (target) 6408 && bitsize < BITS_PER_WORD 6409 && bitpos % BITS_PER_WORD == 0 6410 && GET_MODE_CLASS (mode) == MODE_INT 6411 && TREE_CODE (value) == INTEGER_CST 6412 && exp_size >= 0 6413 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT) 6414 { 6415 tree type = TREE_TYPE (value); 6416 6417 if (TYPE_PRECISION (type) < BITS_PER_WORD) 6418 { 6419 type = lang_hooks.types.type_for_mode 6420 (word_mode, TYPE_UNSIGNED (type)); 6421 value = fold_convert (type, value); 6422 /* Make sure the bits beyond the original bitsize are zero 6423 so that we can correctly avoid extra zeroing stores in 6424 later constructor elements. */ 6425 tree bitsize_mask 6426 = wide_int_to_tree (type, wi::mask (bitsize, false, 6427 BITS_PER_WORD)); 6428 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask); 6429 } 6430 6431 if (BYTES_BIG_ENDIAN) 6432 value 6433 = fold_build2 (LSHIFT_EXPR, type, value, 6434 build_int_cst (type, 6435 BITS_PER_WORD - bitsize)); 6436 bitsize = BITS_PER_WORD; 6437 mode = word_mode; 6438 } 6439 6440 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx) 6441 && DECL_NONADDRESSABLE_P (field)) 6442 { 6443 to_rtx = copy_rtx (to_rtx); 6444 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1; 6445 } 6446 6447 store_constructor_field (to_rtx, bitsize, bitpos, 6448 0, bitregion_end, mode, 6449 value, cleared, 6450 get_alias_set (TREE_TYPE (field)), 6451 reverse); 6452 } 6453 break; 6454 } 6455 case ARRAY_TYPE: 6456 { 6457 tree value, index; 6458 unsigned HOST_WIDE_INT i; 6459 int need_to_clear; 6460 tree domain; 6461 tree elttype = TREE_TYPE (type); 6462 int const_bounds_p; 6463 HOST_WIDE_INT minelt = 0; 6464 HOST_WIDE_INT maxelt = 0; 6465 6466 /* The storage order is specified for every aggregate type. */ 6467 reverse = TYPE_REVERSE_STORAGE_ORDER (type); 6468 6469 domain = TYPE_DOMAIN (type); 6470 const_bounds_p = (TYPE_MIN_VALUE (domain) 6471 && TYPE_MAX_VALUE (domain) 6472 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain)) 6473 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain))); 6474 6475 /* If we have constant bounds for the range of the type, get them. */ 6476 if (const_bounds_p) 6477 { 6478 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain)); 6479 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain)); 6480 } 6481 6482 /* If the constructor has fewer elements than the array, clear 6483 the whole array first. Similarly if this is static 6484 constructor of a non-BLKmode object. */ 6485 if (cleared) 6486 need_to_clear = 0; 6487 else if (REG_P (target) && TREE_STATIC (exp)) 6488 need_to_clear = 1; 6489 else 6490 { 6491 unsigned HOST_WIDE_INT idx; 6492 tree index, value; 6493 HOST_WIDE_INT count = 0, zero_count = 0; 6494 need_to_clear = ! const_bounds_p; 6495 6496 /* This loop is a more accurate version of the loop in 6497 mostly_zeros_p (it handles RANGE_EXPR in an index). It 6498 is also needed to check for missing elements. */ 6499 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value) 6500 { 6501 HOST_WIDE_INT this_node_count; 6502 6503 if (need_to_clear) 6504 break; 6505 6506 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) 6507 { 6508 tree lo_index = TREE_OPERAND (index, 0); 6509 tree hi_index = TREE_OPERAND (index, 1); 6510 6511 if (! tree_fits_uhwi_p (lo_index) 6512 || ! tree_fits_uhwi_p (hi_index)) 6513 { 6514 need_to_clear = 1; 6515 break; 6516 } 6517 6518 this_node_count = (tree_to_uhwi (hi_index) 6519 - tree_to_uhwi (lo_index) + 1); 6520 } 6521 else 6522 this_node_count = 1; 6523 6524 count += this_node_count; 6525 if (mostly_zeros_p (value)) 6526 zero_count += this_node_count; 6527 } 6528 6529 /* Clear the entire array first if there are any missing 6530 elements, or if the incidence of zero elements is >= 6531 75%. */ 6532 if (! need_to_clear 6533 && (count < maxelt - minelt + 1 6534 || 4 * zero_count >= 3 * count)) 6535 need_to_clear = 1; 6536 } 6537 6538 if (need_to_clear && maybe_gt (size, 0)) 6539 { 6540 if (REG_P (target)) 6541 emit_move_insn (target, CONST0_RTX (GET_MODE (target))); 6542 else 6543 clear_storage (target, gen_int_mode (size, Pmode), 6544 BLOCK_OP_NORMAL); 6545 cleared = 1; 6546 } 6547 6548 if (!cleared && REG_P (target)) 6549 /* Inform later passes that the old value is dead. */ 6550 emit_clobber (target); 6551 6552 /* Store each element of the constructor into the 6553 corresponding element of TARGET, determined by counting the 6554 elements. */ 6555 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value) 6556 { 6557 machine_mode mode; 6558 poly_int64 bitsize; 6559 HOST_WIDE_INT bitpos; 6560 rtx xtarget = target; 6561 6562 if (cleared && initializer_zerop (value)) 6563 continue; 6564 6565 mode = TYPE_MODE (elttype); 6566 if (mode != BLKmode) 6567 bitsize = GET_MODE_BITSIZE (mode); 6568 else if (!poly_int_tree_p (TYPE_SIZE (elttype), &bitsize)) 6569 bitsize = -1; 6570 6571 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR) 6572 { 6573 tree lo_index = TREE_OPERAND (index, 0); 6574 tree hi_index = TREE_OPERAND (index, 1); 6575 rtx index_r, pos_rtx; 6576 HOST_WIDE_INT lo, hi, count; 6577 tree position; 6578 6579 /* If the range is constant and "small", unroll the loop. */ 6580 if (const_bounds_p 6581 && tree_fits_shwi_p (lo_index) 6582 && tree_fits_shwi_p (hi_index) 6583 && (lo = tree_to_shwi (lo_index), 6584 hi = tree_to_shwi (hi_index), 6585 count = hi - lo + 1, 6586 (!MEM_P (target) 6587 || count <= 2 6588 || (tree_fits_uhwi_p (TYPE_SIZE (elttype)) 6589 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count 6590 <= 40 * 8))))) 6591 { 6592 lo -= minelt; hi -= minelt; 6593 for (; lo <= hi; lo++) 6594 { 6595 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype)); 6596 6597 if (MEM_P (target) 6598 && !MEM_KEEP_ALIAS_SET_P (target) 6599 && TREE_CODE (type) == ARRAY_TYPE 6600 && TYPE_NONALIASED_COMPONENT (type)) 6601 { 6602 target = copy_rtx (target); 6603 MEM_KEEP_ALIAS_SET_P (target) = 1; 6604 } 6605 6606 store_constructor_field 6607 (target, bitsize, bitpos, 0, bitregion_end, 6608 mode, value, cleared, 6609 get_alias_set (elttype), reverse); 6610 } 6611 } 6612 else 6613 { 6614 rtx_code_label *loop_start = gen_label_rtx (); 6615 rtx_code_label *loop_end = gen_label_rtx (); 6616 tree exit_cond; 6617 6618 expand_normal (hi_index); 6619 6620 index = build_decl (EXPR_LOCATION (exp), 6621 VAR_DECL, NULL_TREE, domain); 6622 index_r = gen_reg_rtx (promote_decl_mode (index, NULL)); 6623 SET_DECL_RTL (index, index_r); 6624 store_expr (lo_index, index_r, 0, false, reverse); 6625 6626 /* Build the head of the loop. */ 6627 do_pending_stack_adjust (); 6628 emit_label (loop_start); 6629 6630 /* Assign value to element index. */ 6631 position = 6632 fold_convert (ssizetype, 6633 fold_build2 (MINUS_EXPR, 6634 TREE_TYPE (index), 6635 index, 6636 TYPE_MIN_VALUE (domain))); 6637 6638 position = 6639 size_binop (MULT_EXPR, position, 6640 fold_convert (ssizetype, 6641 TYPE_SIZE_UNIT (elttype))); 6642 6643 pos_rtx = expand_normal (position); 6644 xtarget = offset_address (target, pos_rtx, 6645 highest_pow2_factor (position)); 6646 xtarget = adjust_address (xtarget, mode, 0); 6647 if (TREE_CODE (value) == CONSTRUCTOR) 6648 store_constructor (value, xtarget, cleared, 6649 exact_div (bitsize, BITS_PER_UNIT), 6650 reverse); 6651 else 6652 store_expr (value, xtarget, 0, false, reverse); 6653 6654 /* Generate a conditional jump to exit the loop. */ 6655 exit_cond = build2 (LT_EXPR, integer_type_node, 6656 index, hi_index); 6657 jumpif (exit_cond, loop_end, 6658 profile_probability::uninitialized ()); 6659 6660 /* Update the loop counter, and jump to the head of 6661 the loop. */ 6662 expand_assignment (index, 6663 build2 (PLUS_EXPR, TREE_TYPE (index), 6664 index, integer_one_node), 6665 false); 6666 6667 emit_jump (loop_start); 6668 6669 /* Build the end of the loop. */ 6670 emit_label (loop_end); 6671 } 6672 } 6673 else if ((index != 0 && ! tree_fits_shwi_p (index)) 6674 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype))) 6675 { 6676 tree position; 6677 6678 if (index == 0) 6679 index = ssize_int (1); 6680 6681 if (minelt) 6682 index = fold_convert (ssizetype, 6683 fold_build2 (MINUS_EXPR, 6684 TREE_TYPE (index), 6685 index, 6686 TYPE_MIN_VALUE (domain))); 6687 6688 position = 6689 size_binop (MULT_EXPR, index, 6690 fold_convert (ssizetype, 6691 TYPE_SIZE_UNIT (elttype))); 6692 xtarget = offset_address (target, 6693 expand_normal (position), 6694 highest_pow2_factor (position)); 6695 xtarget = adjust_address (xtarget, mode, 0); 6696 store_expr (value, xtarget, 0, false, reverse); 6697 } 6698 else 6699 { 6700 if (index != 0) 6701 bitpos = ((tree_to_shwi (index) - minelt) 6702 * tree_to_uhwi (TYPE_SIZE (elttype))); 6703 else 6704 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype))); 6705 6706 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target) 6707 && TREE_CODE (type) == ARRAY_TYPE 6708 && TYPE_NONALIASED_COMPONENT (type)) 6709 { 6710 target = copy_rtx (target); 6711 MEM_KEEP_ALIAS_SET_P (target) = 1; 6712 } 6713 store_constructor_field (target, bitsize, bitpos, 0, 6714 bitregion_end, mode, value, 6715 cleared, get_alias_set (elttype), 6716 reverse); 6717 } 6718 } 6719 break; 6720 } 6721 6722 case VECTOR_TYPE: 6723 { 6724 unsigned HOST_WIDE_INT idx; 6725 constructor_elt *ce; 6726 int i; 6727 int need_to_clear; 6728 insn_code icode = CODE_FOR_nothing; 6729 tree elt; 6730 tree elttype = TREE_TYPE (type); 6731 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype)); 6732 machine_mode eltmode = TYPE_MODE (elttype); 6733 HOST_WIDE_INT bitsize; 6734 HOST_WIDE_INT bitpos; 6735 rtvec vector = NULL; 6736 poly_uint64 n_elts; 6737 unsigned HOST_WIDE_INT const_n_elts; 6738 alias_set_type alias; 6739 bool vec_vec_init_p = false; 6740 machine_mode mode = GET_MODE (target); 6741 6742 gcc_assert (eltmode != BLKmode); 6743 6744 /* Try using vec_duplicate_optab for uniform vectors. */ 6745 if (!TREE_SIDE_EFFECTS (exp) 6746 && VECTOR_MODE_P (mode) 6747 && eltmode == GET_MODE_INNER (mode) 6748 && ((icode = optab_handler (vec_duplicate_optab, mode)) 6749 != CODE_FOR_nothing) 6750 && (elt = uniform_vector_p (exp))) 6751 { 6752 struct expand_operand ops[2]; 6753 create_output_operand (&ops[0], target, mode); 6754 create_input_operand (&ops[1], expand_normal (elt), eltmode); 6755 expand_insn (icode, 2, ops); 6756 if (!rtx_equal_p (target, ops[0].value)) 6757 emit_move_insn (target, ops[0].value); 6758 break; 6759 } 6760 6761 n_elts = TYPE_VECTOR_SUBPARTS (type); 6762 if (REG_P (target) 6763 && VECTOR_MODE_P (mode) 6764 && n_elts.is_constant (&const_n_elts)) 6765 { 6766 machine_mode emode = eltmode; 6767 6768 if (CONSTRUCTOR_NELTS (exp) 6769 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value)) 6770 == VECTOR_TYPE)) 6771 { 6772 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value); 6773 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp) 6774 * TYPE_VECTOR_SUBPARTS (etype), 6775 n_elts)); 6776 emode = TYPE_MODE (etype); 6777 } 6778 icode = convert_optab_handler (vec_init_optab, mode, emode); 6779 if (icode != CODE_FOR_nothing) 6780 { 6781 unsigned int i, n = const_n_elts; 6782 6783 if (emode != eltmode) 6784 { 6785 n = CONSTRUCTOR_NELTS (exp); 6786 vec_vec_init_p = true; 6787 } 6788 vector = rtvec_alloc (n); 6789 for (i = 0; i < n; i++) 6790 RTVEC_ELT (vector, i) = CONST0_RTX (emode); 6791 } 6792 } 6793 6794 /* If the constructor has fewer elements than the vector, 6795 clear the whole array first. Similarly if this is static 6796 constructor of a non-BLKmode object. */ 6797 if (cleared) 6798 need_to_clear = 0; 6799 else if (REG_P (target) && TREE_STATIC (exp)) 6800 need_to_clear = 1; 6801 else 6802 { 6803 unsigned HOST_WIDE_INT count = 0, zero_count = 0; 6804 tree value; 6805 6806 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) 6807 { 6808 tree sz = TYPE_SIZE (TREE_TYPE (value)); 6809 int n_elts_here 6810 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz, 6811 TYPE_SIZE (elttype))); 6812 6813 count += n_elts_here; 6814 if (mostly_zeros_p (value)) 6815 zero_count += n_elts_here; 6816 } 6817 6818 /* Clear the entire vector first if there are any missing elements, 6819 or if the incidence of zero elements is >= 75%. */ 6820 need_to_clear = (maybe_lt (count, n_elts) 6821 || 4 * zero_count >= 3 * count); 6822 } 6823 6824 if (need_to_clear && maybe_gt (size, 0) && !vector) 6825 { 6826 if (REG_P (target)) 6827 emit_move_insn (target, CONST0_RTX (mode)); 6828 else 6829 clear_storage (target, gen_int_mode (size, Pmode), 6830 BLOCK_OP_NORMAL); 6831 cleared = 1; 6832 } 6833 6834 /* Inform later passes that the old value is dead. */ 6835 if (!cleared && !vector && REG_P (target)) 6836 emit_move_insn (target, CONST0_RTX (mode)); 6837 6838 if (MEM_P (target)) 6839 alias = MEM_ALIAS_SET (target); 6840 else 6841 alias = get_alias_set (elttype); 6842 6843 /* Store each element of the constructor into the corresponding 6844 element of TARGET, determined by counting the elements. */ 6845 for (idx = 0, i = 0; 6846 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce); 6847 idx++, i += bitsize / elt_size) 6848 { 6849 HOST_WIDE_INT eltpos; 6850 tree value = ce->value; 6851 6852 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value))); 6853 if (cleared && initializer_zerop (value)) 6854 continue; 6855 6856 if (ce->index) 6857 eltpos = tree_to_uhwi (ce->index); 6858 else 6859 eltpos = i; 6860 6861 if (vector) 6862 { 6863 if (vec_vec_init_p) 6864 { 6865 gcc_assert (ce->index == NULL_TREE); 6866 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE); 6867 eltpos = idx; 6868 } 6869 else 6870 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE); 6871 RTVEC_ELT (vector, eltpos) = expand_normal (value); 6872 } 6873 else 6874 { 6875 machine_mode value_mode 6876 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE 6877 ? TYPE_MODE (TREE_TYPE (value)) : eltmode); 6878 bitpos = eltpos * elt_size; 6879 store_constructor_field (target, bitsize, bitpos, 0, 6880 bitregion_end, value_mode, 6881 value, cleared, alias, reverse); 6882 } 6883 } 6884 6885 if (vector) 6886 emit_insn (GEN_FCN (icode) (target, 6887 gen_rtx_PARALLEL (mode, vector))); 6888 break; 6889 } 6890 6891 default: 6892 gcc_unreachable (); 6893 } 6894 } 6895 6896 /* Store the value of EXP (an expression tree) 6897 into a subfield of TARGET which has mode MODE and occupies 6898 BITSIZE bits, starting BITPOS bits from the start of TARGET. 6899 If MODE is VOIDmode, it means that we are storing into a bit-field. 6900 6901 BITREGION_START is bitpos of the first bitfield in this region. 6902 BITREGION_END is the bitpos of the ending bitfield in this region. 6903 These two fields are 0, if the C++ memory model does not apply, 6904 or we are not interested in keeping track of bitfield regions. 6905 6906 Always return const0_rtx unless we have something particular to 6907 return. 6908 6909 ALIAS_SET is the alias set for the destination. This value will 6910 (in general) be different from that for TARGET, since TARGET is a 6911 reference to the containing structure. 6912 6913 If NONTEMPORAL is true, try generating a nontemporal store. 6914 6915 If REVERSE is true, the store is to be done in reverse order. */ 6916 6917 static rtx 6918 store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos, 6919 poly_uint64 bitregion_start, poly_uint64 bitregion_end, 6920 machine_mode mode, tree exp, 6921 alias_set_type alias_set, bool nontemporal, bool reverse) 6922 { 6923 if (TREE_CODE (exp) == ERROR_MARK) 6924 return const0_rtx; 6925 6926 /* If we have nothing to store, do nothing unless the expression has 6927 side-effects. Don't do that for zero sized addressable lhs of 6928 calls. */ 6929 if (known_eq (bitsize, 0) 6930 && (!TREE_ADDRESSABLE (TREE_TYPE (exp)) 6931 || TREE_CODE (exp) != CALL_EXPR)) 6932 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL); 6933 6934 if (GET_CODE (target) == CONCAT) 6935 { 6936 /* We're storing into a struct containing a single __complex. */ 6937 6938 gcc_assert (known_eq (bitpos, 0)); 6939 return store_expr (exp, target, 0, nontemporal, reverse); 6940 } 6941 6942 /* If the structure is in a register or if the component 6943 is a bit field, we cannot use addressing to access it. 6944 Use bit-field techniques or SUBREG to store in it. */ 6945 6946 poly_int64 decl_bitsize; 6947 if (mode == VOIDmode 6948 || (mode != BLKmode && ! direct_store[(int) mode] 6949 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT 6950 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) 6951 || REG_P (target) 6952 || GET_CODE (target) == SUBREG 6953 /* If the field isn't aligned enough to store as an ordinary memref, 6954 store it as a bit field. */ 6955 || (mode != BLKmode 6956 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode)) 6957 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode))) 6958 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target))) 6959 || !multiple_p (bitpos, BITS_PER_UNIT))) 6960 || (known_size_p (bitsize) 6961 && mode != BLKmode 6962 && maybe_gt (GET_MODE_BITSIZE (mode), bitsize)) 6963 /* If the RHS and field are a constant size and the size of the 6964 RHS isn't the same size as the bitfield, we must use bitfield 6965 operations. */ 6966 || (known_size_p (bitsize) 6967 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp))) 6968 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))), 6969 bitsize) 6970 /* Except for initialization of full bytes from a CONSTRUCTOR, which 6971 we will handle specially below. */ 6972 && !(TREE_CODE (exp) == CONSTRUCTOR 6973 && multiple_p (bitsize, BITS_PER_UNIT)) 6974 /* And except for bitwise copying of TREE_ADDRESSABLE types, 6975 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp) 6976 includes some extra padding. store_expr / expand_expr will in 6977 that case call get_inner_reference that will have the bitsize 6978 we check here and thus the block move will not clobber the 6979 padding that shouldn't be clobbered. In the future we could 6980 replace the TREE_ADDRESSABLE check with a check that 6981 get_base_address needs to live in memory. */ 6982 && (!TREE_ADDRESSABLE (TREE_TYPE (exp)) 6983 || TREE_CODE (exp) != COMPONENT_REF 6984 || !multiple_p (bitsize, BITS_PER_UNIT) 6985 || !multiple_p (bitpos, BITS_PER_UNIT) 6986 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)), 6987 &decl_bitsize) 6988 || maybe_ne (decl_bitsize, bitsize))) 6989 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable 6990 decl we must use bitfield operations. */ 6991 || (known_size_p (bitsize) 6992 && TREE_CODE (exp) == MEM_REF 6993 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR 6994 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) 6995 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) 6996 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode)) 6997 { 6998 rtx temp; 6999 gimple *nop_def; 7000 7001 /* If EXP is a NOP_EXPR of precision less than its mode, then that 7002 implies a mask operation. If the precision is the same size as 7003 the field we're storing into, that mask is redundant. This is 7004 particularly common with bit field assignments generated by the 7005 C front end. */ 7006 nop_def = get_def_for_expr (exp, NOP_EXPR); 7007 if (nop_def) 7008 { 7009 tree type = TREE_TYPE (exp); 7010 if (INTEGRAL_TYPE_P (type) 7011 && maybe_ne (TYPE_PRECISION (type), 7012 GET_MODE_BITSIZE (TYPE_MODE (type))) 7013 && known_eq (bitsize, TYPE_PRECISION (type))) 7014 { 7015 tree op = gimple_assign_rhs1 (nop_def); 7016 type = TREE_TYPE (op); 7017 if (INTEGRAL_TYPE_P (type) 7018 && known_ge (TYPE_PRECISION (type), bitsize)) 7019 exp = op; 7020 } 7021 } 7022 7023 temp = expand_normal (exp); 7024 7025 /* We don't support variable-sized BLKmode bitfields, since our 7026 handling of BLKmode is bound up with the ability to break 7027 things into words. */ 7028 gcc_assert (mode != BLKmode || bitsize.is_constant ()); 7029 7030 /* Handle calls that return values in multiple non-contiguous locations. 7031 The Irix 6 ABI has examples of this. */ 7032 if (GET_CODE (temp) == PARALLEL) 7033 { 7034 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); 7035 machine_mode temp_mode = GET_MODE (temp); 7036 if (temp_mode == BLKmode || temp_mode == VOIDmode) 7037 temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT); 7038 rtx temp_target = gen_reg_rtx (temp_mode); 7039 emit_group_store (temp_target, temp, TREE_TYPE (exp), size); 7040 temp = temp_target; 7041 } 7042 7043 /* Handle calls that return BLKmode values in registers. */ 7044 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR) 7045 { 7046 rtx temp_target = gen_reg_rtx (GET_MODE (temp)); 7047 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp)); 7048 temp = temp_target; 7049 } 7050 7051 /* If the value has aggregate type and an integral mode then, if BITSIZE 7052 is narrower than this mode and this is for big-endian data, we first 7053 need to put the value into the low-order bits for store_bit_field, 7054 except when MODE is BLKmode and BITSIZE larger than the word size 7055 (see the handling of fields larger than a word in store_bit_field). 7056 Moreover, the field may be not aligned on a byte boundary; in this 7057 case, if it has reverse storage order, it needs to be accessed as a 7058 scalar field with reverse storage order and we must first put the 7059 value into target order. */ 7060 scalar_int_mode temp_mode; 7061 if (AGGREGATE_TYPE_P (TREE_TYPE (exp)) 7062 && is_int_mode (GET_MODE (temp), &temp_mode)) 7063 { 7064 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode); 7065 7066 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp)); 7067 7068 if (reverse) 7069 temp = flip_storage_order (temp_mode, temp); 7070 7071 gcc_checking_assert (known_le (bitsize, size)); 7072 if (maybe_lt (bitsize, size) 7073 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN 7074 /* Use of to_constant for BLKmode was checked above. */ 7075 && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD)) 7076 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp, 7077 size - bitsize, NULL_RTX, 1); 7078 } 7079 7080 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */ 7081 if (mode != VOIDmode && mode != BLKmode 7082 && mode != TYPE_MODE (TREE_TYPE (exp))) 7083 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1); 7084 7085 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory 7086 and BITPOS must be aligned on a byte boundary. If so, we simply do 7087 a block copy. Likewise for a BLKmode-like TARGET. */ 7088 if (GET_MODE (temp) == BLKmode 7089 && (GET_MODE (target) == BLKmode 7090 || (MEM_P (target) 7091 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT 7092 && multiple_p (bitpos, BITS_PER_UNIT) 7093 && multiple_p (bitsize, BITS_PER_UNIT)))) 7094 { 7095 gcc_assert (MEM_P (target) && MEM_P (temp)); 7096 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT); 7097 poly_int64 bytesize = bits_to_bytes_round_up (bitsize); 7098 7099 target = adjust_address (target, VOIDmode, bytepos); 7100 emit_block_move (target, temp, 7101 gen_int_mode (bytesize, Pmode), 7102 BLOCK_OP_NORMAL); 7103 7104 return const0_rtx; 7105 } 7106 7107 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the 7108 word size, we need to load the value (see again store_bit_field). */ 7109 if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD)) 7110 { 7111 scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize); 7112 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode, 7113 temp_mode, false, NULL); 7114 } 7115 7116 /* Store the value in the bitfield. */ 7117 gcc_checking_assert (known_ge (bitpos, 0)); 7118 store_bit_field (target, bitsize, bitpos, 7119 bitregion_start, bitregion_end, 7120 mode, temp, reverse); 7121 7122 return const0_rtx; 7123 } 7124 else 7125 { 7126 /* Now build a reference to just the desired component. */ 7127 rtx to_rtx = adjust_address (target, mode, 7128 exact_div (bitpos, BITS_PER_UNIT)); 7129 7130 if (to_rtx == target) 7131 to_rtx = copy_rtx (to_rtx); 7132 7133 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0) 7134 set_mem_alias_set (to_rtx, alias_set); 7135 7136 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR 7137 into a target smaller than its type; handle that case now. */ 7138 if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (bitsize)) 7139 { 7140 poly_int64 bytesize = exact_div (bitsize, BITS_PER_UNIT); 7141 store_constructor (exp, to_rtx, 0, bytesize, reverse); 7142 return to_rtx; 7143 } 7144 7145 return store_expr (exp, to_rtx, 0, nontemporal, reverse); 7146 } 7147 } 7148 7149 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF, 7150 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these 7151 codes and find the ultimate containing object, which we return. 7152 7153 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the 7154 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the 7155 storage order of the field. 7156 If the position of the field is variable, we store a tree 7157 giving the variable offset (in units) in *POFFSET. 7158 This offset is in addition to the bit position. 7159 If the position is not variable, we store 0 in *POFFSET. 7160 7161 If any of the extraction expressions is volatile, 7162 we store 1 in *PVOLATILEP. Otherwise we don't change that. 7163 7164 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode. 7165 Otherwise, it is a mode that can be used to access the field. 7166 7167 If the field describes a variable-sized object, *PMODE is set to 7168 BLKmode and *PBITSIZE is set to -1. An access cannot be made in 7169 this case, but the address of the object can be found. */ 7170 7171 tree 7172 get_inner_reference (tree exp, poly_int64_pod *pbitsize, 7173 poly_int64_pod *pbitpos, tree *poffset, 7174 machine_mode *pmode, int *punsignedp, 7175 int *preversep, int *pvolatilep) 7176 { 7177 tree size_tree = 0; 7178 machine_mode mode = VOIDmode; 7179 bool blkmode_bitfield = false; 7180 tree offset = size_zero_node; 7181 poly_offset_int bit_offset = 0; 7182 7183 /* First get the mode, signedness, storage order and size. We do this from 7184 just the outermost expression. */ 7185 *pbitsize = -1; 7186 if (TREE_CODE (exp) == COMPONENT_REF) 7187 { 7188 tree field = TREE_OPERAND (exp, 1); 7189 size_tree = DECL_SIZE (field); 7190 if (flag_strict_volatile_bitfields > 0 7191 && TREE_THIS_VOLATILE (exp) 7192 && DECL_BIT_FIELD_TYPE (field) 7193 && DECL_MODE (field) != BLKmode) 7194 /* Volatile bitfields should be accessed in the mode of the 7195 field's type, not the mode computed based on the bit 7196 size. */ 7197 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field)); 7198 else if (!DECL_BIT_FIELD (field)) 7199 { 7200 mode = DECL_MODE (field); 7201 /* For vector fields re-check the target flags, as DECL_MODE 7202 could have been set with different target flags than 7203 the current function has. */ 7204 if (mode == BLKmode 7205 && VECTOR_TYPE_P (TREE_TYPE (field)) 7206 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field)))) 7207 mode = TYPE_MODE (TREE_TYPE (field)); 7208 } 7209 else if (DECL_MODE (field) == BLKmode) 7210 blkmode_bitfield = true; 7211 7212 *punsignedp = DECL_UNSIGNED (field); 7213 } 7214 else if (TREE_CODE (exp) == BIT_FIELD_REF) 7215 { 7216 size_tree = TREE_OPERAND (exp, 1); 7217 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp)) 7218 || TYPE_UNSIGNED (TREE_TYPE (exp))); 7219 7220 /* For vector types, with the correct size of access, use the mode of 7221 inner type. */ 7222 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE 7223 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))) 7224 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp)))) 7225 mode = TYPE_MODE (TREE_TYPE (exp)); 7226 } 7227 else 7228 { 7229 mode = TYPE_MODE (TREE_TYPE (exp)); 7230 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp)); 7231 7232 if (mode == BLKmode) 7233 size_tree = TYPE_SIZE (TREE_TYPE (exp)); 7234 else 7235 *pbitsize = GET_MODE_BITSIZE (mode); 7236 } 7237 7238 if (size_tree != 0) 7239 { 7240 if (! tree_fits_uhwi_p (size_tree)) 7241 mode = BLKmode, *pbitsize = -1; 7242 else 7243 *pbitsize = tree_to_uhwi (size_tree); 7244 } 7245 7246 *preversep = reverse_storage_order_for_component_p (exp); 7247 7248 /* Compute cumulative bit-offset for nested component-refs and array-refs, 7249 and find the ultimate containing object. */ 7250 while (1) 7251 { 7252 switch (TREE_CODE (exp)) 7253 { 7254 case BIT_FIELD_REF: 7255 bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2)); 7256 break; 7257 7258 case COMPONENT_REF: 7259 { 7260 tree field = TREE_OPERAND (exp, 1); 7261 tree this_offset = component_ref_field_offset (exp); 7262 7263 /* If this field hasn't been filled in yet, don't go past it. 7264 This should only happen when folding expressions made during 7265 type construction. */ 7266 if (this_offset == 0) 7267 break; 7268 7269 offset = size_binop (PLUS_EXPR, offset, this_offset); 7270 bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field)); 7271 7272 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */ 7273 } 7274 break; 7275 7276 case ARRAY_REF: 7277 case ARRAY_RANGE_REF: 7278 { 7279 tree index = TREE_OPERAND (exp, 1); 7280 tree low_bound = array_ref_low_bound (exp); 7281 tree unit_size = array_ref_element_size (exp); 7282 7283 /* We assume all arrays have sizes that are a multiple of a byte. 7284 First subtract the lower bound, if any, in the type of the 7285 index, then convert to sizetype and multiply by the size of 7286 the array element. */ 7287 if (! integer_zerop (low_bound)) 7288 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index), 7289 index, low_bound); 7290 7291 offset = size_binop (PLUS_EXPR, offset, 7292 size_binop (MULT_EXPR, 7293 fold_convert (sizetype, index), 7294 unit_size)); 7295 } 7296 break; 7297 7298 case REALPART_EXPR: 7299 break; 7300 7301 case IMAGPART_EXPR: 7302 bit_offset += *pbitsize; 7303 break; 7304 7305 case VIEW_CONVERT_EXPR: 7306 break; 7307 7308 case MEM_REF: 7309 /* Hand back the decl for MEM[&decl, off]. */ 7310 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR) 7311 { 7312 tree off = TREE_OPERAND (exp, 1); 7313 if (!integer_zerop (off)) 7314 { 7315 poly_offset_int boff = mem_ref_offset (exp); 7316 boff <<= LOG2_BITS_PER_UNIT; 7317 bit_offset += boff; 7318 } 7319 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0); 7320 } 7321 goto done; 7322 7323 default: 7324 goto done; 7325 } 7326 7327 /* If any reference in the chain is volatile, the effect is volatile. */ 7328 if (TREE_THIS_VOLATILE (exp)) 7329 *pvolatilep = 1; 7330 7331 exp = TREE_OPERAND (exp, 0); 7332 } 7333 done: 7334 7335 /* If OFFSET is constant, see if we can return the whole thing as a 7336 constant bit position. Make sure to handle overflow during 7337 this conversion. */ 7338 if (poly_int_tree_p (offset)) 7339 { 7340 poly_offset_int tem = wi::sext (wi::to_poly_offset (offset), 7341 TYPE_PRECISION (sizetype)); 7342 tem <<= LOG2_BITS_PER_UNIT; 7343 tem += bit_offset; 7344 if (tem.to_shwi (pbitpos)) 7345 *poffset = offset = NULL_TREE; 7346 } 7347 7348 /* Otherwise, split it up. */ 7349 if (offset) 7350 { 7351 /* Avoid returning a negative bitpos as this may wreak havoc later. */ 7352 if (!bit_offset.to_shwi (pbitpos) || maybe_lt (*pbitpos, 0)) 7353 { 7354 *pbitpos = num_trailing_bits (bit_offset.force_shwi ()); 7355 poly_offset_int bytes = bits_to_bytes_round_down (bit_offset); 7356 offset = size_binop (PLUS_EXPR, offset, 7357 build_int_cst (sizetype, bytes.force_shwi ())); 7358 } 7359 7360 *poffset = offset; 7361 } 7362 7363 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */ 7364 if (mode == VOIDmode 7365 && blkmode_bitfield 7366 && multiple_p (*pbitpos, BITS_PER_UNIT) 7367 && multiple_p (*pbitsize, BITS_PER_UNIT)) 7368 *pmode = BLKmode; 7369 else 7370 *pmode = mode; 7371 7372 return exp; 7373 } 7374 7375 /* Alignment in bits the TARGET of an assignment may be assumed to have. */ 7376 7377 static unsigned HOST_WIDE_INT 7378 target_align (const_tree target) 7379 { 7380 /* We might have a chain of nested references with intermediate misaligning 7381 bitfields components, so need to recurse to find out. */ 7382 7383 unsigned HOST_WIDE_INT this_align, outer_align; 7384 7385 switch (TREE_CODE (target)) 7386 { 7387 case BIT_FIELD_REF: 7388 return 1; 7389 7390 case COMPONENT_REF: 7391 this_align = DECL_ALIGN (TREE_OPERAND (target, 1)); 7392 outer_align = target_align (TREE_OPERAND (target, 0)); 7393 return MIN (this_align, outer_align); 7394 7395 case ARRAY_REF: 7396 case ARRAY_RANGE_REF: 7397 this_align = TYPE_ALIGN (TREE_TYPE (target)); 7398 outer_align = target_align (TREE_OPERAND (target, 0)); 7399 return MIN (this_align, outer_align); 7400 7401 CASE_CONVERT: 7402 case NON_LVALUE_EXPR: 7403 case VIEW_CONVERT_EXPR: 7404 this_align = TYPE_ALIGN (TREE_TYPE (target)); 7405 outer_align = target_align (TREE_OPERAND (target, 0)); 7406 return MAX (this_align, outer_align); 7407 7408 default: 7409 return TYPE_ALIGN (TREE_TYPE (target)); 7410 } 7411 } 7412 7413 7414 /* Given an rtx VALUE that may contain additions and multiplications, return 7415 an equivalent value that just refers to a register, memory, or constant. 7416 This is done by generating instructions to perform the arithmetic and 7417 returning a pseudo-register containing the value. 7418 7419 The returned value may be a REG, SUBREG, MEM or constant. */ 7420 7421 rtx 7422 force_operand (rtx value, rtx target) 7423 { 7424 rtx op1, op2; 7425 /* Use subtarget as the target for operand 0 of a binary operation. */ 7426 rtx subtarget = get_subtarget (target); 7427 enum rtx_code code = GET_CODE (value); 7428 7429 /* Check for subreg applied to an expression produced by loop optimizer. */ 7430 if (code == SUBREG 7431 && !REG_P (SUBREG_REG (value)) 7432 && !MEM_P (SUBREG_REG (value))) 7433 { 7434 value 7435 = simplify_gen_subreg (GET_MODE (value), 7436 force_reg (GET_MODE (SUBREG_REG (value)), 7437 force_operand (SUBREG_REG (value), 7438 NULL_RTX)), 7439 GET_MODE (SUBREG_REG (value)), 7440 SUBREG_BYTE (value)); 7441 code = GET_CODE (value); 7442 } 7443 7444 /* Check for a PIC address load. */ 7445 if ((code == PLUS || code == MINUS) 7446 && XEXP (value, 0) == pic_offset_table_rtx 7447 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF 7448 || GET_CODE (XEXP (value, 1)) == LABEL_REF 7449 || GET_CODE (XEXP (value, 1)) == CONST)) 7450 { 7451 if (!subtarget) 7452 subtarget = gen_reg_rtx (GET_MODE (value)); 7453 emit_move_insn (subtarget, value); 7454 return subtarget; 7455 } 7456 7457 if (ARITHMETIC_P (value)) 7458 { 7459 op2 = XEXP (value, 1); 7460 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget)) 7461 subtarget = 0; 7462 if (code == MINUS && CONST_INT_P (op2)) 7463 { 7464 code = PLUS; 7465 op2 = negate_rtx (GET_MODE (value), op2); 7466 } 7467 7468 /* Check for an addition with OP2 a constant integer and our first 7469 operand a PLUS of a virtual register and something else. In that 7470 case, we want to emit the sum of the virtual register and the 7471 constant first and then add the other value. This allows virtual 7472 register instantiation to simply modify the constant rather than 7473 creating another one around this addition. */ 7474 if (code == PLUS && CONST_INT_P (op2) 7475 && GET_CODE (XEXP (value, 0)) == PLUS 7476 && REG_P (XEXP (XEXP (value, 0), 0)) 7477 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER 7478 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER) 7479 { 7480 rtx temp = expand_simple_binop (GET_MODE (value), code, 7481 XEXP (XEXP (value, 0), 0), op2, 7482 subtarget, 0, OPTAB_LIB_WIDEN); 7483 return expand_simple_binop (GET_MODE (value), code, temp, 7484 force_operand (XEXP (XEXP (value, 7485 0), 1), 0), 7486 target, 0, OPTAB_LIB_WIDEN); 7487 } 7488 7489 op1 = force_operand (XEXP (value, 0), subtarget); 7490 op2 = force_operand (op2, NULL_RTX); 7491 switch (code) 7492 { 7493 case MULT: 7494 return expand_mult (GET_MODE (value), op1, op2, target, 1); 7495 case DIV: 7496 if (!INTEGRAL_MODE_P (GET_MODE (value))) 7497 return expand_simple_binop (GET_MODE (value), code, op1, op2, 7498 target, 1, OPTAB_LIB_WIDEN); 7499 else 7500 return expand_divmod (0, 7501 FLOAT_MODE_P (GET_MODE (value)) 7502 ? RDIV_EXPR : TRUNC_DIV_EXPR, 7503 GET_MODE (value), op1, op2, target, 0); 7504 case MOD: 7505 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, 7506 target, 0); 7507 case UDIV: 7508 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2, 7509 target, 1); 7510 case UMOD: 7511 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2, 7512 target, 1); 7513 case ASHIFTRT: 7514 return expand_simple_binop (GET_MODE (value), code, op1, op2, 7515 target, 0, OPTAB_LIB_WIDEN); 7516 default: 7517 return expand_simple_binop (GET_MODE (value), code, op1, op2, 7518 target, 1, OPTAB_LIB_WIDEN); 7519 } 7520 } 7521 if (UNARY_P (value)) 7522 { 7523 if (!target) 7524 target = gen_reg_rtx (GET_MODE (value)); 7525 op1 = force_operand (XEXP (value, 0), NULL_RTX); 7526 switch (code) 7527 { 7528 case ZERO_EXTEND: 7529 case SIGN_EXTEND: 7530 case TRUNCATE: 7531 case FLOAT_EXTEND: 7532 case FLOAT_TRUNCATE: 7533 convert_move (target, op1, code == ZERO_EXTEND); 7534 return target; 7535 7536 case FIX: 7537 case UNSIGNED_FIX: 7538 expand_fix (target, op1, code == UNSIGNED_FIX); 7539 return target; 7540 7541 case FLOAT: 7542 case UNSIGNED_FLOAT: 7543 expand_float (target, op1, code == UNSIGNED_FLOAT); 7544 return target; 7545 7546 default: 7547 return expand_simple_unop (GET_MODE (value), code, op1, target, 0); 7548 } 7549 } 7550 7551 #ifdef INSN_SCHEDULING 7552 /* On machines that have insn scheduling, we want all memory reference to be 7553 explicit, so we need to deal with such paradoxical SUBREGs. */ 7554 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value))) 7555 value 7556 = simplify_gen_subreg (GET_MODE (value), 7557 force_reg (GET_MODE (SUBREG_REG (value)), 7558 force_operand (SUBREG_REG (value), 7559 NULL_RTX)), 7560 GET_MODE (SUBREG_REG (value)), 7561 SUBREG_BYTE (value)); 7562 #endif 7563 7564 return value; 7565 } 7566 7567 /* Subroutine of expand_expr: return nonzero iff there is no way that 7568 EXP can reference X, which is being modified. TOP_P is nonzero if this 7569 call is going to be used to determine whether we need a temporary 7570 for EXP, as opposed to a recursive call to this function. 7571 7572 It is always safe for this routine to return zero since it merely 7573 searches for optimization opportunities. */ 7574 7575 int 7576 safe_from_p (const_rtx x, tree exp, int top_p) 7577 { 7578 rtx exp_rtl = 0; 7579 int i, nops; 7580 7581 if (x == 0 7582 /* If EXP has varying size, we MUST use a target since we currently 7583 have no way of allocating temporaries of variable size 7584 (except for arrays that have TYPE_ARRAY_MAX_SIZE set). 7585 So we assume here that something at a higher level has prevented a 7586 clash. This is somewhat bogus, but the best we can do. Only 7587 do this when X is BLKmode and when we are at the top level. */ 7588 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp)) 7589 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST 7590 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE 7591 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE 7592 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp))) 7593 != INTEGER_CST) 7594 && GET_MODE (x) == BLKmode) 7595 /* If X is in the outgoing argument area, it is always safe. */ 7596 || (MEM_P (x) 7597 && (XEXP (x, 0) == virtual_outgoing_args_rtx 7598 || (GET_CODE (XEXP (x, 0)) == PLUS 7599 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx)))) 7600 return 1; 7601 7602 /* If this is a subreg of a hard register, declare it unsafe, otherwise, 7603 find the underlying pseudo. */ 7604 if (GET_CODE (x) == SUBREG) 7605 { 7606 x = SUBREG_REG (x); 7607 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) 7608 return 0; 7609 } 7610 7611 /* Now look at our tree code and possibly recurse. */ 7612 switch (TREE_CODE_CLASS (TREE_CODE (exp))) 7613 { 7614 case tcc_declaration: 7615 exp_rtl = DECL_RTL_IF_SET (exp); 7616 break; 7617 7618 case tcc_constant: 7619 return 1; 7620 7621 case tcc_exceptional: 7622 if (TREE_CODE (exp) == TREE_LIST) 7623 { 7624 while (1) 7625 { 7626 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0)) 7627 return 0; 7628 exp = TREE_CHAIN (exp); 7629 if (!exp) 7630 return 1; 7631 if (TREE_CODE (exp) != TREE_LIST) 7632 return safe_from_p (x, exp, 0); 7633 } 7634 } 7635 else if (TREE_CODE (exp) == CONSTRUCTOR) 7636 { 7637 constructor_elt *ce; 7638 unsigned HOST_WIDE_INT idx; 7639 7640 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce) 7641 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0)) 7642 || !safe_from_p (x, ce->value, 0)) 7643 return 0; 7644 return 1; 7645 } 7646 else if (TREE_CODE (exp) == ERROR_MARK) 7647 return 1; /* An already-visited SAVE_EXPR? */ 7648 else 7649 return 0; 7650 7651 case tcc_statement: 7652 /* The only case we look at here is the DECL_INITIAL inside a 7653 DECL_EXPR. */ 7654 return (TREE_CODE (exp) != DECL_EXPR 7655 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL 7656 || !DECL_INITIAL (DECL_EXPR_DECL (exp)) 7657 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0)); 7658 7659 case tcc_binary: 7660 case tcc_comparison: 7661 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0)) 7662 return 0; 7663 /* Fall through. */ 7664 7665 case tcc_unary: 7666 return safe_from_p (x, TREE_OPERAND (exp, 0), 0); 7667 7668 case tcc_expression: 7669 case tcc_reference: 7670 case tcc_vl_exp: 7671 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in 7672 the expression. If it is set, we conflict iff we are that rtx or 7673 both are in memory. Otherwise, we check all operands of the 7674 expression recursively. */ 7675 7676 switch (TREE_CODE (exp)) 7677 { 7678 case ADDR_EXPR: 7679 /* If the operand is static or we are static, we can't conflict. 7680 Likewise if we don't conflict with the operand at all. */ 7681 if (staticp (TREE_OPERAND (exp, 0)) 7682 || TREE_STATIC (exp) 7683 || safe_from_p (x, TREE_OPERAND (exp, 0), 0)) 7684 return 1; 7685 7686 /* Otherwise, the only way this can conflict is if we are taking 7687 the address of a DECL a that address if part of X, which is 7688 very rare. */ 7689 exp = TREE_OPERAND (exp, 0); 7690 if (DECL_P (exp)) 7691 { 7692 if (!DECL_RTL_SET_P (exp) 7693 || !MEM_P (DECL_RTL (exp))) 7694 return 0; 7695 else 7696 exp_rtl = XEXP (DECL_RTL (exp), 0); 7697 } 7698 break; 7699 7700 case MEM_REF: 7701 if (MEM_P (x) 7702 && alias_sets_conflict_p (MEM_ALIAS_SET (x), 7703 get_alias_set (exp))) 7704 return 0; 7705 break; 7706 7707 case CALL_EXPR: 7708 /* Assume that the call will clobber all hard registers and 7709 all of memory. */ 7710 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER) 7711 || MEM_P (x)) 7712 return 0; 7713 break; 7714 7715 case WITH_CLEANUP_EXPR: 7716 case CLEANUP_POINT_EXPR: 7717 /* Lowered by gimplify.c. */ 7718 gcc_unreachable (); 7719 7720 case SAVE_EXPR: 7721 return safe_from_p (x, TREE_OPERAND (exp, 0), 0); 7722 7723 default: 7724 break; 7725 } 7726 7727 /* If we have an rtx, we do not need to scan our operands. */ 7728 if (exp_rtl) 7729 break; 7730 7731 nops = TREE_OPERAND_LENGTH (exp); 7732 for (i = 0; i < nops; i++) 7733 if (TREE_OPERAND (exp, i) != 0 7734 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0)) 7735 return 0; 7736 7737 break; 7738 7739 case tcc_type: 7740 /* Should never get a type here. */ 7741 gcc_unreachable (); 7742 } 7743 7744 /* If we have an rtl, find any enclosed object. Then see if we conflict 7745 with it. */ 7746 if (exp_rtl) 7747 { 7748 if (GET_CODE (exp_rtl) == SUBREG) 7749 { 7750 exp_rtl = SUBREG_REG (exp_rtl); 7751 if (REG_P (exp_rtl) 7752 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER) 7753 return 0; 7754 } 7755 7756 /* If the rtl is X, then it is not safe. Otherwise, it is unless both 7757 are memory and they conflict. */ 7758 return ! (rtx_equal_p (x, exp_rtl) 7759 || (MEM_P (x) && MEM_P (exp_rtl) 7760 && true_dependence (exp_rtl, VOIDmode, x))); 7761 } 7762 7763 /* If we reach here, it is safe. */ 7764 return 1; 7765 } 7766 7767 7768 /* Return the highest power of two that EXP is known to be a multiple of. 7769 This is used in updating alignment of MEMs in array references. */ 7770 7771 unsigned HOST_WIDE_INT 7772 highest_pow2_factor (const_tree exp) 7773 { 7774 unsigned HOST_WIDE_INT ret; 7775 int trailing_zeros = tree_ctz (exp); 7776 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT) 7777 return BIGGEST_ALIGNMENT; 7778 ret = HOST_WIDE_INT_1U << trailing_zeros; 7779 if (ret > BIGGEST_ALIGNMENT) 7780 return BIGGEST_ALIGNMENT; 7781 return ret; 7782 } 7783 7784 /* Similar, except that the alignment requirements of TARGET are 7785 taken into account. Assume it is at least as aligned as its 7786 type, unless it is a COMPONENT_REF in which case the layout of 7787 the structure gives the alignment. */ 7788 7789 static unsigned HOST_WIDE_INT 7790 highest_pow2_factor_for_target (const_tree target, const_tree exp) 7791 { 7792 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT; 7793 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp); 7794 7795 return MAX (factor, talign); 7796 } 7797 7798 /* Convert the tree comparison code TCODE to the rtl one where the 7799 signedness is UNSIGNEDP. */ 7800 7801 static enum rtx_code 7802 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp) 7803 { 7804 enum rtx_code code; 7805 switch (tcode) 7806 { 7807 case EQ_EXPR: 7808 code = EQ; 7809 break; 7810 case NE_EXPR: 7811 code = NE; 7812 break; 7813 case LT_EXPR: 7814 code = unsignedp ? LTU : LT; 7815 break; 7816 case LE_EXPR: 7817 code = unsignedp ? LEU : LE; 7818 break; 7819 case GT_EXPR: 7820 code = unsignedp ? GTU : GT; 7821 break; 7822 case GE_EXPR: 7823 code = unsignedp ? GEU : GE; 7824 break; 7825 case UNORDERED_EXPR: 7826 code = UNORDERED; 7827 break; 7828 case ORDERED_EXPR: 7829 code = ORDERED; 7830 break; 7831 case UNLT_EXPR: 7832 code = UNLT; 7833 break; 7834 case UNLE_EXPR: 7835 code = UNLE; 7836 break; 7837 case UNGT_EXPR: 7838 code = UNGT; 7839 break; 7840 case UNGE_EXPR: 7841 code = UNGE; 7842 break; 7843 case UNEQ_EXPR: 7844 code = UNEQ; 7845 break; 7846 case LTGT_EXPR: 7847 code = LTGT; 7848 break; 7849 7850 default: 7851 gcc_unreachable (); 7852 } 7853 return code; 7854 } 7855 7856 /* Subroutine of expand_expr. Expand the two operands of a binary 7857 expression EXP0 and EXP1 placing the results in OP0 and OP1. 7858 The value may be stored in TARGET if TARGET is nonzero. The 7859 MODIFIER argument is as documented by expand_expr. */ 7860 7861 void 7862 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1, 7863 enum expand_modifier modifier) 7864 { 7865 if (! safe_from_p (target, exp1, 1)) 7866 target = 0; 7867 if (operand_equal_p (exp0, exp1, 0)) 7868 { 7869 *op0 = expand_expr (exp0, target, VOIDmode, modifier); 7870 *op1 = copy_rtx (*op0); 7871 } 7872 else 7873 { 7874 *op0 = expand_expr (exp0, target, VOIDmode, modifier); 7875 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier); 7876 } 7877 } 7878 7879 7880 /* Return a MEM that contains constant EXP. DEFER is as for 7881 output_constant_def and MODIFIER is as for expand_expr. */ 7882 7883 static rtx 7884 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier) 7885 { 7886 rtx mem; 7887 7888 mem = output_constant_def (exp, defer); 7889 if (modifier != EXPAND_INITIALIZER) 7890 mem = use_anchored_address (mem); 7891 return mem; 7892 } 7893 7894 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP. 7895 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ 7896 7897 static rtx 7898 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode, 7899 enum expand_modifier modifier, addr_space_t as) 7900 { 7901 rtx result, subtarget; 7902 tree inner, offset; 7903 poly_int64 bitsize, bitpos; 7904 int unsignedp, reversep, volatilep = 0; 7905 machine_mode mode1; 7906 7907 /* If we are taking the address of a constant and are at the top level, 7908 we have to use output_constant_def since we can't call force_const_mem 7909 at top level. */ 7910 /* ??? This should be considered a front-end bug. We should not be 7911 generating ADDR_EXPR of something that isn't an LVALUE. The only 7912 exception here is STRING_CST. */ 7913 if (CONSTANT_CLASS_P (exp)) 7914 { 7915 result = XEXP (expand_expr_constant (exp, 0, modifier), 0); 7916 if (modifier < EXPAND_SUM) 7917 result = force_operand (result, target); 7918 return result; 7919 } 7920 7921 /* Everything must be something allowed by is_gimple_addressable. */ 7922 switch (TREE_CODE (exp)) 7923 { 7924 case INDIRECT_REF: 7925 /* This case will happen via recursion for &a->b. */ 7926 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier); 7927 7928 case MEM_REF: 7929 { 7930 tree tem = TREE_OPERAND (exp, 0); 7931 if (!integer_zerop (TREE_OPERAND (exp, 1))) 7932 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1)); 7933 return expand_expr (tem, target, tmode, modifier); 7934 } 7935 7936 case TARGET_MEM_REF: 7937 return addr_for_mem_ref (exp, as, true); 7938 7939 case CONST_DECL: 7940 /* Expand the initializer like constants above. */ 7941 result = XEXP (expand_expr_constant (DECL_INITIAL (exp), 7942 0, modifier), 0); 7943 if (modifier < EXPAND_SUM) 7944 result = force_operand (result, target); 7945 return result; 7946 7947 case REALPART_EXPR: 7948 /* The real part of the complex number is always first, therefore 7949 the address is the same as the address of the parent object. */ 7950 offset = 0; 7951 bitpos = 0; 7952 inner = TREE_OPERAND (exp, 0); 7953 break; 7954 7955 case IMAGPART_EXPR: 7956 /* The imaginary part of the complex number is always second. 7957 The expression is therefore always offset by the size of the 7958 scalar type. */ 7959 offset = 0; 7960 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp))); 7961 inner = TREE_OPERAND (exp, 0); 7962 break; 7963 7964 case COMPOUND_LITERAL_EXPR: 7965 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from 7966 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL 7967 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static 7968 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL; 7969 the initializers aren't gimplified. */ 7970 if (COMPOUND_LITERAL_EXPR_DECL (exp) 7971 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp))) 7972 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp), 7973 target, tmode, modifier, as); 7974 /* FALLTHRU */ 7975 default: 7976 /* If the object is a DECL, then expand it for its rtl. Don't bypass 7977 expand_expr, as that can have various side effects; LABEL_DECLs for 7978 example, may not have their DECL_RTL set yet. Expand the rtl of 7979 CONSTRUCTORs too, which should yield a memory reference for the 7980 constructor's contents. Assume language specific tree nodes can 7981 be expanded in some interesting way. */ 7982 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE); 7983 if (DECL_P (exp) 7984 || TREE_CODE (exp) == CONSTRUCTOR 7985 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR) 7986 { 7987 result = expand_expr (exp, target, tmode, 7988 modifier == EXPAND_INITIALIZER 7989 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS); 7990 7991 /* If the DECL isn't in memory, then the DECL wasn't properly 7992 marked TREE_ADDRESSABLE, which will be either a front-end 7993 or a tree optimizer bug. */ 7994 7995 gcc_assert (MEM_P (result)); 7996 result = XEXP (result, 0); 7997 7998 /* ??? Is this needed anymore? */ 7999 if (DECL_P (exp)) 8000 TREE_USED (exp) = 1; 8001 8002 if (modifier != EXPAND_INITIALIZER 8003 && modifier != EXPAND_CONST_ADDRESS 8004 && modifier != EXPAND_SUM) 8005 result = force_operand (result, target); 8006 return result; 8007 } 8008 8009 /* Pass FALSE as the last argument to get_inner_reference although 8010 we are expanding to RTL. The rationale is that we know how to 8011 handle "aligning nodes" here: we can just bypass them because 8012 they won't change the final object whose address will be returned 8013 (they actually exist only for that purpose). */ 8014 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1, 8015 &unsignedp, &reversep, &volatilep); 8016 break; 8017 } 8018 8019 /* We must have made progress. */ 8020 gcc_assert (inner != exp); 8021 8022 subtarget = offset || maybe_ne (bitpos, 0) ? NULL_RTX : target; 8023 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than 8024 inner alignment, force the inner to be sufficiently aligned. */ 8025 if (CONSTANT_CLASS_P (inner) 8026 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp))) 8027 { 8028 inner = copy_node (inner); 8029 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner)); 8030 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp))); 8031 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1; 8032 } 8033 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as); 8034 8035 if (offset) 8036 { 8037 rtx tmp; 8038 8039 if (modifier != EXPAND_NORMAL) 8040 result = force_operand (result, NULL); 8041 tmp = expand_expr (offset, NULL_RTX, tmode, 8042 modifier == EXPAND_INITIALIZER 8043 ? EXPAND_INITIALIZER : EXPAND_NORMAL); 8044 8045 /* expand_expr is allowed to return an object in a mode other 8046 than TMODE. If it did, we need to convert. */ 8047 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp)) 8048 tmp = convert_modes (tmode, GET_MODE (tmp), 8049 tmp, TYPE_UNSIGNED (TREE_TYPE (offset))); 8050 result = convert_memory_address_addr_space (tmode, result, as); 8051 tmp = convert_memory_address_addr_space (tmode, tmp, as); 8052 8053 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) 8054 result = simplify_gen_binary (PLUS, tmode, result, tmp); 8055 else 8056 { 8057 subtarget = maybe_ne (bitpos, 0) ? NULL_RTX : target; 8058 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget, 8059 1, OPTAB_LIB_WIDEN); 8060 } 8061 } 8062 8063 if (maybe_ne (bitpos, 0)) 8064 { 8065 /* Someone beforehand should have rejected taking the address 8066 of an object that isn't byte-aligned. */ 8067 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT); 8068 result = convert_memory_address_addr_space (tmode, result, as); 8069 result = plus_constant (tmode, result, bytepos); 8070 if (modifier < EXPAND_SUM) 8071 result = force_operand (result, target); 8072 } 8073 8074 return result; 8075 } 8076 8077 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR. 8078 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */ 8079 8080 static rtx 8081 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode, 8082 enum expand_modifier modifier) 8083 { 8084 addr_space_t as = ADDR_SPACE_GENERIC; 8085 scalar_int_mode address_mode = Pmode; 8086 scalar_int_mode pointer_mode = ptr_mode; 8087 machine_mode rmode; 8088 rtx result; 8089 8090 /* Target mode of VOIDmode says "whatever's natural". */ 8091 if (tmode == VOIDmode) 8092 tmode = TYPE_MODE (TREE_TYPE (exp)); 8093 8094 if (POINTER_TYPE_P (TREE_TYPE (exp))) 8095 { 8096 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp))); 8097 address_mode = targetm.addr_space.address_mode (as); 8098 pointer_mode = targetm.addr_space.pointer_mode (as); 8099 } 8100 8101 /* We can get called with some Weird Things if the user does silliness 8102 like "(short) &a". In that case, convert_memory_address won't do 8103 the right thing, so ignore the given target mode. */ 8104 scalar_int_mode new_tmode = (tmode == pointer_mode 8105 ? pointer_mode 8106 : address_mode); 8107 8108 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target, 8109 new_tmode, modifier, as); 8110 8111 /* Despite expand_expr claims concerning ignoring TMODE when not 8112 strictly convenient, stuff breaks if we don't honor it. Note 8113 that combined with the above, we only do this for pointer modes. */ 8114 rmode = GET_MODE (result); 8115 if (rmode == VOIDmode) 8116 rmode = new_tmode; 8117 if (rmode != new_tmode) 8118 result = convert_memory_address_addr_space (new_tmode, result, as); 8119 8120 return result; 8121 } 8122 8123 /* Generate code for computing CONSTRUCTOR EXP. 8124 An rtx for the computed value is returned. If AVOID_TEMP_MEM 8125 is TRUE, instead of creating a temporary variable in memory 8126 NULL is returned and the caller needs to handle it differently. */ 8127 8128 static rtx 8129 expand_constructor (tree exp, rtx target, enum expand_modifier modifier, 8130 bool avoid_temp_mem) 8131 { 8132 tree type = TREE_TYPE (exp); 8133 machine_mode mode = TYPE_MODE (type); 8134 8135 /* Try to avoid creating a temporary at all. This is possible 8136 if all of the initializer is zero. 8137 FIXME: try to handle all [0..255] initializers we can handle 8138 with memset. */ 8139 if (TREE_STATIC (exp) 8140 && !TREE_ADDRESSABLE (exp) 8141 && target != 0 && mode == BLKmode 8142 && all_zeros_p (exp)) 8143 { 8144 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL); 8145 return target; 8146 } 8147 8148 /* All elts simple constants => refer to a constant in memory. But 8149 if this is a non-BLKmode mode, let it store a field at a time 8150 since that should make a CONST_INT, CONST_WIDE_INT or 8151 CONST_DOUBLE when we fold. Likewise, if we have a target we can 8152 use, it is best to store directly into the target unless the type 8153 is large enough that memcpy will be used. If we are making an 8154 initializer and all operands are constant, put it in memory as 8155 well. 8156 8157 FIXME: Avoid trying to fill vector constructors piece-meal. 8158 Output them with output_constant_def below unless we're sure 8159 they're zeros. This should go away when vector initializers 8160 are treated like VECTOR_CST instead of arrays. */ 8161 if ((TREE_STATIC (exp) 8162 && ((mode == BLKmode 8163 && ! (target != 0 && safe_from_p (target, exp, 1))) 8164 || TREE_ADDRESSABLE (exp) 8165 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type)) 8166 && (! can_move_by_pieces 8167 (tree_to_uhwi (TYPE_SIZE_UNIT (type)), 8168 TYPE_ALIGN (type))) 8169 && ! mostly_zeros_p (exp)))) 8170 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS) 8171 && TREE_CONSTANT (exp))) 8172 { 8173 rtx constructor; 8174 8175 if (avoid_temp_mem) 8176 return NULL_RTX; 8177 8178 constructor = expand_expr_constant (exp, 1, modifier); 8179 8180 if (modifier != EXPAND_CONST_ADDRESS 8181 && modifier != EXPAND_INITIALIZER 8182 && modifier != EXPAND_SUM) 8183 constructor = validize_mem (constructor); 8184 8185 return constructor; 8186 } 8187 8188 /* Handle calls that pass values in multiple non-contiguous 8189 locations. The Irix 6 ABI has examples of this. */ 8190 if (target == 0 || ! safe_from_p (target, exp, 1) 8191 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM) 8192 { 8193 if (avoid_temp_mem) 8194 return NULL_RTX; 8195 8196 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1); 8197 } 8198 8199 store_constructor (exp, target, 0, int_expr_size (exp), false); 8200 return target; 8201 } 8202 8203 8204 /* expand_expr: generate code for computing expression EXP. 8205 An rtx for the computed value is returned. The value is never null. 8206 In the case of a void EXP, const0_rtx is returned. 8207 8208 The value may be stored in TARGET if TARGET is nonzero. 8209 TARGET is just a suggestion; callers must assume that 8210 the rtx returned may not be the same as TARGET. 8211 8212 If TARGET is CONST0_RTX, it means that the value will be ignored. 8213 8214 If TMODE is not VOIDmode, it suggests generating the 8215 result in mode TMODE. But this is done only when convenient. 8216 Otherwise, TMODE is ignored and the value generated in its natural mode. 8217 TMODE is just a suggestion; callers must assume that 8218 the rtx returned may not have mode TMODE. 8219 8220 Note that TARGET may have neither TMODE nor MODE. In that case, it 8221 probably will not be used. 8222 8223 If MODIFIER is EXPAND_SUM then when EXP is an addition 8224 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...)) 8225 or a nest of (PLUS ...) and (MINUS ...) where the terms are 8226 products as above, or REG or MEM, or constant. 8227 Ordinarily in such cases we would output mul or add instructions 8228 and then return a pseudo reg containing the sum. 8229 8230 EXPAND_INITIALIZER is much like EXPAND_SUM except that 8231 it also marks a label as absolutely required (it can't be dead). 8232 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns. 8233 This is used for outputting expressions used in initializers. 8234 8235 EXPAND_CONST_ADDRESS says that it is okay to return a MEM 8236 with a constant address even if that address is not normally legitimate. 8237 EXPAND_INITIALIZER and EXPAND_SUM also have this effect. 8238 8239 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for 8240 a call parameter. Such targets require special care as we haven't yet 8241 marked TARGET so that it's safe from being trashed by libcalls. We 8242 don't want to use TARGET for anything but the final result; 8243 Intermediate values must go elsewhere. Additionally, calls to 8244 emit_block_move will be flagged with BLOCK_OP_CALL_PARM. 8245 8246 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid 8247 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the 8248 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a 8249 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on 8250 recursively. 8251 8252 If INNER_REFERENCE_P is true, we are expanding an inner reference. 8253 In this case, we don't adjust a returned MEM rtx that wouldn't be 8254 sufficiently aligned for its mode; instead, it's up to the caller 8255 to deal with it afterwards. This is used to make sure that unaligned 8256 base objects for which out-of-bounds accesses are supported, for 8257 example record types with trailing arrays, aren't realigned behind 8258 the back of the caller. 8259 The normal operating mode is to pass FALSE for this parameter. */ 8260 8261 rtx 8262 expand_expr_real (tree exp, rtx target, machine_mode tmode, 8263 enum expand_modifier modifier, rtx *alt_rtl, 8264 bool inner_reference_p) 8265 { 8266 rtx ret; 8267 8268 /* Handle ERROR_MARK before anybody tries to access its type. */ 8269 if (TREE_CODE (exp) == ERROR_MARK 8270 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK)) 8271 { 8272 ret = CONST0_RTX (tmode); 8273 return ret ? ret : const0_rtx; 8274 } 8275 8276 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl, 8277 inner_reference_p); 8278 return ret; 8279 } 8280 8281 /* Try to expand the conditional expression which is represented by 8282 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds 8283 return the rtl reg which represents the result. Otherwise return 8284 NULL_RTX. */ 8285 8286 static rtx 8287 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED, 8288 tree treeop1 ATTRIBUTE_UNUSED, 8289 tree treeop2 ATTRIBUTE_UNUSED) 8290 { 8291 rtx insn; 8292 rtx op00, op01, op1, op2; 8293 enum rtx_code comparison_code; 8294 machine_mode comparison_mode; 8295 gimple *srcstmt; 8296 rtx temp; 8297 tree type = TREE_TYPE (treeop1); 8298 int unsignedp = TYPE_UNSIGNED (type); 8299 machine_mode mode = TYPE_MODE (type); 8300 machine_mode orig_mode = mode; 8301 static bool expanding_cond_expr_using_cmove = false; 8302 8303 /* Conditional move expansion can end up TERing two operands which, 8304 when recursively hitting conditional expressions can result in 8305 exponential behavior if the cmove expansion ultimatively fails. 8306 It's hardly profitable to TER a cmove into a cmove so avoid doing 8307 that by failing early if we end up recursing. */ 8308 if (expanding_cond_expr_using_cmove) 8309 return NULL_RTX; 8310 8311 /* If we cannot do a conditional move on the mode, try doing it 8312 with the promoted mode. */ 8313 if (!can_conditionally_move_p (mode)) 8314 { 8315 mode = promote_mode (type, mode, &unsignedp); 8316 if (!can_conditionally_move_p (mode)) 8317 return NULL_RTX; 8318 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */ 8319 } 8320 else 8321 temp = assign_temp (type, 0, 1); 8322 8323 expanding_cond_expr_using_cmove = true; 8324 start_sequence (); 8325 expand_operands (treeop1, treeop2, 8326 temp, &op1, &op2, EXPAND_NORMAL); 8327 8328 if (TREE_CODE (treeop0) == SSA_NAME 8329 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison))) 8330 { 8331 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt)); 8332 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt); 8333 op00 = expand_normal (gimple_assign_rhs1 (srcstmt)); 8334 op01 = expand_normal (gimple_assign_rhs2 (srcstmt)); 8335 comparison_mode = TYPE_MODE (type); 8336 unsignedp = TYPE_UNSIGNED (type); 8337 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp); 8338 } 8339 else if (COMPARISON_CLASS_P (treeop0)) 8340 { 8341 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0)); 8342 enum tree_code cmpcode = TREE_CODE (treeop0); 8343 op00 = expand_normal (TREE_OPERAND (treeop0, 0)); 8344 op01 = expand_normal (TREE_OPERAND (treeop0, 1)); 8345 unsignedp = TYPE_UNSIGNED (type); 8346 comparison_mode = TYPE_MODE (type); 8347 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp); 8348 } 8349 else 8350 { 8351 op00 = expand_normal (treeop0); 8352 op01 = const0_rtx; 8353 comparison_code = NE; 8354 comparison_mode = GET_MODE (op00); 8355 if (comparison_mode == VOIDmode) 8356 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0)); 8357 } 8358 expanding_cond_expr_using_cmove = false; 8359 8360 if (GET_MODE (op1) != mode) 8361 op1 = gen_lowpart (mode, op1); 8362 8363 if (GET_MODE (op2) != mode) 8364 op2 = gen_lowpart (mode, op2); 8365 8366 /* Try to emit the conditional move. */ 8367 insn = emit_conditional_move (temp, comparison_code, 8368 op00, op01, comparison_mode, 8369 op1, op2, mode, 8370 unsignedp); 8371 8372 /* If we could do the conditional move, emit the sequence, 8373 and return. */ 8374 if (insn) 8375 { 8376 rtx_insn *seq = get_insns (); 8377 end_sequence (); 8378 emit_insn (seq); 8379 return convert_modes (orig_mode, mode, temp, 0); 8380 } 8381 8382 /* Otherwise discard the sequence and fall back to code with 8383 branches. */ 8384 end_sequence (); 8385 return NULL_RTX; 8386 } 8387 8388 rtx 8389 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode, 8390 enum expand_modifier modifier) 8391 { 8392 rtx op0, op1, op2, temp; 8393 rtx_code_label *lab; 8394 tree type; 8395 int unsignedp; 8396 machine_mode mode; 8397 scalar_int_mode int_mode; 8398 enum tree_code code = ops->code; 8399 optab this_optab; 8400 rtx subtarget, original_target; 8401 int ignore; 8402 bool reduce_bit_field; 8403 location_t loc = ops->location; 8404 tree treeop0, treeop1, treeop2; 8405 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \ 8406 ? reduce_to_bit_field_precision ((expr), \ 8407 target, \ 8408 type) \ 8409 : (expr)) 8410 8411 type = ops->type; 8412 mode = TYPE_MODE (type); 8413 unsignedp = TYPE_UNSIGNED (type); 8414 8415 treeop0 = ops->op0; 8416 treeop1 = ops->op1; 8417 treeop2 = ops->op2; 8418 8419 /* We should be called only on simple (binary or unary) expressions, 8420 exactly those that are valid in gimple expressions that aren't 8421 GIMPLE_SINGLE_RHS (or invalid). */ 8422 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS 8423 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS 8424 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS); 8425 8426 ignore = (target == const0_rtx 8427 || ((CONVERT_EXPR_CODE_P (code) 8428 || code == COND_EXPR || code == VIEW_CONVERT_EXPR) 8429 && TREE_CODE (type) == VOID_TYPE)); 8430 8431 /* We should be called only if we need the result. */ 8432 gcc_assert (!ignore); 8433 8434 /* An operation in what may be a bit-field type needs the 8435 result to be reduced to the precision of the bit-field type, 8436 which is narrower than that of the type's mode. */ 8437 reduce_bit_field = (INTEGRAL_TYPE_P (type) 8438 && !type_has_mode_precision_p (type)); 8439 8440 if (reduce_bit_field && modifier == EXPAND_STACK_PARM) 8441 target = 0; 8442 8443 /* Use subtarget as the target for operand 0 of a binary operation. */ 8444 subtarget = get_subtarget (target); 8445 original_target = target; 8446 8447 switch (code) 8448 { 8449 case NON_LVALUE_EXPR: 8450 case PAREN_EXPR: 8451 CASE_CONVERT: 8452 if (treeop0 == error_mark_node) 8453 return const0_rtx; 8454 8455 if (TREE_CODE (type) == UNION_TYPE) 8456 { 8457 tree valtype = TREE_TYPE (treeop0); 8458 8459 /* If both input and output are BLKmode, this conversion isn't doing 8460 anything except possibly changing memory attribute. */ 8461 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode) 8462 { 8463 rtx result = expand_expr (treeop0, target, tmode, 8464 modifier); 8465 8466 result = copy_rtx (result); 8467 set_mem_attributes (result, type, 0); 8468 return result; 8469 } 8470 8471 if (target == 0) 8472 { 8473 if (TYPE_MODE (type) != BLKmode) 8474 target = gen_reg_rtx (TYPE_MODE (type)); 8475 else 8476 target = assign_temp (type, 1, 1); 8477 } 8478 8479 if (MEM_P (target)) 8480 /* Store data into beginning of memory target. */ 8481 store_expr (treeop0, 8482 adjust_address (target, TYPE_MODE (valtype), 0), 8483 modifier == EXPAND_STACK_PARM, 8484 false, TYPE_REVERSE_STORAGE_ORDER (type)); 8485 8486 else 8487 { 8488 gcc_assert (REG_P (target) 8489 && !TYPE_REVERSE_STORAGE_ORDER (type)); 8490 8491 /* Store this field into a union of the proper type. */ 8492 poly_uint64 op0_size 8493 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0))); 8494 poly_uint64 union_size = GET_MODE_BITSIZE (mode); 8495 store_field (target, 8496 /* The conversion must be constructed so that 8497 we know at compile time how many bits 8498 to preserve. */ 8499 ordered_min (op0_size, union_size), 8500 0, 0, 0, TYPE_MODE (valtype), treeop0, 0, 8501 false, false); 8502 } 8503 8504 /* Return the entire union. */ 8505 return target; 8506 } 8507 8508 if (mode == TYPE_MODE (TREE_TYPE (treeop0))) 8509 { 8510 op0 = expand_expr (treeop0, target, VOIDmode, 8511 modifier); 8512 8513 /* If the signedness of the conversion differs and OP0 is 8514 a promoted SUBREG, clear that indication since we now 8515 have to do the proper extension. */ 8516 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp 8517 && GET_CODE (op0) == SUBREG) 8518 SUBREG_PROMOTED_VAR_P (op0) = 0; 8519 8520 return REDUCE_BIT_FIELD (op0); 8521 } 8522 8523 op0 = expand_expr (treeop0, NULL_RTX, mode, 8524 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier); 8525 if (GET_MODE (op0) == mode) 8526 ; 8527 8528 /* If OP0 is a constant, just convert it into the proper mode. */ 8529 else if (CONSTANT_P (op0)) 8530 { 8531 tree inner_type = TREE_TYPE (treeop0); 8532 machine_mode inner_mode = GET_MODE (op0); 8533 8534 if (inner_mode == VOIDmode) 8535 inner_mode = TYPE_MODE (inner_type); 8536 8537 if (modifier == EXPAND_INITIALIZER) 8538 op0 = lowpart_subreg (mode, op0, inner_mode); 8539 else 8540 op0= convert_modes (mode, inner_mode, op0, 8541 TYPE_UNSIGNED (inner_type)); 8542 } 8543 8544 else if (modifier == EXPAND_INITIALIZER) 8545 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0)) 8546 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0); 8547 8548 else if (target == 0) 8549 op0 = convert_to_mode (mode, op0, 8550 TYPE_UNSIGNED (TREE_TYPE 8551 (treeop0))); 8552 else 8553 { 8554 convert_move (target, op0, 8555 TYPE_UNSIGNED (TREE_TYPE (treeop0))); 8556 op0 = target; 8557 } 8558 8559 return REDUCE_BIT_FIELD (op0); 8560 8561 case ADDR_SPACE_CONVERT_EXPR: 8562 { 8563 tree treeop0_type = TREE_TYPE (treeop0); 8564 8565 gcc_assert (POINTER_TYPE_P (type)); 8566 gcc_assert (POINTER_TYPE_P (treeop0_type)); 8567 8568 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type)); 8569 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type)); 8570 8571 /* Conversions between pointers to the same address space should 8572 have been implemented via CONVERT_EXPR / NOP_EXPR. */ 8573 gcc_assert (as_to != as_from); 8574 8575 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier); 8576 8577 /* Ask target code to handle conversion between pointers 8578 to overlapping address spaces. */ 8579 if (targetm.addr_space.subset_p (as_to, as_from) 8580 || targetm.addr_space.subset_p (as_from, as_to)) 8581 { 8582 op0 = targetm.addr_space.convert (op0, treeop0_type, type); 8583 } 8584 else 8585 { 8586 /* For disjoint address spaces, converting anything but a null 8587 pointer invokes undefined behavior. We truncate or extend the 8588 value as if we'd converted via integers, which handles 0 as 8589 required, and all others as the programmer likely expects. */ 8590 #ifndef POINTERS_EXTEND_UNSIGNED 8591 const int POINTERS_EXTEND_UNSIGNED = 1; 8592 #endif 8593 op0 = convert_modes (mode, TYPE_MODE (treeop0_type), 8594 op0, POINTERS_EXTEND_UNSIGNED); 8595 } 8596 gcc_assert (op0); 8597 return op0; 8598 } 8599 8600 case POINTER_PLUS_EXPR: 8601 /* Even though the sizetype mode and the pointer's mode can be different 8602 expand is able to handle this correctly and get the correct result out 8603 of the PLUS_EXPR code. */ 8604 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR 8605 if sizetype precision is smaller than pointer precision. */ 8606 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type)) 8607 treeop1 = fold_convert_loc (loc, type, 8608 fold_convert_loc (loc, ssizetype, 8609 treeop1)); 8610 /* If sizetype precision is larger than pointer precision, truncate the 8611 offset to have matching modes. */ 8612 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type)) 8613 treeop1 = fold_convert_loc (loc, type, treeop1); 8614 /* FALLTHRU */ 8615 8616 case PLUS_EXPR: 8617 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and 8618 something else, make sure we add the register to the constant and 8619 then to the other thing. This case can occur during strength 8620 reduction and doing it this way will produce better code if the 8621 frame pointer or argument pointer is eliminated. 8622 8623 fold-const.c will ensure that the constant is always in the inner 8624 PLUS_EXPR, so the only case we need to do anything about is if 8625 sp, ap, or fp is our second argument, in which case we must swap 8626 the innermost first argument and our second argument. */ 8627 8628 if (TREE_CODE (treeop0) == PLUS_EXPR 8629 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST 8630 && VAR_P (treeop1) 8631 && (DECL_RTL (treeop1) == frame_pointer_rtx 8632 || DECL_RTL (treeop1) == stack_pointer_rtx 8633 || DECL_RTL (treeop1) == arg_pointer_rtx)) 8634 { 8635 gcc_unreachable (); 8636 } 8637 8638 /* If the result is to be ptr_mode and we are adding an integer to 8639 something, we might be forming a constant. So try to use 8640 plus_constant. If it produces a sum and we can't accept it, 8641 use force_operand. This allows P = &ARR[const] to generate 8642 efficient code on machines where a SYMBOL_REF is not a valid 8643 address. 8644 8645 If this is an EXPAND_SUM call, always return the sum. */ 8646 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER 8647 || (mode == ptr_mode && (unsignedp || ! flag_trapv))) 8648 { 8649 if (modifier == EXPAND_STACK_PARM) 8650 target = 0; 8651 if (TREE_CODE (treeop0) == INTEGER_CST 8652 && HWI_COMPUTABLE_MODE_P (mode) 8653 && TREE_CONSTANT (treeop1)) 8654 { 8655 rtx constant_part; 8656 HOST_WIDE_INT wc; 8657 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1)); 8658 8659 op1 = expand_expr (treeop1, subtarget, VOIDmode, 8660 EXPAND_SUM); 8661 /* Use wi::shwi to ensure that the constant is 8662 truncated according to the mode of OP1, then sign extended 8663 to a HOST_WIDE_INT. Using the constant directly can result 8664 in non-canonical RTL in a 64x32 cross compile. */ 8665 wc = TREE_INT_CST_LOW (treeop0); 8666 constant_part = 8667 immed_wide_int_const (wi::shwi (wc, wmode), wmode); 8668 op1 = plus_constant (mode, op1, INTVAL (constant_part)); 8669 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) 8670 op1 = force_operand (op1, target); 8671 return REDUCE_BIT_FIELD (op1); 8672 } 8673 8674 else if (TREE_CODE (treeop1) == INTEGER_CST 8675 && HWI_COMPUTABLE_MODE_P (mode) 8676 && TREE_CONSTANT (treeop0)) 8677 { 8678 rtx constant_part; 8679 HOST_WIDE_INT wc; 8680 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0)); 8681 8682 op0 = expand_expr (treeop0, subtarget, VOIDmode, 8683 (modifier == EXPAND_INITIALIZER 8684 ? EXPAND_INITIALIZER : EXPAND_SUM)); 8685 if (! CONSTANT_P (op0)) 8686 { 8687 op1 = expand_expr (treeop1, NULL_RTX, 8688 VOIDmode, modifier); 8689 /* Return a PLUS if modifier says it's OK. */ 8690 if (modifier == EXPAND_SUM 8691 || modifier == EXPAND_INITIALIZER) 8692 return simplify_gen_binary (PLUS, mode, op0, op1); 8693 goto binop2; 8694 } 8695 /* Use wi::shwi to ensure that the constant is 8696 truncated according to the mode of OP1, then sign extended 8697 to a HOST_WIDE_INT. Using the constant directly can result 8698 in non-canonical RTL in a 64x32 cross compile. */ 8699 wc = TREE_INT_CST_LOW (treeop1); 8700 constant_part 8701 = immed_wide_int_const (wi::shwi (wc, wmode), wmode); 8702 op0 = plus_constant (mode, op0, INTVAL (constant_part)); 8703 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER) 8704 op0 = force_operand (op0, target); 8705 return REDUCE_BIT_FIELD (op0); 8706 } 8707 } 8708 8709 /* Use TER to expand pointer addition of a negated value 8710 as pointer subtraction. */ 8711 if ((POINTER_TYPE_P (TREE_TYPE (treeop0)) 8712 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE 8713 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0))))) 8714 && TREE_CODE (treeop1) == SSA_NAME 8715 && TYPE_MODE (TREE_TYPE (treeop0)) 8716 == TYPE_MODE (TREE_TYPE (treeop1))) 8717 { 8718 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR); 8719 if (def) 8720 { 8721 treeop1 = gimple_assign_rhs1 (def); 8722 code = MINUS_EXPR; 8723 goto do_minus; 8724 } 8725 } 8726 8727 /* No sense saving up arithmetic to be done 8728 if it's all in the wrong mode to form part of an address. 8729 And force_operand won't know whether to sign-extend or 8730 zero-extend. */ 8731 if (modifier != EXPAND_INITIALIZER 8732 && (modifier != EXPAND_SUM || mode != ptr_mode)) 8733 { 8734 expand_operands (treeop0, treeop1, 8735 subtarget, &op0, &op1, modifier); 8736 if (op0 == const0_rtx) 8737 return op1; 8738 if (op1 == const0_rtx) 8739 return op0; 8740 goto binop2; 8741 } 8742 8743 expand_operands (treeop0, treeop1, 8744 subtarget, &op0, &op1, modifier); 8745 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); 8746 8747 case MINUS_EXPR: 8748 case POINTER_DIFF_EXPR: 8749 do_minus: 8750 /* For initializers, we are allowed to return a MINUS of two 8751 symbolic constants. Here we handle all cases when both operands 8752 are constant. */ 8753 /* Handle difference of two symbolic constants, 8754 for the sake of an initializer. */ 8755 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) 8756 && really_constant_p (treeop0) 8757 && really_constant_p (treeop1)) 8758 { 8759 expand_operands (treeop0, treeop1, 8760 NULL_RTX, &op0, &op1, modifier); 8761 return simplify_gen_binary (MINUS, mode, op0, op1); 8762 } 8763 8764 /* No sense saving up arithmetic to be done 8765 if it's all in the wrong mode to form part of an address. 8766 And force_operand won't know whether to sign-extend or 8767 zero-extend. */ 8768 if (modifier != EXPAND_INITIALIZER 8769 && (modifier != EXPAND_SUM || mode != ptr_mode)) 8770 goto binop; 8771 8772 expand_operands (treeop0, treeop1, 8773 subtarget, &op0, &op1, modifier); 8774 8775 /* Convert A - const to A + (-const). */ 8776 if (CONST_INT_P (op1)) 8777 { 8778 op1 = negate_rtx (mode, op1); 8779 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1)); 8780 } 8781 8782 goto binop2; 8783 8784 case WIDEN_MULT_PLUS_EXPR: 8785 case WIDEN_MULT_MINUS_EXPR: 8786 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 8787 op2 = expand_normal (treeop2); 8788 target = expand_widen_pattern_expr (ops, op0, op1, op2, 8789 target, unsignedp); 8790 return target; 8791 8792 case WIDEN_MULT_EXPR: 8793 /* If first operand is constant, swap them. 8794 Thus the following special case checks need only 8795 check the second operand. */ 8796 if (TREE_CODE (treeop0) == INTEGER_CST) 8797 std::swap (treeop0, treeop1); 8798 8799 /* First, check if we have a multiplication of one signed and one 8800 unsigned operand. */ 8801 if (TREE_CODE (treeop1) != INTEGER_CST 8802 && (TYPE_UNSIGNED (TREE_TYPE (treeop0)) 8803 != TYPE_UNSIGNED (TREE_TYPE (treeop1)))) 8804 { 8805 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0)); 8806 this_optab = usmul_widen_optab; 8807 if (find_widening_optab_handler (this_optab, mode, innermode) 8808 != CODE_FOR_nothing) 8809 { 8810 if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) 8811 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, 8812 EXPAND_NORMAL); 8813 else 8814 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0, 8815 EXPAND_NORMAL); 8816 /* op0 and op1 might still be constant, despite the above 8817 != INTEGER_CST check. Handle it. */ 8818 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) 8819 { 8820 op0 = convert_modes (mode, innermode, op0, true); 8821 op1 = convert_modes (mode, innermode, op1, false); 8822 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, 8823 target, unsignedp)); 8824 } 8825 goto binop3; 8826 } 8827 } 8828 /* Check for a multiplication with matching signedness. */ 8829 else if ((TREE_CODE (treeop1) == INTEGER_CST 8830 && int_fits_type_p (treeop1, TREE_TYPE (treeop0))) 8831 || (TYPE_UNSIGNED (TREE_TYPE (treeop1)) 8832 == TYPE_UNSIGNED (TREE_TYPE (treeop0)))) 8833 { 8834 tree op0type = TREE_TYPE (treeop0); 8835 machine_mode innermode = TYPE_MODE (op0type); 8836 bool zextend_p = TYPE_UNSIGNED (op0type); 8837 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab; 8838 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab; 8839 8840 if (TREE_CODE (treeop0) != INTEGER_CST) 8841 { 8842 if (find_widening_optab_handler (this_optab, mode, innermode) 8843 != CODE_FOR_nothing) 8844 { 8845 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, 8846 EXPAND_NORMAL); 8847 /* op0 and op1 might still be constant, despite the above 8848 != INTEGER_CST check. Handle it. */ 8849 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) 8850 { 8851 widen_mult_const: 8852 op0 = convert_modes (mode, innermode, op0, zextend_p); 8853 op1 8854 = convert_modes (mode, innermode, op1, 8855 TYPE_UNSIGNED (TREE_TYPE (treeop1))); 8856 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, 8857 target, 8858 unsignedp)); 8859 } 8860 temp = expand_widening_mult (mode, op0, op1, target, 8861 unsignedp, this_optab); 8862 return REDUCE_BIT_FIELD (temp); 8863 } 8864 if (find_widening_optab_handler (other_optab, mode, innermode) 8865 != CODE_FOR_nothing 8866 && innermode == word_mode) 8867 { 8868 rtx htem, hipart; 8869 op0 = expand_normal (treeop0); 8870 op1 = expand_normal (treeop1); 8871 /* op0 and op1 might be constants, despite the above 8872 != INTEGER_CST check. Handle it. */ 8873 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode) 8874 goto widen_mult_const; 8875 if (TREE_CODE (treeop1) == INTEGER_CST) 8876 op1 = convert_modes (mode, word_mode, op1, 8877 TYPE_UNSIGNED (TREE_TYPE (treeop1))); 8878 temp = expand_binop (mode, other_optab, op0, op1, target, 8879 unsignedp, OPTAB_LIB_WIDEN); 8880 hipart = gen_highpart (word_mode, temp); 8881 htem = expand_mult_highpart_adjust (word_mode, hipart, 8882 op0, op1, hipart, 8883 zextend_p); 8884 if (htem != hipart) 8885 emit_move_insn (hipart, htem); 8886 return REDUCE_BIT_FIELD (temp); 8887 } 8888 } 8889 } 8890 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0); 8891 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1); 8892 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); 8893 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); 8894 8895 case MULT_EXPR: 8896 /* If this is a fixed-point operation, then we cannot use the code 8897 below because "expand_mult" doesn't support sat/no-sat fixed-point 8898 multiplications. */ 8899 if (ALL_FIXED_POINT_MODE_P (mode)) 8900 goto binop; 8901 8902 /* If first operand is constant, swap them. 8903 Thus the following special case checks need only 8904 check the second operand. */ 8905 if (TREE_CODE (treeop0) == INTEGER_CST) 8906 std::swap (treeop0, treeop1); 8907 8908 /* Attempt to return something suitable for generating an 8909 indexed address, for machines that support that. */ 8910 8911 if (modifier == EXPAND_SUM && mode == ptr_mode 8912 && tree_fits_shwi_p (treeop1)) 8913 { 8914 tree exp1 = treeop1; 8915 8916 op0 = expand_expr (treeop0, subtarget, VOIDmode, 8917 EXPAND_SUM); 8918 8919 if (!REG_P (op0)) 8920 op0 = force_operand (op0, NULL_RTX); 8921 if (!REG_P (op0)) 8922 op0 = copy_to_mode_reg (mode, op0); 8923 8924 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0, 8925 gen_int_mode (tree_to_shwi (exp1), 8926 TYPE_MODE (TREE_TYPE (exp1))))); 8927 } 8928 8929 if (modifier == EXPAND_STACK_PARM) 8930 target = 0; 8931 8932 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); 8933 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp)); 8934 8935 case TRUNC_MOD_EXPR: 8936 case FLOOR_MOD_EXPR: 8937 case CEIL_MOD_EXPR: 8938 case ROUND_MOD_EXPR: 8939 8940 case TRUNC_DIV_EXPR: 8941 case FLOOR_DIV_EXPR: 8942 case CEIL_DIV_EXPR: 8943 case ROUND_DIV_EXPR: 8944 case EXACT_DIV_EXPR: 8945 { 8946 /* If this is a fixed-point operation, then we cannot use the code 8947 below because "expand_divmod" doesn't support sat/no-sat fixed-point 8948 divisions. */ 8949 if (ALL_FIXED_POINT_MODE_P (mode)) 8950 goto binop; 8951 8952 if (modifier == EXPAND_STACK_PARM) 8953 target = 0; 8954 /* Possible optimization: compute the dividend with EXPAND_SUM 8955 then if the divisor is constant can optimize the case 8956 where some terms of the dividend have coeffs divisible by it. */ 8957 expand_operands (treeop0, treeop1, 8958 subtarget, &op0, &op1, EXPAND_NORMAL); 8959 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR 8960 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR; 8961 if (SCALAR_INT_MODE_P (mode) 8962 && optimize >= 2 8963 && get_range_pos_neg (treeop0) == 1 8964 && get_range_pos_neg (treeop1) == 1) 8965 { 8966 /* If both arguments are known to be positive when interpreted 8967 as signed, we can expand it as both signed and unsigned 8968 division or modulo. Choose the cheaper sequence in that case. */ 8969 bool speed_p = optimize_insn_for_speed_p (); 8970 do_pending_stack_adjust (); 8971 start_sequence (); 8972 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1); 8973 rtx_insn *uns_insns = get_insns (); 8974 end_sequence (); 8975 start_sequence (); 8976 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0); 8977 rtx_insn *sgn_insns = get_insns (); 8978 end_sequence (); 8979 unsigned uns_cost = seq_cost (uns_insns, speed_p); 8980 unsigned sgn_cost = seq_cost (sgn_insns, speed_p); 8981 8982 /* If costs are the same then use as tie breaker the other 8983 other factor. */ 8984 if (uns_cost == sgn_cost) 8985 { 8986 uns_cost = seq_cost (uns_insns, !speed_p); 8987 sgn_cost = seq_cost (sgn_insns, !speed_p); 8988 } 8989 8990 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp)) 8991 { 8992 emit_insn (uns_insns); 8993 return uns_ret; 8994 } 8995 emit_insn (sgn_insns); 8996 return sgn_ret; 8997 } 8998 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp); 8999 } 9000 case RDIV_EXPR: 9001 goto binop; 9002 9003 case MULT_HIGHPART_EXPR: 9004 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL); 9005 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp); 9006 gcc_assert (temp); 9007 return temp; 9008 9009 case FIXED_CONVERT_EXPR: 9010 op0 = expand_normal (treeop0); 9011 if (target == 0 || modifier == EXPAND_STACK_PARM) 9012 target = gen_reg_rtx (mode); 9013 9014 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE 9015 && TYPE_UNSIGNED (TREE_TYPE (treeop0))) 9016 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type))) 9017 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type)); 9018 else 9019 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type)); 9020 return target; 9021 9022 case FIX_TRUNC_EXPR: 9023 op0 = expand_normal (treeop0); 9024 if (target == 0 || modifier == EXPAND_STACK_PARM) 9025 target = gen_reg_rtx (mode); 9026 expand_fix (target, op0, unsignedp); 9027 return target; 9028 9029 case FLOAT_EXPR: 9030 op0 = expand_normal (treeop0); 9031 if (target == 0 || modifier == EXPAND_STACK_PARM) 9032 target = gen_reg_rtx (mode); 9033 /* expand_float can't figure out what to do if FROM has VOIDmode. 9034 So give it the correct mode. With -O, cse will optimize this. */ 9035 if (GET_MODE (op0) == VOIDmode) 9036 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)), 9037 op0); 9038 expand_float (target, op0, 9039 TYPE_UNSIGNED (TREE_TYPE (treeop0))); 9040 return target; 9041 9042 case NEGATE_EXPR: 9043 op0 = expand_expr (treeop0, subtarget, 9044 VOIDmode, EXPAND_NORMAL); 9045 if (modifier == EXPAND_STACK_PARM) 9046 target = 0; 9047 temp = expand_unop (mode, 9048 optab_for_tree_code (NEGATE_EXPR, type, 9049 optab_default), 9050 op0, target, 0); 9051 gcc_assert (temp); 9052 return REDUCE_BIT_FIELD (temp); 9053 9054 case ABS_EXPR: 9055 case ABSU_EXPR: 9056 op0 = expand_expr (treeop0, subtarget, 9057 VOIDmode, EXPAND_NORMAL); 9058 if (modifier == EXPAND_STACK_PARM) 9059 target = 0; 9060 9061 /* ABS_EXPR is not valid for complex arguments. */ 9062 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT 9063 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT); 9064 9065 /* Unsigned abs is simply the operand. Testing here means we don't 9066 risk generating incorrect code below. */ 9067 if (TYPE_UNSIGNED (TREE_TYPE (treeop0))) 9068 return op0; 9069 9070 return expand_abs (mode, op0, target, unsignedp, 9071 safe_from_p (target, treeop0, 1)); 9072 9073 case MAX_EXPR: 9074 case MIN_EXPR: 9075 target = original_target; 9076 if (target == 0 9077 || modifier == EXPAND_STACK_PARM 9078 || (MEM_P (target) && MEM_VOLATILE_P (target)) 9079 || GET_MODE (target) != mode 9080 || (REG_P (target) 9081 && REGNO (target) < FIRST_PSEUDO_REGISTER)) 9082 target = gen_reg_rtx (mode); 9083 expand_operands (treeop0, treeop1, 9084 target, &op0, &op1, EXPAND_NORMAL); 9085 9086 /* First try to do it with a special MIN or MAX instruction. 9087 If that does not win, use a conditional jump to select the proper 9088 value. */ 9089 this_optab = optab_for_tree_code (code, type, optab_default); 9090 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp, 9091 OPTAB_WIDEN); 9092 if (temp != 0) 9093 return temp; 9094 9095 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y> 9096 and similarly for MAX <x, y>. */ 9097 if (VECTOR_TYPE_P (type)) 9098 { 9099 tree t0 = make_tree (type, op0); 9100 tree t1 = make_tree (type, op1); 9101 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR, 9102 type, t0, t1); 9103 return expand_vec_cond_expr (type, comparison, t0, t1, 9104 original_target); 9105 } 9106 9107 /* At this point, a MEM target is no longer useful; we will get better 9108 code without it. */ 9109 9110 if (! REG_P (target)) 9111 target = gen_reg_rtx (mode); 9112 9113 /* If op1 was placed in target, swap op0 and op1. */ 9114 if (target != op0 && target == op1) 9115 std::swap (op0, op1); 9116 9117 /* We generate better code and avoid problems with op1 mentioning 9118 target by forcing op1 into a pseudo if it isn't a constant. */ 9119 if (! CONSTANT_P (op1)) 9120 op1 = force_reg (mode, op1); 9121 9122 { 9123 enum rtx_code comparison_code; 9124 rtx cmpop1 = op1; 9125 9126 if (code == MAX_EXPR) 9127 comparison_code = unsignedp ? GEU : GE; 9128 else 9129 comparison_code = unsignedp ? LEU : LE; 9130 9131 /* Canonicalize to comparisons against 0. */ 9132 if (op1 == const1_rtx) 9133 { 9134 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1) 9135 or (a != 0 ? a : 1) for unsigned. 9136 For MIN we are safe converting (a <= 1 ? a : 1) 9137 into (a <= 0 ? a : 1) */ 9138 cmpop1 = const0_rtx; 9139 if (code == MAX_EXPR) 9140 comparison_code = unsignedp ? NE : GT; 9141 } 9142 if (op1 == constm1_rtx && !unsignedp) 9143 { 9144 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1) 9145 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */ 9146 cmpop1 = const0_rtx; 9147 if (code == MIN_EXPR) 9148 comparison_code = LT; 9149 } 9150 9151 /* Use a conditional move if possible. */ 9152 if (can_conditionally_move_p (mode)) 9153 { 9154 rtx insn; 9155 9156 start_sequence (); 9157 9158 /* Try to emit the conditional move. */ 9159 insn = emit_conditional_move (target, comparison_code, 9160 op0, cmpop1, mode, 9161 op0, op1, mode, 9162 unsignedp); 9163 9164 /* If we could do the conditional move, emit the sequence, 9165 and return. */ 9166 if (insn) 9167 { 9168 rtx_insn *seq = get_insns (); 9169 end_sequence (); 9170 emit_insn (seq); 9171 return target; 9172 } 9173 9174 /* Otherwise discard the sequence and fall back to code with 9175 branches. */ 9176 end_sequence (); 9177 } 9178 9179 if (target != op0) 9180 emit_move_insn (target, op0); 9181 9182 lab = gen_label_rtx (); 9183 do_compare_rtx_and_jump (target, cmpop1, comparison_code, 9184 unsignedp, mode, NULL_RTX, NULL, lab, 9185 profile_probability::uninitialized ()); 9186 } 9187 emit_move_insn (target, op1); 9188 emit_label (lab); 9189 return target; 9190 9191 case BIT_NOT_EXPR: 9192 op0 = expand_expr (treeop0, subtarget, 9193 VOIDmode, EXPAND_NORMAL); 9194 if (modifier == EXPAND_STACK_PARM) 9195 target = 0; 9196 /* In case we have to reduce the result to bitfield precision 9197 for unsigned bitfield expand this as XOR with a proper constant 9198 instead. */ 9199 if (reduce_bit_field && TYPE_UNSIGNED (type)) 9200 { 9201 int_mode = SCALAR_INT_TYPE_MODE (type); 9202 wide_int mask = wi::mask (TYPE_PRECISION (type), 9203 false, GET_MODE_PRECISION (int_mode)); 9204 9205 temp = expand_binop (int_mode, xor_optab, op0, 9206 immed_wide_int_const (mask, int_mode), 9207 target, 1, OPTAB_LIB_WIDEN); 9208 } 9209 else 9210 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1); 9211 gcc_assert (temp); 9212 return temp; 9213 9214 /* ??? Can optimize bitwise operations with one arg constant. 9215 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b) 9216 and (a bitwise1 b) bitwise2 b (etc) 9217 but that is probably not worth while. */ 9218 9219 case BIT_AND_EXPR: 9220 case BIT_IOR_EXPR: 9221 case BIT_XOR_EXPR: 9222 goto binop; 9223 9224 case LROTATE_EXPR: 9225 case RROTATE_EXPR: 9226 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type)) 9227 || type_has_mode_precision_p (type)); 9228 /* fall through */ 9229 9230 case LSHIFT_EXPR: 9231 case RSHIFT_EXPR: 9232 { 9233 /* If this is a fixed-point operation, then we cannot use the code 9234 below because "expand_shift" doesn't support sat/no-sat fixed-point 9235 shifts. */ 9236 if (ALL_FIXED_POINT_MODE_P (mode)) 9237 goto binop; 9238 9239 if (! safe_from_p (subtarget, treeop1, 1)) 9240 subtarget = 0; 9241 if (modifier == EXPAND_STACK_PARM) 9242 target = 0; 9243 op0 = expand_expr (treeop0, subtarget, 9244 VOIDmode, EXPAND_NORMAL); 9245 9246 /* Left shift optimization when shifting across word_size boundary. 9247 9248 If mode == GET_MODE_WIDER_MODE (word_mode), then normally 9249 there isn't native instruction to support this wide mode 9250 left shift. Given below scenario: 9251 9252 Type A = (Type) B << C 9253 9254 |< T >| 9255 | dest_high | dest_low | 9256 9257 | word_size | 9258 9259 If the shift amount C caused we shift B to across the word 9260 size boundary, i.e part of B shifted into high half of 9261 destination register, and part of B remains in the low 9262 half, then GCC will use the following left shift expand 9263 logic: 9264 9265 1. Initialize dest_low to B. 9266 2. Initialize every bit of dest_high to the sign bit of B. 9267 3. Logic left shift dest_low by C bit to finalize dest_low. 9268 The value of dest_low before this shift is kept in a temp D. 9269 4. Logic left shift dest_high by C. 9270 5. Logic right shift D by (word_size - C). 9271 6. Or the result of 4 and 5 to finalize dest_high. 9272 9273 While, by checking gimple statements, if operand B is 9274 coming from signed extension, then we can simplify above 9275 expand logic into: 9276 9277 1. dest_high = src_low >> (word_size - C). 9278 2. dest_low = src_low << C. 9279 9280 We can use one arithmetic right shift to finish all the 9281 purpose of steps 2, 4, 5, 6, thus we reduce the steps 9282 needed from 6 into 2. 9283 9284 The case is similar for zero extension, except that we 9285 initialize dest_high to zero rather than copies of the sign 9286 bit from B. Furthermore, we need to use a logical right shift 9287 in this case. 9288 9289 The choice of sign-extension versus zero-extension is 9290 determined entirely by whether or not B is signed and is 9291 independent of the current setting of unsignedp. */ 9292 9293 temp = NULL_RTX; 9294 if (code == LSHIFT_EXPR 9295 && target 9296 && REG_P (target) 9297 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode) 9298 && mode == int_mode 9299 && TREE_CONSTANT (treeop1) 9300 && TREE_CODE (treeop0) == SSA_NAME) 9301 { 9302 gimple *def = SSA_NAME_DEF_STMT (treeop0); 9303 if (is_gimple_assign (def) 9304 && gimple_assign_rhs_code (def) == NOP_EXPR) 9305 { 9306 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE 9307 (TREE_TYPE (gimple_assign_rhs1 (def))); 9308 9309 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode) 9310 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode) 9311 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode)) 9312 >= GET_MODE_BITSIZE (word_mode))) 9313 { 9314 rtx_insn *seq, *seq_old; 9315 poly_uint64 high_off = subreg_highpart_offset (word_mode, 9316 int_mode); 9317 bool extend_unsigned 9318 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def))); 9319 rtx low = lowpart_subreg (word_mode, op0, int_mode); 9320 rtx dest_low = lowpart_subreg (word_mode, target, int_mode); 9321 rtx dest_high = simplify_gen_subreg (word_mode, target, 9322 int_mode, high_off); 9323 HOST_WIDE_INT ramount = (BITS_PER_WORD 9324 - TREE_INT_CST_LOW (treeop1)); 9325 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount); 9326 9327 start_sequence (); 9328 /* dest_high = src_low >> (word_size - C). */ 9329 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low, 9330 rshift, dest_high, 9331 extend_unsigned); 9332 if (temp != dest_high) 9333 emit_move_insn (dest_high, temp); 9334 9335 /* dest_low = src_low << C. */ 9336 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low, 9337 treeop1, dest_low, unsignedp); 9338 if (temp != dest_low) 9339 emit_move_insn (dest_low, temp); 9340 9341 seq = get_insns (); 9342 end_sequence (); 9343 temp = target ; 9344 9345 if (have_insn_for (ASHIFT, int_mode)) 9346 { 9347 bool speed_p = optimize_insn_for_speed_p (); 9348 start_sequence (); 9349 rtx ret_old = expand_variable_shift (code, int_mode, 9350 op0, treeop1, 9351 target, 9352 unsignedp); 9353 9354 seq_old = get_insns (); 9355 end_sequence (); 9356 if (seq_cost (seq, speed_p) 9357 >= seq_cost (seq_old, speed_p)) 9358 { 9359 seq = seq_old; 9360 temp = ret_old; 9361 } 9362 } 9363 emit_insn (seq); 9364 } 9365 } 9366 } 9367 9368 if (temp == NULL_RTX) 9369 temp = expand_variable_shift (code, mode, op0, treeop1, target, 9370 unsignedp); 9371 if (code == LSHIFT_EXPR) 9372 temp = REDUCE_BIT_FIELD (temp); 9373 return temp; 9374 } 9375 9376 /* Could determine the answer when only additive constants differ. Also, 9377 the addition of one can be handled by changing the condition. */ 9378 case LT_EXPR: 9379 case LE_EXPR: 9380 case GT_EXPR: 9381 case GE_EXPR: 9382 case EQ_EXPR: 9383 case NE_EXPR: 9384 case UNORDERED_EXPR: 9385 case ORDERED_EXPR: 9386 case UNLT_EXPR: 9387 case UNLE_EXPR: 9388 case UNGT_EXPR: 9389 case UNGE_EXPR: 9390 case UNEQ_EXPR: 9391 case LTGT_EXPR: 9392 { 9393 temp = do_store_flag (ops, 9394 modifier != EXPAND_STACK_PARM ? target : NULL_RTX, 9395 tmode != VOIDmode ? tmode : mode); 9396 if (temp) 9397 return temp; 9398 9399 /* Use a compare and a jump for BLKmode comparisons, or for function 9400 type comparisons is have_canonicalize_funcptr_for_compare. */ 9401 9402 if ((target == 0 9403 || modifier == EXPAND_STACK_PARM 9404 || ! safe_from_p (target, treeop0, 1) 9405 || ! safe_from_p (target, treeop1, 1) 9406 /* Make sure we don't have a hard reg (such as function's return 9407 value) live across basic blocks, if not optimizing. */ 9408 || (!optimize && REG_P (target) 9409 && REGNO (target) < FIRST_PSEUDO_REGISTER))) 9410 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); 9411 9412 emit_move_insn (target, const0_rtx); 9413 9414 rtx_code_label *lab1 = gen_label_rtx (); 9415 jumpifnot_1 (code, treeop0, treeop1, lab1, 9416 profile_probability::uninitialized ()); 9417 9418 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type)) 9419 emit_move_insn (target, constm1_rtx); 9420 else 9421 emit_move_insn (target, const1_rtx); 9422 9423 emit_label (lab1); 9424 return target; 9425 } 9426 case COMPLEX_EXPR: 9427 /* Get the rtx code of the operands. */ 9428 op0 = expand_normal (treeop0); 9429 op1 = expand_normal (treeop1); 9430 9431 if (!target) 9432 target = gen_reg_rtx (TYPE_MODE (type)); 9433 else 9434 /* If target overlaps with op1, then either we need to force 9435 op1 into a pseudo (if target also overlaps with op0), 9436 or write the complex parts in reverse order. */ 9437 switch (GET_CODE (target)) 9438 { 9439 case CONCAT: 9440 if (reg_overlap_mentioned_p (XEXP (target, 0), op1)) 9441 { 9442 if (reg_overlap_mentioned_p (XEXP (target, 1), op0)) 9443 { 9444 complex_expr_force_op1: 9445 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target))); 9446 emit_move_insn (temp, op1); 9447 op1 = temp; 9448 break; 9449 } 9450 complex_expr_swap_order: 9451 /* Move the imaginary (op1) and real (op0) parts to their 9452 location. */ 9453 write_complex_part (target, op1, true); 9454 write_complex_part (target, op0, false); 9455 9456 return target; 9457 } 9458 break; 9459 case MEM: 9460 temp = adjust_address_nv (target, 9461 GET_MODE_INNER (GET_MODE (target)), 0); 9462 if (reg_overlap_mentioned_p (temp, op1)) 9463 { 9464 scalar_mode imode = GET_MODE_INNER (GET_MODE (target)); 9465 temp = adjust_address_nv (target, imode, 9466 GET_MODE_SIZE (imode)); 9467 if (reg_overlap_mentioned_p (temp, op0)) 9468 goto complex_expr_force_op1; 9469 goto complex_expr_swap_order; 9470 } 9471 break; 9472 default: 9473 if (reg_overlap_mentioned_p (target, op1)) 9474 { 9475 if (reg_overlap_mentioned_p (target, op0)) 9476 goto complex_expr_force_op1; 9477 goto complex_expr_swap_order; 9478 } 9479 break; 9480 } 9481 9482 /* Move the real (op0) and imaginary (op1) parts to their location. */ 9483 write_complex_part (target, op0, false); 9484 write_complex_part (target, op1, true); 9485 9486 return target; 9487 9488 case WIDEN_SUM_EXPR: 9489 { 9490 tree oprnd0 = treeop0; 9491 tree oprnd1 = treeop1; 9492 9493 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 9494 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1, 9495 target, unsignedp); 9496 return target; 9497 } 9498 9499 case VEC_UNPACK_HI_EXPR: 9500 case VEC_UNPACK_LO_EXPR: 9501 case VEC_UNPACK_FIX_TRUNC_HI_EXPR: 9502 case VEC_UNPACK_FIX_TRUNC_LO_EXPR: 9503 { 9504 op0 = expand_normal (treeop0); 9505 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX, 9506 target, unsignedp); 9507 gcc_assert (temp); 9508 return temp; 9509 } 9510 9511 case VEC_UNPACK_FLOAT_HI_EXPR: 9512 case VEC_UNPACK_FLOAT_LO_EXPR: 9513 { 9514 op0 = expand_normal (treeop0); 9515 /* The signedness is determined from input operand. */ 9516 temp = expand_widen_pattern_expr 9517 (ops, op0, NULL_RTX, NULL_RTX, 9518 target, TYPE_UNSIGNED (TREE_TYPE (treeop0))); 9519 9520 gcc_assert (temp); 9521 return temp; 9522 } 9523 9524 case VEC_WIDEN_MULT_HI_EXPR: 9525 case VEC_WIDEN_MULT_LO_EXPR: 9526 case VEC_WIDEN_MULT_EVEN_EXPR: 9527 case VEC_WIDEN_MULT_ODD_EXPR: 9528 case VEC_WIDEN_LSHIFT_HI_EXPR: 9529 case VEC_WIDEN_LSHIFT_LO_EXPR: 9530 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 9531 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX, 9532 target, unsignedp); 9533 gcc_assert (target); 9534 return target; 9535 9536 case VEC_PACK_SAT_EXPR: 9537 case VEC_PACK_FIX_TRUNC_EXPR: 9538 mode = TYPE_MODE (TREE_TYPE (treeop0)); 9539 goto binop; 9540 9541 case VEC_PACK_TRUNC_EXPR: 9542 if (VECTOR_BOOLEAN_TYPE_P (type) 9543 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0)) 9544 && mode == TYPE_MODE (TREE_TYPE (treeop0)) 9545 && SCALAR_INT_MODE_P (mode)) 9546 { 9547 struct expand_operand eops[4]; 9548 machine_mode imode = TYPE_MODE (TREE_TYPE (treeop0)); 9549 expand_operands (treeop0, treeop1, 9550 subtarget, &op0, &op1, EXPAND_NORMAL); 9551 this_optab = vec_pack_sbool_trunc_optab; 9552 enum insn_code icode = optab_handler (this_optab, imode); 9553 create_output_operand (&eops[0], target, mode); 9554 create_convert_operand_from (&eops[1], op0, imode, false); 9555 create_convert_operand_from (&eops[2], op1, imode, false); 9556 temp = GEN_INT (TYPE_VECTOR_SUBPARTS (type).to_constant ()); 9557 create_input_operand (&eops[3], temp, imode); 9558 expand_insn (icode, 4, eops); 9559 return eops[0].value; 9560 } 9561 mode = TYPE_MODE (TREE_TYPE (treeop0)); 9562 goto binop; 9563 9564 case VEC_PACK_FLOAT_EXPR: 9565 mode = TYPE_MODE (TREE_TYPE (treeop0)); 9566 expand_operands (treeop0, treeop1, 9567 subtarget, &op0, &op1, EXPAND_NORMAL); 9568 this_optab = optab_for_tree_code (code, TREE_TYPE (treeop0), 9569 optab_default); 9570 target = expand_binop (mode, this_optab, op0, op1, target, 9571 TYPE_UNSIGNED (TREE_TYPE (treeop0)), 9572 OPTAB_LIB_WIDEN); 9573 gcc_assert (target); 9574 return target; 9575 9576 case VEC_PERM_EXPR: 9577 { 9578 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL); 9579 vec_perm_builder sel; 9580 if (TREE_CODE (treeop2) == VECTOR_CST 9581 && tree_to_vec_perm_builder (&sel, treeop2)) 9582 { 9583 machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2)); 9584 temp = expand_vec_perm_const (mode, op0, op1, sel, 9585 sel_mode, target); 9586 } 9587 else 9588 { 9589 op2 = expand_normal (treeop2); 9590 temp = expand_vec_perm_var (mode, op0, op1, op2, target); 9591 } 9592 gcc_assert (temp); 9593 return temp; 9594 } 9595 9596 case DOT_PROD_EXPR: 9597 { 9598 tree oprnd0 = treeop0; 9599 tree oprnd1 = treeop1; 9600 tree oprnd2 = treeop2; 9601 rtx op2; 9602 9603 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 9604 op2 = expand_normal (oprnd2); 9605 target = expand_widen_pattern_expr (ops, op0, op1, op2, 9606 target, unsignedp); 9607 return target; 9608 } 9609 9610 case SAD_EXPR: 9611 { 9612 tree oprnd0 = treeop0; 9613 tree oprnd1 = treeop1; 9614 tree oprnd2 = treeop2; 9615 rtx op2; 9616 9617 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 9618 op2 = expand_normal (oprnd2); 9619 target = expand_widen_pattern_expr (ops, op0, op1, op2, 9620 target, unsignedp); 9621 return target; 9622 } 9623 9624 case REALIGN_LOAD_EXPR: 9625 { 9626 tree oprnd0 = treeop0; 9627 tree oprnd1 = treeop1; 9628 tree oprnd2 = treeop2; 9629 rtx op2; 9630 9631 this_optab = optab_for_tree_code (code, type, optab_default); 9632 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL); 9633 op2 = expand_normal (oprnd2); 9634 temp = expand_ternary_op (mode, this_optab, op0, op1, op2, 9635 target, unsignedp); 9636 gcc_assert (temp); 9637 return temp; 9638 } 9639 9640 case COND_EXPR: 9641 { 9642 /* A COND_EXPR with its type being VOID_TYPE represents a 9643 conditional jump and is handled in 9644 expand_gimple_cond_expr. */ 9645 gcc_assert (!VOID_TYPE_P (type)); 9646 9647 /* Note that COND_EXPRs whose type is a structure or union 9648 are required to be constructed to contain assignments of 9649 a temporary variable, so that we can evaluate them here 9650 for side effect only. If type is void, we must do likewise. */ 9651 9652 gcc_assert (!TREE_ADDRESSABLE (type) 9653 && !ignore 9654 && TREE_TYPE (treeop1) != void_type_node 9655 && TREE_TYPE (treeop2) != void_type_node); 9656 9657 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2); 9658 if (temp) 9659 return temp; 9660 9661 /* If we are not to produce a result, we have no target. Otherwise, 9662 if a target was specified use it; it will not be used as an 9663 intermediate target unless it is safe. If no target, use a 9664 temporary. */ 9665 9666 if (modifier != EXPAND_STACK_PARM 9667 && original_target 9668 && safe_from_p (original_target, treeop0, 1) 9669 && GET_MODE (original_target) == mode 9670 && !MEM_P (original_target)) 9671 temp = original_target; 9672 else 9673 temp = assign_temp (type, 0, 1); 9674 9675 do_pending_stack_adjust (); 9676 NO_DEFER_POP; 9677 rtx_code_label *lab0 = gen_label_rtx (); 9678 rtx_code_label *lab1 = gen_label_rtx (); 9679 jumpifnot (treeop0, lab0, 9680 profile_probability::uninitialized ()); 9681 store_expr (treeop1, temp, 9682 modifier == EXPAND_STACK_PARM, 9683 false, false); 9684 9685 emit_jump_insn (targetm.gen_jump (lab1)); 9686 emit_barrier (); 9687 emit_label (lab0); 9688 store_expr (treeop2, temp, 9689 modifier == EXPAND_STACK_PARM, 9690 false, false); 9691 9692 emit_label (lab1); 9693 OK_DEFER_POP; 9694 return temp; 9695 } 9696 9697 case VEC_COND_EXPR: 9698 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target); 9699 return target; 9700 9701 case VEC_DUPLICATE_EXPR: 9702 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier); 9703 target = expand_vector_broadcast (mode, op0); 9704 gcc_assert (target); 9705 return target; 9706 9707 case VEC_SERIES_EXPR: 9708 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, modifier); 9709 return expand_vec_series_expr (mode, op0, op1, target); 9710 9711 case BIT_INSERT_EXPR: 9712 { 9713 unsigned bitpos = tree_to_uhwi (treeop2); 9714 unsigned bitsize; 9715 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1))) 9716 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1)); 9717 else 9718 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1))); 9719 rtx op0 = expand_normal (treeop0); 9720 rtx op1 = expand_normal (treeop1); 9721 rtx dst = gen_reg_rtx (mode); 9722 emit_move_insn (dst, op0); 9723 store_bit_field (dst, bitsize, bitpos, 0, 0, 9724 TYPE_MODE (TREE_TYPE (treeop1)), op1, false); 9725 return dst; 9726 } 9727 9728 default: 9729 gcc_unreachable (); 9730 } 9731 9732 /* Here to do an ordinary binary operator. */ 9733 binop: 9734 expand_operands (treeop0, treeop1, 9735 subtarget, &op0, &op1, EXPAND_NORMAL); 9736 binop2: 9737 this_optab = optab_for_tree_code (code, type, optab_default); 9738 binop3: 9739 if (modifier == EXPAND_STACK_PARM) 9740 target = 0; 9741 temp = expand_binop (mode, this_optab, op0, op1, target, 9742 unsignedp, OPTAB_LIB_WIDEN); 9743 gcc_assert (temp); 9744 /* Bitwise operations do not need bitfield reduction as we expect their 9745 operands being properly truncated. */ 9746 if (code == BIT_XOR_EXPR 9747 || code == BIT_AND_EXPR 9748 || code == BIT_IOR_EXPR) 9749 return temp; 9750 return REDUCE_BIT_FIELD (temp); 9751 } 9752 #undef REDUCE_BIT_FIELD 9753 9754 9755 /* Return TRUE if expression STMT is suitable for replacement. 9756 Never consider memory loads as replaceable, because those don't ever lead 9757 into constant expressions. */ 9758 9759 static bool 9760 stmt_is_replaceable_p (gimple *stmt) 9761 { 9762 if (ssa_is_replaceable_p (stmt)) 9763 { 9764 /* Don't move around loads. */ 9765 if (!gimple_assign_single_p (stmt) 9766 || is_gimple_val (gimple_assign_rhs1 (stmt))) 9767 return true; 9768 } 9769 return false; 9770 } 9771 9772 rtx 9773 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode, 9774 enum expand_modifier modifier, rtx *alt_rtl, 9775 bool inner_reference_p) 9776 { 9777 rtx op0, op1, temp, decl_rtl; 9778 tree type; 9779 int unsignedp; 9780 machine_mode mode, dmode; 9781 enum tree_code code = TREE_CODE (exp); 9782 rtx subtarget, original_target; 9783 int ignore; 9784 tree context; 9785 bool reduce_bit_field; 9786 location_t loc = EXPR_LOCATION (exp); 9787 struct separate_ops ops; 9788 tree treeop0, treeop1, treeop2; 9789 tree ssa_name = NULL_TREE; 9790 gimple *g; 9791 9792 type = TREE_TYPE (exp); 9793 mode = TYPE_MODE (type); 9794 unsignedp = TYPE_UNSIGNED (type); 9795 9796 treeop0 = treeop1 = treeop2 = NULL_TREE; 9797 if (!VL_EXP_CLASS_P (exp)) 9798 switch (TREE_CODE_LENGTH (code)) 9799 { 9800 default: 9801 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */ 9802 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */ 9803 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */ 9804 case 0: break; 9805 } 9806 ops.code = code; 9807 ops.type = type; 9808 ops.op0 = treeop0; 9809 ops.op1 = treeop1; 9810 ops.op2 = treeop2; 9811 ops.location = loc; 9812 9813 ignore = (target == const0_rtx 9814 || ((CONVERT_EXPR_CODE_P (code) 9815 || code == COND_EXPR || code == VIEW_CONVERT_EXPR) 9816 && TREE_CODE (type) == VOID_TYPE)); 9817 9818 /* An operation in what may be a bit-field type needs the 9819 result to be reduced to the precision of the bit-field type, 9820 which is narrower than that of the type's mode. */ 9821 reduce_bit_field = (!ignore 9822 && INTEGRAL_TYPE_P (type) 9823 && !type_has_mode_precision_p (type)); 9824 9825 /* If we are going to ignore this result, we need only do something 9826 if there is a side-effect somewhere in the expression. If there 9827 is, short-circuit the most common cases here. Note that we must 9828 not call expand_expr with anything but const0_rtx in case this 9829 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */ 9830 9831 if (ignore) 9832 { 9833 if (! TREE_SIDE_EFFECTS (exp)) 9834 return const0_rtx; 9835 9836 /* Ensure we reference a volatile object even if value is ignored, but 9837 don't do this if all we are doing is taking its address. */ 9838 if (TREE_THIS_VOLATILE (exp) 9839 && TREE_CODE (exp) != FUNCTION_DECL 9840 && mode != VOIDmode && mode != BLKmode 9841 && modifier != EXPAND_CONST_ADDRESS) 9842 { 9843 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier); 9844 if (MEM_P (temp)) 9845 copy_to_reg (temp); 9846 return const0_rtx; 9847 } 9848 9849 if (TREE_CODE_CLASS (code) == tcc_unary 9850 || code == BIT_FIELD_REF 9851 || code == COMPONENT_REF 9852 || code == INDIRECT_REF) 9853 return expand_expr (treeop0, const0_rtx, VOIDmode, 9854 modifier); 9855 9856 else if (TREE_CODE_CLASS (code) == tcc_binary 9857 || TREE_CODE_CLASS (code) == tcc_comparison 9858 || code == ARRAY_REF || code == ARRAY_RANGE_REF) 9859 { 9860 expand_expr (treeop0, const0_rtx, VOIDmode, modifier); 9861 expand_expr (treeop1, const0_rtx, VOIDmode, modifier); 9862 return const0_rtx; 9863 } 9864 9865 target = 0; 9866 } 9867 9868 if (reduce_bit_field && modifier == EXPAND_STACK_PARM) 9869 target = 0; 9870 9871 /* Use subtarget as the target for operand 0 of a binary operation. */ 9872 subtarget = get_subtarget (target); 9873 original_target = target; 9874 9875 switch (code) 9876 { 9877 case LABEL_DECL: 9878 { 9879 tree function = decl_function_context (exp); 9880 9881 temp = label_rtx (exp); 9882 temp = gen_rtx_LABEL_REF (Pmode, temp); 9883 9884 if (function != current_function_decl 9885 && function != 0) 9886 LABEL_REF_NONLOCAL_P (temp) = 1; 9887 9888 temp = gen_rtx_MEM (FUNCTION_MODE, temp); 9889 return temp; 9890 } 9891 9892 case SSA_NAME: 9893 /* ??? ivopts calls expander, without any preparation from 9894 out-of-ssa. So fake instructions as if this was an access to the 9895 base variable. This unnecessarily allocates a pseudo, see how we can 9896 reuse it, if partition base vars have it set already. */ 9897 if (!currently_expanding_to_rtl) 9898 { 9899 tree var = SSA_NAME_VAR (exp); 9900 if (var && DECL_RTL_SET_P (var)) 9901 return DECL_RTL (var); 9902 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)), 9903 LAST_VIRTUAL_REGISTER + 1); 9904 } 9905 9906 g = get_gimple_for_ssa_name (exp); 9907 /* For EXPAND_INITIALIZER try harder to get something simpler. */ 9908 if (g == NULL 9909 && modifier == EXPAND_INITIALIZER 9910 && !SSA_NAME_IS_DEFAULT_DEF (exp) 9911 && (optimize || !SSA_NAME_VAR (exp) 9912 || DECL_IGNORED_P (SSA_NAME_VAR (exp))) 9913 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp))) 9914 g = SSA_NAME_DEF_STMT (exp); 9915 if (g) 9916 { 9917 rtx r; 9918 location_t saved_loc = curr_insn_location (); 9919 location_t loc = gimple_location (g); 9920 if (loc != UNKNOWN_LOCATION) 9921 set_curr_insn_location (loc); 9922 ops.code = gimple_assign_rhs_code (g); 9923 switch (get_gimple_rhs_class (ops.code)) 9924 { 9925 case GIMPLE_TERNARY_RHS: 9926 ops.op2 = gimple_assign_rhs3 (g); 9927 /* Fallthru */ 9928 case GIMPLE_BINARY_RHS: 9929 ops.op1 = gimple_assign_rhs2 (g); 9930 9931 /* Try to expand conditonal compare. */ 9932 if (targetm.gen_ccmp_first) 9933 { 9934 gcc_checking_assert (targetm.gen_ccmp_next != NULL); 9935 r = expand_ccmp_expr (g, mode); 9936 if (r) 9937 break; 9938 } 9939 /* Fallthru */ 9940 case GIMPLE_UNARY_RHS: 9941 ops.op0 = gimple_assign_rhs1 (g); 9942 ops.type = TREE_TYPE (gimple_assign_lhs (g)); 9943 ops.location = loc; 9944 r = expand_expr_real_2 (&ops, target, tmode, modifier); 9945 break; 9946 case GIMPLE_SINGLE_RHS: 9947 { 9948 r = expand_expr_real (gimple_assign_rhs1 (g), target, 9949 tmode, modifier, alt_rtl, 9950 inner_reference_p); 9951 break; 9952 } 9953 default: 9954 gcc_unreachable (); 9955 } 9956 set_curr_insn_location (saved_loc); 9957 if (REG_P (r) && !REG_EXPR (r)) 9958 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r); 9959 return r; 9960 } 9961 9962 ssa_name = exp; 9963 decl_rtl = get_rtx_for_ssa_name (ssa_name); 9964 exp = SSA_NAME_VAR (ssa_name); 9965 goto expand_decl_rtl; 9966 9967 case PARM_DECL: 9968 case VAR_DECL: 9969 /* If a static var's type was incomplete when the decl was written, 9970 but the type is complete now, lay out the decl now. */ 9971 if (DECL_SIZE (exp) == 0 9972 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp)) 9973 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp))) 9974 layout_decl (exp, 0); 9975 9976 /* fall through */ 9977 9978 case FUNCTION_DECL: 9979 case RESULT_DECL: 9980 decl_rtl = DECL_RTL (exp); 9981 expand_decl_rtl: 9982 gcc_assert (decl_rtl); 9983 9984 /* DECL_MODE might change when TYPE_MODE depends on attribute target 9985 settings for VECTOR_TYPE_P that might switch for the function. */ 9986 if (currently_expanding_to_rtl 9987 && code == VAR_DECL && MEM_P (decl_rtl) 9988 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode) 9989 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0); 9990 else 9991 decl_rtl = copy_rtx (decl_rtl); 9992 9993 /* Record writes to register variables. */ 9994 if (modifier == EXPAND_WRITE 9995 && REG_P (decl_rtl) 9996 && HARD_REGISTER_P (decl_rtl)) 9997 add_to_hard_reg_set (&crtl->asm_clobbers, 9998 GET_MODE (decl_rtl), REGNO (decl_rtl)); 9999 10000 /* Ensure variable marked as used even if it doesn't go through 10001 a parser. If it hasn't be used yet, write out an external 10002 definition. */ 10003 if (exp) 10004 TREE_USED (exp) = 1; 10005 10006 /* Show we haven't gotten RTL for this yet. */ 10007 temp = 0; 10008 10009 /* Variables inherited from containing functions should have 10010 been lowered by this point. */ 10011 if (exp) 10012 context = decl_function_context (exp); 10013 gcc_assert (!exp 10014 || SCOPE_FILE_SCOPE_P (context) 10015 || context == current_function_decl 10016 || TREE_STATIC (exp) 10017 || DECL_EXTERNAL (exp) 10018 /* ??? C++ creates functions that are not TREE_STATIC. */ 10019 || TREE_CODE (exp) == FUNCTION_DECL); 10020 10021 /* This is the case of an array whose size is to be determined 10022 from its initializer, while the initializer is still being parsed. 10023 ??? We aren't parsing while expanding anymore. */ 10024 10025 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0))) 10026 temp = validize_mem (decl_rtl); 10027 10028 /* If DECL_RTL is memory, we are in the normal case and the 10029 address is not valid, get the address into a register. */ 10030 10031 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER) 10032 { 10033 if (alt_rtl) 10034 *alt_rtl = decl_rtl; 10035 decl_rtl = use_anchored_address (decl_rtl); 10036 if (modifier != EXPAND_CONST_ADDRESS 10037 && modifier != EXPAND_SUM 10038 && !memory_address_addr_space_p (exp ? DECL_MODE (exp) 10039 : GET_MODE (decl_rtl), 10040 XEXP (decl_rtl, 0), 10041 MEM_ADDR_SPACE (decl_rtl))) 10042 temp = replace_equiv_address (decl_rtl, 10043 copy_rtx (XEXP (decl_rtl, 0))); 10044 } 10045 10046 /* If we got something, return it. But first, set the alignment 10047 if the address is a register. */ 10048 if (temp != 0) 10049 { 10050 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0))) 10051 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp)); 10052 10053 return temp; 10054 } 10055 10056 if (exp) 10057 dmode = DECL_MODE (exp); 10058 else 10059 dmode = TYPE_MODE (TREE_TYPE (ssa_name)); 10060 10061 /* If the mode of DECL_RTL does not match that of the decl, 10062 there are two cases: we are dealing with a BLKmode value 10063 that is returned in a register, or we are dealing with 10064 a promoted value. In the latter case, return a SUBREG 10065 of the wanted mode, but mark it so that we know that it 10066 was already extended. */ 10067 if (REG_P (decl_rtl) 10068 && dmode != BLKmode 10069 && GET_MODE (decl_rtl) != dmode) 10070 { 10071 machine_mode pmode; 10072 10073 /* Get the signedness to be used for this variable. Ensure we get 10074 the same mode we got when the variable was declared. */ 10075 if (code != SSA_NAME) 10076 pmode = promote_decl_mode (exp, &unsignedp); 10077 else if ((g = SSA_NAME_DEF_STMT (ssa_name)) 10078 && gimple_code (g) == GIMPLE_CALL 10079 && !gimple_call_internal_p (g)) 10080 pmode = promote_function_mode (type, mode, &unsignedp, 10081 gimple_call_fntype (g), 10082 2); 10083 else 10084 pmode = promote_ssa_mode (ssa_name, &unsignedp); 10085 gcc_assert (GET_MODE (decl_rtl) == pmode); 10086 10087 temp = gen_lowpart_SUBREG (mode, decl_rtl); 10088 SUBREG_PROMOTED_VAR_P (temp) = 1; 10089 SUBREG_PROMOTED_SET (temp, unsignedp); 10090 return temp; 10091 } 10092 10093 return decl_rtl; 10094 10095 case INTEGER_CST: 10096 { 10097 /* Given that TYPE_PRECISION (type) is not always equal to 10098 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from 10099 the former to the latter according to the signedness of the 10100 type. */ 10101 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type); 10102 temp = immed_wide_int_const 10103 (wi::to_wide (exp, GET_MODE_PRECISION (mode)), mode); 10104 return temp; 10105 } 10106 10107 case VECTOR_CST: 10108 { 10109 tree tmp = NULL_TREE; 10110 if (VECTOR_MODE_P (mode)) 10111 return const_vector_from_tree (exp); 10112 scalar_int_mode int_mode; 10113 if (is_int_mode (mode, &int_mode)) 10114 { 10115 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp))) 10116 return const_scalar_mask_from_tree (int_mode, exp); 10117 else 10118 { 10119 tree type_for_mode 10120 = lang_hooks.types.type_for_mode (int_mode, 1); 10121 if (type_for_mode) 10122 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR, 10123 type_for_mode, exp); 10124 } 10125 } 10126 if (!tmp) 10127 { 10128 vec<constructor_elt, va_gc> *v; 10129 /* Constructors need to be fixed-length. FIXME. */ 10130 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant (); 10131 vec_alloc (v, nunits); 10132 for (unsigned int i = 0; i < nunits; ++i) 10133 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i)); 10134 tmp = build_constructor (type, v); 10135 } 10136 return expand_expr (tmp, ignore ? const0_rtx : target, 10137 tmode, modifier); 10138 } 10139 10140 case CONST_DECL: 10141 if (modifier == EXPAND_WRITE) 10142 { 10143 /* Writing into CONST_DECL is always invalid, but handle it 10144 gracefully. */ 10145 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp)); 10146 scalar_int_mode address_mode = targetm.addr_space.address_mode (as); 10147 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode, 10148 EXPAND_NORMAL, as); 10149 op0 = memory_address_addr_space (mode, op0, as); 10150 temp = gen_rtx_MEM (mode, op0); 10151 set_mem_addr_space (temp, as); 10152 return temp; 10153 } 10154 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier); 10155 10156 case REAL_CST: 10157 /* If optimized, generate immediate CONST_DOUBLE 10158 which will be turned into memory by reload if necessary. 10159 10160 We used to force a register so that loop.c could see it. But 10161 this does not allow gen_* patterns to perform optimizations with 10162 the constants. It also produces two insns in cases like "x = 1.0;". 10163 On most machines, floating-point constants are not permitted in 10164 many insns, so we'd end up copying it to a register in any case. 10165 10166 Now, we do the copying in expand_binop, if appropriate. */ 10167 return const_double_from_real_value (TREE_REAL_CST (exp), 10168 TYPE_MODE (TREE_TYPE (exp))); 10169 10170 case FIXED_CST: 10171 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp), 10172 TYPE_MODE (TREE_TYPE (exp))); 10173 10174 case COMPLEX_CST: 10175 /* Handle evaluating a complex constant in a CONCAT target. */ 10176 if (original_target && GET_CODE (original_target) == CONCAT) 10177 { 10178 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp))); 10179 rtx rtarg, itarg; 10180 10181 rtarg = XEXP (original_target, 0); 10182 itarg = XEXP (original_target, 1); 10183 10184 /* Move the real and imaginary parts separately. */ 10185 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL); 10186 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL); 10187 10188 if (op0 != rtarg) 10189 emit_move_insn (rtarg, op0); 10190 if (op1 != itarg) 10191 emit_move_insn (itarg, op1); 10192 10193 return original_target; 10194 } 10195 10196 /* fall through */ 10197 10198 case STRING_CST: 10199 temp = expand_expr_constant (exp, 1, modifier); 10200 10201 /* temp contains a constant address. 10202 On RISC machines where a constant address isn't valid, 10203 make some insns to get that address into a register. */ 10204 if (modifier != EXPAND_CONST_ADDRESS 10205 && modifier != EXPAND_INITIALIZER 10206 && modifier != EXPAND_SUM 10207 && ! memory_address_addr_space_p (mode, XEXP (temp, 0), 10208 MEM_ADDR_SPACE (temp))) 10209 return replace_equiv_address (temp, 10210 copy_rtx (XEXP (temp, 0))); 10211 return temp; 10212 10213 case POLY_INT_CST: 10214 return immed_wide_int_const (poly_int_cst_value (exp), mode); 10215 10216 case SAVE_EXPR: 10217 { 10218 tree val = treeop0; 10219 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl, 10220 inner_reference_p); 10221 10222 if (!SAVE_EXPR_RESOLVED_P (exp)) 10223 { 10224 /* We can indeed still hit this case, typically via builtin 10225 expanders calling save_expr immediately before expanding 10226 something. Assume this means that we only have to deal 10227 with non-BLKmode values. */ 10228 gcc_assert (GET_MODE (ret) != BLKmode); 10229 10230 val = build_decl (curr_insn_location (), 10231 VAR_DECL, NULL, TREE_TYPE (exp)); 10232 DECL_ARTIFICIAL (val) = 1; 10233 DECL_IGNORED_P (val) = 1; 10234 treeop0 = val; 10235 TREE_OPERAND (exp, 0) = treeop0; 10236 SAVE_EXPR_RESOLVED_P (exp) = 1; 10237 10238 if (!CONSTANT_P (ret)) 10239 ret = copy_to_reg (ret); 10240 SET_DECL_RTL (val, ret); 10241 } 10242 10243 return ret; 10244 } 10245 10246 10247 case CONSTRUCTOR: 10248 /* If we don't need the result, just ensure we evaluate any 10249 subexpressions. */ 10250 if (ignore) 10251 { 10252 unsigned HOST_WIDE_INT idx; 10253 tree value; 10254 10255 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value) 10256 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL); 10257 10258 return const0_rtx; 10259 } 10260 10261 return expand_constructor (exp, target, modifier, false); 10262 10263 case TARGET_MEM_REF: 10264 { 10265 addr_space_t as 10266 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); 10267 enum insn_code icode; 10268 unsigned int align; 10269 10270 op0 = addr_for_mem_ref (exp, as, true); 10271 op0 = memory_address_addr_space (mode, op0, as); 10272 temp = gen_rtx_MEM (mode, op0); 10273 set_mem_attributes (temp, exp, 0); 10274 set_mem_addr_space (temp, as); 10275 align = get_object_alignment (exp); 10276 if (modifier != EXPAND_WRITE 10277 && modifier != EXPAND_MEMORY 10278 && mode != BLKmode 10279 && align < GET_MODE_ALIGNMENT (mode) 10280 /* If the target does not have special handling for unaligned 10281 loads of mode then it can use regular moves for them. */ 10282 && ((icode = optab_handler (movmisalign_optab, mode)) 10283 != CODE_FOR_nothing)) 10284 { 10285 struct expand_operand ops[2]; 10286 10287 /* We've already validated the memory, and we're creating a 10288 new pseudo destination. The predicates really can't fail, 10289 nor can the generator. */ 10290 create_output_operand (&ops[0], NULL_RTX, mode); 10291 create_fixed_operand (&ops[1], temp); 10292 expand_insn (icode, 2, ops); 10293 temp = ops[0].value; 10294 } 10295 return temp; 10296 } 10297 10298 case MEM_REF: 10299 { 10300 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp); 10301 addr_space_t as 10302 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); 10303 machine_mode address_mode; 10304 tree base = TREE_OPERAND (exp, 0); 10305 gimple *def_stmt; 10306 enum insn_code icode; 10307 unsigned align; 10308 /* Handle expansion of non-aliased memory with non-BLKmode. That 10309 might end up in a register. */ 10310 if (mem_ref_refers_to_non_mem_p (exp)) 10311 { 10312 poly_int64 offset = mem_ref_offset (exp).force_shwi (); 10313 base = TREE_OPERAND (base, 0); 10314 poly_uint64 type_size; 10315 if (known_eq (offset, 0) 10316 && !reverse 10317 && poly_int_tree_p (TYPE_SIZE (type), &type_size) 10318 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)), type_size)) 10319 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base), 10320 target, tmode, modifier); 10321 if (TYPE_MODE (type) == BLKmode) 10322 { 10323 temp = assign_stack_temp (DECL_MODE (base), 10324 GET_MODE_SIZE (DECL_MODE (base))); 10325 store_expr (base, temp, 0, false, false); 10326 temp = adjust_address (temp, BLKmode, offset); 10327 set_mem_size (temp, int_size_in_bytes (type)); 10328 return temp; 10329 } 10330 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type), 10331 bitsize_int (offset * BITS_PER_UNIT)); 10332 REF_REVERSE_STORAGE_ORDER (exp) = reverse; 10333 return expand_expr (exp, target, tmode, modifier); 10334 } 10335 address_mode = targetm.addr_space.address_mode (as); 10336 base = TREE_OPERAND (exp, 0); 10337 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR))) 10338 { 10339 tree mask = gimple_assign_rhs2 (def_stmt); 10340 base = build2 (BIT_AND_EXPR, TREE_TYPE (base), 10341 gimple_assign_rhs1 (def_stmt), mask); 10342 TREE_OPERAND (exp, 0) = base; 10343 } 10344 align = get_object_alignment (exp); 10345 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM); 10346 op0 = memory_address_addr_space (mode, op0, as); 10347 if (!integer_zerop (TREE_OPERAND (exp, 1))) 10348 { 10349 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode); 10350 op0 = simplify_gen_binary (PLUS, address_mode, op0, off); 10351 op0 = memory_address_addr_space (mode, op0, as); 10352 } 10353 temp = gen_rtx_MEM (mode, op0); 10354 set_mem_attributes (temp, exp, 0); 10355 set_mem_addr_space (temp, as); 10356 if (TREE_THIS_VOLATILE (exp)) 10357 MEM_VOLATILE_P (temp) = 1; 10358 if (modifier != EXPAND_WRITE 10359 && modifier != EXPAND_MEMORY 10360 && !inner_reference_p 10361 && mode != BLKmode 10362 && align < GET_MODE_ALIGNMENT (mode)) 10363 { 10364 if ((icode = optab_handler (movmisalign_optab, mode)) 10365 != CODE_FOR_nothing) 10366 { 10367 struct expand_operand ops[2]; 10368 10369 /* We've already validated the memory, and we're creating a 10370 new pseudo destination. The predicates really can't fail, 10371 nor can the generator. */ 10372 create_output_operand (&ops[0], NULL_RTX, mode); 10373 create_fixed_operand (&ops[1], temp); 10374 expand_insn (icode, 2, ops); 10375 temp = ops[0].value; 10376 } 10377 else if (targetm.slow_unaligned_access (mode, align)) 10378 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode), 10379 0, TYPE_UNSIGNED (TREE_TYPE (exp)), 10380 (modifier == EXPAND_STACK_PARM 10381 ? NULL_RTX : target), 10382 mode, mode, false, alt_rtl); 10383 } 10384 if (reverse 10385 && modifier != EXPAND_MEMORY 10386 && modifier != EXPAND_WRITE) 10387 temp = flip_storage_order (mode, temp); 10388 return temp; 10389 } 10390 10391 case ARRAY_REF: 10392 10393 { 10394 tree array = treeop0; 10395 tree index = treeop1; 10396 tree init; 10397 10398 /* Fold an expression like: "foo"[2]. 10399 This is not done in fold so it won't happen inside &. 10400 Don't fold if this is for wide characters since it's too 10401 difficult to do correctly and this is a very rare case. */ 10402 10403 if (modifier != EXPAND_CONST_ADDRESS 10404 && modifier != EXPAND_INITIALIZER 10405 && modifier != EXPAND_MEMORY) 10406 { 10407 tree t = fold_read_from_constant_string (exp); 10408 10409 if (t) 10410 return expand_expr (t, target, tmode, modifier); 10411 } 10412 10413 /* If this is a constant index into a constant array, 10414 just get the value from the array. Handle both the cases when 10415 we have an explicit constructor and when our operand is a variable 10416 that was declared const. */ 10417 10418 if (modifier != EXPAND_CONST_ADDRESS 10419 && modifier != EXPAND_INITIALIZER 10420 && modifier != EXPAND_MEMORY 10421 && TREE_CODE (array) == CONSTRUCTOR 10422 && ! TREE_SIDE_EFFECTS (array) 10423 && TREE_CODE (index) == INTEGER_CST) 10424 { 10425 unsigned HOST_WIDE_INT ix; 10426 tree field, value; 10427 10428 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix, 10429 field, value) 10430 if (tree_int_cst_equal (field, index)) 10431 { 10432 if (!TREE_SIDE_EFFECTS (value)) 10433 return expand_expr (fold (value), target, tmode, modifier); 10434 break; 10435 } 10436 } 10437 10438 else if (optimize >= 1 10439 && modifier != EXPAND_CONST_ADDRESS 10440 && modifier != EXPAND_INITIALIZER 10441 && modifier != EXPAND_MEMORY 10442 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array) 10443 && TREE_CODE (index) == INTEGER_CST 10444 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL) 10445 && (init = ctor_for_folding (array)) != error_mark_node) 10446 { 10447 if (init == NULL_TREE) 10448 { 10449 tree value = build_zero_cst (type); 10450 if (TREE_CODE (value) == CONSTRUCTOR) 10451 { 10452 /* If VALUE is a CONSTRUCTOR, this optimization is only 10453 useful if this doesn't store the CONSTRUCTOR into 10454 memory. If it does, it is more efficient to just 10455 load the data from the array directly. */ 10456 rtx ret = expand_constructor (value, target, 10457 modifier, true); 10458 if (ret == NULL_RTX) 10459 value = NULL_TREE; 10460 } 10461 10462 if (value) 10463 return expand_expr (value, target, tmode, modifier); 10464 } 10465 else if (TREE_CODE (init) == CONSTRUCTOR) 10466 { 10467 unsigned HOST_WIDE_INT ix; 10468 tree field, value; 10469 10470 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix, 10471 field, value) 10472 if (tree_int_cst_equal (field, index)) 10473 { 10474 if (TREE_SIDE_EFFECTS (value)) 10475 break; 10476 10477 if (TREE_CODE (value) == CONSTRUCTOR) 10478 { 10479 /* If VALUE is a CONSTRUCTOR, this 10480 optimization is only useful if 10481 this doesn't store the CONSTRUCTOR 10482 into memory. If it does, it is more 10483 efficient to just load the data from 10484 the array directly. */ 10485 rtx ret = expand_constructor (value, target, 10486 modifier, true); 10487 if (ret == NULL_RTX) 10488 break; 10489 } 10490 10491 return 10492 expand_expr (fold (value), target, tmode, modifier); 10493 } 10494 } 10495 else if (TREE_CODE (init) == STRING_CST) 10496 { 10497 tree low_bound = array_ref_low_bound (exp); 10498 tree index1 = fold_convert_loc (loc, sizetype, treeop1); 10499 10500 /* Optimize the special case of a zero lower bound. 10501 10502 We convert the lower bound to sizetype to avoid problems 10503 with constant folding. E.g. suppose the lower bound is 10504 1 and its mode is QI. Without the conversion 10505 (ARRAY + (INDEX - (unsigned char)1)) 10506 becomes 10507 (ARRAY + (-(unsigned char)1) + INDEX) 10508 which becomes 10509 (ARRAY + 255 + INDEX). Oops! */ 10510 if (!integer_zerop (low_bound)) 10511 index1 = size_diffop_loc (loc, index1, 10512 fold_convert_loc (loc, sizetype, 10513 low_bound)); 10514 10515 if (tree_fits_uhwi_p (index1) 10516 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0) 10517 { 10518 tree type = TREE_TYPE (TREE_TYPE (init)); 10519 scalar_int_mode mode; 10520 10521 if (is_int_mode (TYPE_MODE (type), &mode) 10522 && GET_MODE_SIZE (mode) == 1) 10523 return gen_int_mode (TREE_STRING_POINTER (init) 10524 [TREE_INT_CST_LOW (index1)], 10525 mode); 10526 } 10527 } 10528 } 10529 } 10530 goto normal_inner_ref; 10531 10532 case COMPONENT_REF: 10533 /* If the operand is a CONSTRUCTOR, we can just extract the 10534 appropriate field if it is present. */ 10535 if (TREE_CODE (treeop0) == CONSTRUCTOR) 10536 { 10537 unsigned HOST_WIDE_INT idx; 10538 tree field, value; 10539 scalar_int_mode field_mode; 10540 10541 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0), 10542 idx, field, value) 10543 if (field == treeop1 10544 /* We can normally use the value of the field in the 10545 CONSTRUCTOR. However, if this is a bitfield in 10546 an integral mode that we can fit in a HOST_WIDE_INT, 10547 we must mask only the number of bits in the bitfield, 10548 since this is done implicitly by the constructor. If 10549 the bitfield does not meet either of those conditions, 10550 we can't do this optimization. */ 10551 && (! DECL_BIT_FIELD (field) 10552 || (is_int_mode (DECL_MODE (field), &field_mode) 10553 && (GET_MODE_PRECISION (field_mode) 10554 <= HOST_BITS_PER_WIDE_INT)))) 10555 { 10556 if (DECL_BIT_FIELD (field) 10557 && modifier == EXPAND_STACK_PARM) 10558 target = 0; 10559 op0 = expand_expr (value, target, tmode, modifier); 10560 if (DECL_BIT_FIELD (field)) 10561 { 10562 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field)); 10563 scalar_int_mode imode 10564 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field)); 10565 10566 if (TYPE_UNSIGNED (TREE_TYPE (field))) 10567 { 10568 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1, 10569 imode); 10570 op0 = expand_and (imode, op0, op1, target); 10571 } 10572 else 10573 { 10574 int count = GET_MODE_PRECISION (imode) - bitsize; 10575 10576 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count, 10577 target, 0); 10578 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count, 10579 target, 0); 10580 } 10581 } 10582 10583 return op0; 10584 } 10585 } 10586 goto normal_inner_ref; 10587 10588 case BIT_FIELD_REF: 10589 case ARRAY_RANGE_REF: 10590 normal_inner_ref: 10591 { 10592 machine_mode mode1, mode2; 10593 poly_int64 bitsize, bitpos, bytepos; 10594 tree offset; 10595 int reversep, volatilep = 0, must_force_mem; 10596 tree tem 10597 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1, 10598 &unsignedp, &reversep, &volatilep); 10599 rtx orig_op0, memloc; 10600 bool clear_mem_expr = false; 10601 10602 /* If we got back the original object, something is wrong. Perhaps 10603 we are evaluating an expression too early. In any event, don't 10604 infinitely recurse. */ 10605 gcc_assert (tem != exp); 10606 10607 /* If TEM's type is a union of variable size, pass TARGET to the inner 10608 computation, since it will need a temporary and TARGET is known 10609 to have to do. This occurs in unchecked conversion in Ada. */ 10610 orig_op0 = op0 10611 = expand_expr_real (tem, 10612 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE 10613 && COMPLETE_TYPE_P (TREE_TYPE (tem)) 10614 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) 10615 != INTEGER_CST) 10616 && modifier != EXPAND_STACK_PARM 10617 ? target : NULL_RTX), 10618 VOIDmode, 10619 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier, 10620 NULL, true); 10621 10622 /* If the field has a mode, we want to access it in the 10623 field's mode, not the computed mode. 10624 If a MEM has VOIDmode (external with incomplete type), 10625 use BLKmode for it instead. */ 10626 if (MEM_P (op0)) 10627 { 10628 if (mode1 != VOIDmode) 10629 op0 = adjust_address (op0, mode1, 0); 10630 else if (GET_MODE (op0) == VOIDmode) 10631 op0 = adjust_address (op0, BLKmode, 0); 10632 } 10633 10634 mode2 10635 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0); 10636 10637 /* Make sure bitpos is not negative, it can wreak havoc later. */ 10638 if (maybe_lt (bitpos, 0)) 10639 { 10640 gcc_checking_assert (offset == NULL_TREE); 10641 offset = size_int (bits_to_bytes_round_down (bitpos)); 10642 bitpos = num_trailing_bits (bitpos); 10643 } 10644 10645 /* If we have either an offset, a BLKmode result, or a reference 10646 outside the underlying object, we must force it to memory. 10647 Such a case can occur in Ada if we have unchecked conversion 10648 of an expression from a scalar type to an aggregate type or 10649 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were 10650 passed a partially uninitialized object or a view-conversion 10651 to a larger size. */ 10652 must_force_mem = (offset 10653 || mode1 == BLKmode 10654 || (mode == BLKmode 10655 && !int_mode_for_size (bitsize, 1).exists ()) 10656 || maybe_gt (bitpos + bitsize, 10657 GET_MODE_BITSIZE (mode2))); 10658 10659 /* Handle CONCAT first. */ 10660 if (GET_CODE (op0) == CONCAT && !must_force_mem) 10661 { 10662 if (known_eq (bitpos, 0) 10663 && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0))) 10664 && COMPLEX_MODE_P (mode1) 10665 && COMPLEX_MODE_P (GET_MODE (op0)) 10666 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1)) 10667 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0))))) 10668 { 10669 if (reversep) 10670 op0 = flip_storage_order (GET_MODE (op0), op0); 10671 if (mode1 != GET_MODE (op0)) 10672 { 10673 rtx parts[2]; 10674 for (int i = 0; i < 2; i++) 10675 { 10676 rtx op = read_complex_part (op0, i != 0); 10677 if (GET_CODE (op) == SUBREG) 10678 op = force_reg (GET_MODE (op), op); 10679 rtx temp = gen_lowpart_common (GET_MODE_INNER (mode1), 10680 op); 10681 if (temp) 10682 op = temp; 10683 else 10684 { 10685 if (!REG_P (op) && !MEM_P (op)) 10686 op = force_reg (GET_MODE (op), op); 10687 op = gen_lowpart (GET_MODE_INNER (mode1), op); 10688 } 10689 parts[i] = op; 10690 } 10691 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]); 10692 } 10693 return op0; 10694 } 10695 if (known_eq (bitpos, 0) 10696 && known_eq (bitsize, 10697 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))) 10698 && maybe_ne (bitsize, 0)) 10699 { 10700 op0 = XEXP (op0, 0); 10701 mode2 = GET_MODE (op0); 10702 } 10703 else if (known_eq (bitpos, 10704 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0)))) 10705 && known_eq (bitsize, 10706 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1)))) 10707 && maybe_ne (bitpos, 0) 10708 && maybe_ne (bitsize, 0)) 10709 { 10710 op0 = XEXP (op0, 1); 10711 bitpos = 0; 10712 mode2 = GET_MODE (op0); 10713 } 10714 else 10715 /* Otherwise force into memory. */ 10716 must_force_mem = 1; 10717 } 10718 10719 /* If this is a constant, put it in a register if it is a legitimate 10720 constant and we don't need a memory reference. */ 10721 if (CONSTANT_P (op0) 10722 && mode2 != BLKmode 10723 && targetm.legitimate_constant_p (mode2, op0) 10724 && !must_force_mem) 10725 op0 = force_reg (mode2, op0); 10726 10727 /* Otherwise, if this is a constant, try to force it to the constant 10728 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it 10729 is a legitimate constant. */ 10730 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0))) 10731 op0 = validize_mem (memloc); 10732 10733 /* Otherwise, if this is a constant or the object is not in memory 10734 and need be, put it there. */ 10735 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem)) 10736 { 10737 memloc = assign_temp (TREE_TYPE (tem), 1, 1); 10738 emit_move_insn (memloc, op0); 10739 op0 = memloc; 10740 clear_mem_expr = true; 10741 } 10742 10743 if (offset) 10744 { 10745 machine_mode address_mode; 10746 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, 10747 EXPAND_SUM); 10748 10749 gcc_assert (MEM_P (op0)); 10750 10751 address_mode = get_address_mode (op0); 10752 if (GET_MODE (offset_rtx) != address_mode) 10753 { 10754 /* We cannot be sure that the RTL in offset_rtx is valid outside 10755 of a memory address context, so force it into a register 10756 before attempting to convert it to the desired mode. */ 10757 offset_rtx = force_operand (offset_rtx, NULL_RTX); 10758 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0); 10759 } 10760 10761 /* See the comment in expand_assignment for the rationale. */ 10762 if (mode1 != VOIDmode 10763 && maybe_ne (bitpos, 0) 10764 && maybe_gt (bitsize, 0) 10765 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos) 10766 && multiple_p (bitpos, bitsize) 10767 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1)) 10768 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1)) 10769 { 10770 op0 = adjust_address (op0, mode1, bytepos); 10771 bitpos = 0; 10772 } 10773 10774 op0 = offset_address (op0, offset_rtx, 10775 highest_pow2_factor (offset)); 10776 } 10777 10778 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT, 10779 record its alignment as BIGGEST_ALIGNMENT. */ 10780 if (MEM_P (op0) 10781 && known_eq (bitpos, 0) 10782 && offset != 0 10783 && is_aligning_offset (offset, tem)) 10784 set_mem_align (op0, BIGGEST_ALIGNMENT); 10785 10786 /* Don't forget about volatility even if this is a bitfield. */ 10787 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0)) 10788 { 10789 if (op0 == orig_op0) 10790 op0 = copy_rtx (op0); 10791 10792 MEM_VOLATILE_P (op0) = 1; 10793 } 10794 10795 /* In cases where an aligned union has an unaligned object 10796 as a field, we might be extracting a BLKmode value from 10797 an integer-mode (e.g., SImode) object. Handle this case 10798 by doing the extract into an object as wide as the field 10799 (which we know to be the width of a basic mode), then 10800 storing into memory, and changing the mode to BLKmode. */ 10801 if (mode1 == VOIDmode 10802 || REG_P (op0) || GET_CODE (op0) == SUBREG 10803 || (mode1 != BLKmode && ! direct_load[(int) mode1] 10804 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT 10805 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT 10806 && modifier != EXPAND_CONST_ADDRESS 10807 && modifier != EXPAND_INITIALIZER 10808 && modifier != EXPAND_MEMORY) 10809 /* If the bitfield is volatile and the bitsize 10810 is narrower than the access size of the bitfield, 10811 we need to extract bitfields from the access. */ 10812 || (volatilep && TREE_CODE (exp) == COMPONENT_REF 10813 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1)) 10814 && mode1 != BLKmode 10815 && maybe_lt (bitsize, GET_MODE_SIZE (mode1) * BITS_PER_UNIT)) 10816 /* If the field isn't aligned enough to fetch as a memref, 10817 fetch it as a bit field. */ 10818 || (mode1 != BLKmode 10819 && (((MEM_P (op0) 10820 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1) 10821 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode1)) 10822 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode) 10823 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode))) 10824 && modifier != EXPAND_MEMORY 10825 && ((modifier == EXPAND_CONST_ADDRESS 10826 || modifier == EXPAND_INITIALIZER) 10827 ? STRICT_ALIGNMENT 10828 : targetm.slow_unaligned_access (mode1, 10829 MEM_ALIGN (op0)))) 10830 || !multiple_p (bitpos, BITS_PER_UNIT))) 10831 /* If the type and the field are a constant size and the 10832 size of the type isn't the same size as the bitfield, 10833 we must use bitfield operations. */ 10834 || (known_size_p (bitsize) 10835 && TYPE_SIZE (TREE_TYPE (exp)) 10836 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp))) 10837 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))), 10838 bitsize))) 10839 { 10840 machine_mode ext_mode = mode; 10841 10842 if (ext_mode == BLKmode 10843 && ! (target != 0 && MEM_P (op0) 10844 && MEM_P (target) 10845 && multiple_p (bitpos, BITS_PER_UNIT))) 10846 ext_mode = int_mode_for_size (bitsize, 1).else_blk (); 10847 10848 if (ext_mode == BLKmode) 10849 { 10850 if (target == 0) 10851 target = assign_temp (type, 1, 1); 10852 10853 /* ??? Unlike the similar test a few lines below, this one is 10854 very likely obsolete. */ 10855 if (known_eq (bitsize, 0)) 10856 return target; 10857 10858 /* In this case, BITPOS must start at a byte boundary and 10859 TARGET, if specified, must be a MEM. */ 10860 gcc_assert (MEM_P (op0) 10861 && (!target || MEM_P (target))); 10862 10863 bytepos = exact_div (bitpos, BITS_PER_UNIT); 10864 poly_int64 bytesize = bits_to_bytes_round_up (bitsize); 10865 emit_block_move (target, 10866 adjust_address (op0, VOIDmode, bytepos), 10867 gen_int_mode (bytesize, Pmode), 10868 (modifier == EXPAND_STACK_PARM 10869 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL)); 10870 10871 return target; 10872 } 10873 10874 /* If we have nothing to extract, the result will be 0 for targets 10875 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always 10876 return 0 for the sake of consistency, as reading a zero-sized 10877 bitfield is valid in Ada and the value is fully specified. */ 10878 if (known_eq (bitsize, 0)) 10879 return const0_rtx; 10880 10881 op0 = validize_mem (op0); 10882 10883 if (MEM_P (op0) && REG_P (XEXP (op0, 0))) 10884 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); 10885 10886 /* If the result has a record type and the extraction is done in 10887 an integral mode, then the field may be not aligned on a byte 10888 boundary; in this case, if it has reverse storage order, it 10889 needs to be extracted as a scalar field with reverse storage 10890 order and put back into memory order afterwards. */ 10891 if (TREE_CODE (type) == RECORD_TYPE 10892 && GET_MODE_CLASS (ext_mode) == MODE_INT) 10893 reversep = TYPE_REVERSE_STORAGE_ORDER (type); 10894 10895 gcc_checking_assert (known_ge (bitpos, 0)); 10896 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, 10897 (modifier == EXPAND_STACK_PARM 10898 ? NULL_RTX : target), 10899 ext_mode, ext_mode, reversep, alt_rtl); 10900 10901 /* If the result has a record type and the mode of OP0 is an 10902 integral mode then, if BITSIZE is narrower than this mode 10903 and this is for big-endian data, we must put the field 10904 into the high-order bits. And we must also put it back 10905 into memory order if it has been previously reversed. */ 10906 scalar_int_mode op0_mode; 10907 if (TREE_CODE (type) == RECORD_TYPE 10908 && is_int_mode (GET_MODE (op0), &op0_mode)) 10909 { 10910 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode); 10911 10912 gcc_checking_assert (known_le (bitsize, size)); 10913 if (maybe_lt (bitsize, size) 10914 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN) 10915 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0, 10916 size - bitsize, op0, 1); 10917 10918 if (reversep) 10919 op0 = flip_storage_order (op0_mode, op0); 10920 } 10921 10922 /* If the result type is BLKmode, store the data into a temporary 10923 of the appropriate type, but with the mode corresponding to the 10924 mode for the data we have (op0's mode). */ 10925 if (mode == BLKmode) 10926 { 10927 rtx new_rtx 10928 = assign_stack_temp_for_type (ext_mode, 10929 GET_MODE_BITSIZE (ext_mode), 10930 type); 10931 emit_move_insn (new_rtx, op0); 10932 op0 = copy_rtx (new_rtx); 10933 PUT_MODE (op0, BLKmode); 10934 } 10935 10936 return op0; 10937 } 10938 10939 /* If the result is BLKmode, use that to access the object 10940 now as well. */ 10941 if (mode == BLKmode) 10942 mode1 = BLKmode; 10943 10944 /* Get a reference to just this component. */ 10945 bytepos = bits_to_bytes_round_down (bitpos); 10946 if (modifier == EXPAND_CONST_ADDRESS 10947 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) 10948 op0 = adjust_address_nv (op0, mode1, bytepos); 10949 else 10950 op0 = adjust_address (op0, mode1, bytepos); 10951 10952 if (op0 == orig_op0) 10953 op0 = copy_rtx (op0); 10954 10955 /* Don't set memory attributes if the base expression is 10956 SSA_NAME that got expanded as a MEM. In that case, we should 10957 just honor its original memory attributes. */ 10958 if (TREE_CODE (tem) != SSA_NAME || !MEM_P (orig_op0)) 10959 set_mem_attributes (op0, exp, 0); 10960 10961 if (REG_P (XEXP (op0, 0))) 10962 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); 10963 10964 /* If op0 is a temporary because the original expressions was forced 10965 to memory, clear MEM_EXPR so that the original expression cannot 10966 be marked as addressable through MEM_EXPR of the temporary. */ 10967 if (clear_mem_expr) 10968 set_mem_expr (op0, NULL_TREE); 10969 10970 MEM_VOLATILE_P (op0) |= volatilep; 10971 10972 if (reversep 10973 && modifier != EXPAND_MEMORY 10974 && modifier != EXPAND_WRITE) 10975 op0 = flip_storage_order (mode1, op0); 10976 10977 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode 10978 || modifier == EXPAND_CONST_ADDRESS 10979 || modifier == EXPAND_INITIALIZER) 10980 return op0; 10981 10982 if (target == 0) 10983 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode); 10984 10985 convert_move (target, op0, unsignedp); 10986 return target; 10987 } 10988 10989 case OBJ_TYPE_REF: 10990 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier); 10991 10992 case CALL_EXPR: 10993 /* All valid uses of __builtin_va_arg_pack () are removed during 10994 inlining. */ 10995 if (CALL_EXPR_VA_ARG_PACK (exp)) 10996 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp); 10997 { 10998 tree fndecl = get_callee_fndecl (exp), attr; 10999 11000 if (fndecl 11001 /* Don't diagnose the error attribute in thunks, those are 11002 artificially created. */ 11003 && !CALL_FROM_THUNK_P (exp) 11004 && (attr = lookup_attribute ("error", 11005 DECL_ATTRIBUTES (fndecl))) != NULL) 11006 { 11007 const char *ident = lang_hooks.decl_printable_name (fndecl, 1); 11008 error ("%Kcall to %qs declared with attribute error: %s", exp, 11009 identifier_to_locale (ident), 11010 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); 11011 } 11012 if (fndecl 11013 /* Don't diagnose the warning attribute in thunks, those are 11014 artificially created. */ 11015 && !CALL_FROM_THUNK_P (exp) 11016 && (attr = lookup_attribute ("warning", 11017 DECL_ATTRIBUTES (fndecl))) != NULL) 11018 { 11019 const char *ident = lang_hooks.decl_printable_name (fndecl, 1); 11020 warning_at (tree_nonartificial_location (exp), 11021 OPT_Wattribute_warning, 11022 "%Kcall to %qs declared with attribute warning: %s", 11023 exp, identifier_to_locale (ident), 11024 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr)))); 11025 } 11026 11027 /* Check for a built-in function. */ 11028 if (fndecl && fndecl_built_in_p (fndecl)) 11029 { 11030 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND); 11031 return expand_builtin (exp, target, subtarget, tmode, ignore); 11032 } 11033 } 11034 return expand_call (exp, target, ignore); 11035 11036 case VIEW_CONVERT_EXPR: 11037 op0 = NULL_RTX; 11038 11039 /* If we are converting to BLKmode, try to avoid an intermediate 11040 temporary by fetching an inner memory reference. */ 11041 if (mode == BLKmode 11042 && poly_int_tree_p (TYPE_SIZE (type)) 11043 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode 11044 && handled_component_p (treeop0)) 11045 { 11046 machine_mode mode1; 11047 poly_int64 bitsize, bitpos, bytepos; 11048 tree offset; 11049 int unsignedp, reversep, volatilep = 0; 11050 tree tem 11051 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1, 11052 &unsignedp, &reversep, &volatilep); 11053 rtx orig_op0; 11054 11055 /* ??? We should work harder and deal with non-zero offsets. */ 11056 if (!offset 11057 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos) 11058 && !reversep 11059 && known_size_p (bitsize) 11060 && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize)) 11061 { 11062 /* See the normal_inner_ref case for the rationale. */ 11063 orig_op0 11064 = expand_expr_real (tem, 11065 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE 11066 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem))) 11067 != INTEGER_CST) 11068 && modifier != EXPAND_STACK_PARM 11069 ? target : NULL_RTX), 11070 VOIDmode, 11071 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier, 11072 NULL, true); 11073 11074 if (MEM_P (orig_op0)) 11075 { 11076 op0 = orig_op0; 11077 11078 /* Get a reference to just this component. */ 11079 if (modifier == EXPAND_CONST_ADDRESS 11080 || modifier == EXPAND_SUM 11081 || modifier == EXPAND_INITIALIZER) 11082 op0 = adjust_address_nv (op0, mode, bytepos); 11083 else 11084 op0 = adjust_address (op0, mode, bytepos); 11085 11086 if (op0 == orig_op0) 11087 op0 = copy_rtx (op0); 11088 11089 set_mem_attributes (op0, treeop0, 0); 11090 if (REG_P (XEXP (op0, 0))) 11091 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0)); 11092 11093 MEM_VOLATILE_P (op0) |= volatilep; 11094 } 11095 } 11096 } 11097 11098 if (!op0) 11099 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier, 11100 NULL, inner_reference_p); 11101 11102 /* If the input and output modes are both the same, we are done. */ 11103 if (mode == GET_MODE (op0)) 11104 ; 11105 /* If neither mode is BLKmode, and both modes are the same size 11106 then we can use gen_lowpart. */ 11107 else if (mode != BLKmode 11108 && GET_MODE (op0) != BLKmode 11109 && known_eq (GET_MODE_PRECISION (mode), 11110 GET_MODE_PRECISION (GET_MODE (op0))) 11111 && !COMPLEX_MODE_P (GET_MODE (op0))) 11112 { 11113 if (GET_CODE (op0) == SUBREG) 11114 op0 = force_reg (GET_MODE (op0), op0); 11115 temp = gen_lowpart_common (mode, op0); 11116 if (temp) 11117 op0 = temp; 11118 else 11119 { 11120 if (!REG_P (op0) && !MEM_P (op0)) 11121 op0 = force_reg (GET_MODE (op0), op0); 11122 op0 = gen_lowpart (mode, op0); 11123 } 11124 } 11125 /* If both types are integral, convert from one mode to the other. */ 11126 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0))) 11127 op0 = convert_modes (mode, GET_MODE (op0), op0, 11128 TYPE_UNSIGNED (TREE_TYPE (treeop0))); 11129 /* If the output type is a bit-field type, do an extraction. */ 11130 else if (reduce_bit_field) 11131 return extract_bit_field (op0, TYPE_PRECISION (type), 0, 11132 TYPE_UNSIGNED (type), NULL_RTX, 11133 mode, mode, false, NULL); 11134 /* As a last resort, spill op0 to memory, and reload it in a 11135 different mode. */ 11136 else if (!MEM_P (op0)) 11137 { 11138 /* If the operand is not a MEM, force it into memory. Since we 11139 are going to be changing the mode of the MEM, don't call 11140 force_const_mem for constants because we don't allow pool 11141 constants to change mode. */ 11142 tree inner_type = TREE_TYPE (treeop0); 11143 11144 gcc_assert (!TREE_ADDRESSABLE (exp)); 11145 11146 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type)) 11147 target 11148 = assign_stack_temp_for_type 11149 (TYPE_MODE (inner_type), 11150 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type); 11151 11152 emit_move_insn (target, op0); 11153 op0 = target; 11154 } 11155 11156 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the 11157 output type is such that the operand is known to be aligned, indicate 11158 that it is. Otherwise, we need only be concerned about alignment for 11159 non-BLKmode results. */ 11160 if (MEM_P (op0)) 11161 { 11162 enum insn_code icode; 11163 11164 if (modifier != EXPAND_WRITE 11165 && modifier != EXPAND_MEMORY 11166 && !inner_reference_p 11167 && mode != BLKmode 11168 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode)) 11169 { 11170 /* If the target does have special handling for unaligned 11171 loads of mode then use them. */ 11172 if ((icode = optab_handler (movmisalign_optab, mode)) 11173 != CODE_FOR_nothing) 11174 { 11175 rtx reg; 11176 11177 op0 = adjust_address (op0, mode, 0); 11178 /* We've already validated the memory, and we're creating a 11179 new pseudo destination. The predicates really can't 11180 fail. */ 11181 reg = gen_reg_rtx (mode); 11182 11183 /* Nor can the insn generator. */ 11184 rtx_insn *insn = GEN_FCN (icode) (reg, op0); 11185 emit_insn (insn); 11186 return reg; 11187 } 11188 else if (STRICT_ALIGNMENT) 11189 { 11190 poly_uint64 mode_size = GET_MODE_SIZE (mode); 11191 poly_uint64 temp_size = mode_size; 11192 if (GET_MODE (op0) != BLKmode) 11193 temp_size = upper_bound (temp_size, 11194 GET_MODE_SIZE (GET_MODE (op0))); 11195 rtx new_rtx 11196 = assign_stack_temp_for_type (mode, temp_size, type); 11197 rtx new_with_op0_mode 11198 = adjust_address (new_rtx, GET_MODE (op0), 0); 11199 11200 gcc_assert (!TREE_ADDRESSABLE (exp)); 11201 11202 if (GET_MODE (op0) == BLKmode) 11203 { 11204 rtx size_rtx = gen_int_mode (mode_size, Pmode); 11205 emit_block_move (new_with_op0_mode, op0, size_rtx, 11206 (modifier == EXPAND_STACK_PARM 11207 ? BLOCK_OP_CALL_PARM 11208 : BLOCK_OP_NORMAL)); 11209 } 11210 else 11211 emit_move_insn (new_with_op0_mode, op0); 11212 11213 op0 = new_rtx; 11214 } 11215 } 11216 11217 op0 = adjust_address (op0, mode, 0); 11218 } 11219 11220 return op0; 11221 11222 case MODIFY_EXPR: 11223 { 11224 tree lhs = treeop0; 11225 tree rhs = treeop1; 11226 gcc_assert (ignore); 11227 11228 /* Check for |= or &= of a bitfield of size one into another bitfield 11229 of size 1. In this case, (unless we need the result of the 11230 assignment) we can do this more efficiently with a 11231 test followed by an assignment, if necessary. 11232 11233 ??? At this point, we can't get a BIT_FIELD_REF here. But if 11234 things change so we do, this code should be enhanced to 11235 support it. */ 11236 if (TREE_CODE (lhs) == COMPONENT_REF 11237 && (TREE_CODE (rhs) == BIT_IOR_EXPR 11238 || TREE_CODE (rhs) == BIT_AND_EXPR) 11239 && TREE_OPERAND (rhs, 0) == lhs 11240 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF 11241 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1))) 11242 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1)))) 11243 { 11244 rtx_code_label *label = gen_label_rtx (); 11245 int value = TREE_CODE (rhs) == BIT_IOR_EXPR; 11246 profile_probability prob = profile_probability::uninitialized (); 11247 if (value) 11248 jumpifnot (TREE_OPERAND (rhs, 1), label, prob); 11249 else 11250 jumpif (TREE_OPERAND (rhs, 1), label, prob); 11251 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value), 11252 false); 11253 do_pending_stack_adjust (); 11254 emit_label (label); 11255 return const0_rtx; 11256 } 11257 11258 expand_assignment (lhs, rhs, false); 11259 return const0_rtx; 11260 } 11261 11262 case ADDR_EXPR: 11263 return expand_expr_addr_expr (exp, target, tmode, modifier); 11264 11265 case REALPART_EXPR: 11266 op0 = expand_normal (treeop0); 11267 return read_complex_part (op0, false); 11268 11269 case IMAGPART_EXPR: 11270 op0 = expand_normal (treeop0); 11271 return read_complex_part (op0, true); 11272 11273 case RETURN_EXPR: 11274 case LABEL_EXPR: 11275 case GOTO_EXPR: 11276 case SWITCH_EXPR: 11277 case ASM_EXPR: 11278 /* Expanded in cfgexpand.c. */ 11279 gcc_unreachable (); 11280 11281 case TRY_CATCH_EXPR: 11282 case CATCH_EXPR: 11283 case EH_FILTER_EXPR: 11284 case TRY_FINALLY_EXPR: 11285 /* Lowered by tree-eh.c. */ 11286 gcc_unreachable (); 11287 11288 case WITH_CLEANUP_EXPR: 11289 case CLEANUP_POINT_EXPR: 11290 case TARGET_EXPR: 11291 case CASE_LABEL_EXPR: 11292 case VA_ARG_EXPR: 11293 case BIND_EXPR: 11294 case INIT_EXPR: 11295 case CONJ_EXPR: 11296 case COMPOUND_EXPR: 11297 case PREINCREMENT_EXPR: 11298 case PREDECREMENT_EXPR: 11299 case POSTINCREMENT_EXPR: 11300 case POSTDECREMENT_EXPR: 11301 case LOOP_EXPR: 11302 case EXIT_EXPR: 11303 case COMPOUND_LITERAL_EXPR: 11304 /* Lowered by gimplify.c. */ 11305 gcc_unreachable (); 11306 11307 case FDESC_EXPR: 11308 /* Function descriptors are not valid except for as 11309 initialization constants, and should not be expanded. */ 11310 gcc_unreachable (); 11311 11312 case WITH_SIZE_EXPR: 11313 /* WITH_SIZE_EXPR expands to its first argument. The caller should 11314 have pulled out the size to use in whatever context it needed. */ 11315 return expand_expr_real (treeop0, original_target, tmode, 11316 modifier, alt_rtl, inner_reference_p); 11317 11318 default: 11319 return expand_expr_real_2 (&ops, target, tmode, modifier); 11320 } 11321 } 11322 11323 /* Subroutine of above: reduce EXP to the precision of TYPE (in the 11324 signedness of TYPE), possibly returning the result in TARGET. 11325 TYPE is known to be a partial integer type. */ 11326 static rtx 11327 reduce_to_bit_field_precision (rtx exp, rtx target, tree type) 11328 { 11329 HOST_WIDE_INT prec = TYPE_PRECISION (type); 11330 if (target && GET_MODE (target) != GET_MODE (exp)) 11331 target = 0; 11332 /* For constant values, reduce using build_int_cst_type. */ 11333 poly_int64 const_exp; 11334 if (poly_int_rtx_p (exp, &const_exp)) 11335 { 11336 tree t = build_int_cst_type (type, const_exp); 11337 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL); 11338 } 11339 else if (TYPE_UNSIGNED (type)) 11340 { 11341 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp)); 11342 rtx mask = immed_wide_int_const 11343 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode); 11344 return expand_and (mode, exp, mask, target); 11345 } 11346 else 11347 { 11348 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp)); 11349 int count = GET_MODE_PRECISION (mode) - prec; 11350 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0); 11351 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0); 11352 } 11353 } 11354 11355 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that 11356 when applied to the address of EXP produces an address known to be 11357 aligned more than BIGGEST_ALIGNMENT. */ 11358 11359 static int 11360 is_aligning_offset (const_tree offset, const_tree exp) 11361 { 11362 /* Strip off any conversions. */ 11363 while (CONVERT_EXPR_P (offset)) 11364 offset = TREE_OPERAND (offset, 0); 11365 11366 /* We must now have a BIT_AND_EXPR with a constant that is one less than 11367 power of 2 and which is larger than BIGGEST_ALIGNMENT. */ 11368 if (TREE_CODE (offset) != BIT_AND_EXPR 11369 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1)) 11370 || compare_tree_int (TREE_OPERAND (offset, 1), 11371 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0 11372 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1)) 11373 return 0; 11374 11375 /* Look at the first operand of BIT_AND_EXPR and strip any conversion. 11376 It must be NEGATE_EXPR. Then strip any more conversions. */ 11377 offset = TREE_OPERAND (offset, 0); 11378 while (CONVERT_EXPR_P (offset)) 11379 offset = TREE_OPERAND (offset, 0); 11380 11381 if (TREE_CODE (offset) != NEGATE_EXPR) 11382 return 0; 11383 11384 offset = TREE_OPERAND (offset, 0); 11385 while (CONVERT_EXPR_P (offset)) 11386 offset = TREE_OPERAND (offset, 0); 11387 11388 /* This must now be the address of EXP. */ 11389 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp; 11390 } 11391 11392 /* Return the tree node if an ARG corresponds to a string constant or zero 11393 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly 11394 non-constant) offset in bytes within the string that ARG is accessing. 11395 If MEM_SIZE is non-zero the storage size of the memory is returned. 11396 If DECL is non-zero the constant declaration is returned if available. */ 11397 11398 tree 11399 string_constant (tree arg, tree *ptr_offset, tree *mem_size, tree *decl) 11400 { 11401 tree array; 11402 STRIP_NOPS (arg); 11403 11404 /* Non-constant index into the character array in an ARRAY_REF 11405 expression or null. */ 11406 tree varidx = NULL_TREE; 11407 11408 poly_int64 base_off = 0; 11409 11410 if (TREE_CODE (arg) == ADDR_EXPR) 11411 { 11412 arg = TREE_OPERAND (arg, 0); 11413 tree ref = arg; 11414 if (TREE_CODE (arg) == ARRAY_REF) 11415 { 11416 tree idx = TREE_OPERAND (arg, 1); 11417 if (TREE_CODE (idx) != INTEGER_CST) 11418 { 11419 /* From a pointer (but not array) argument extract the variable 11420 index to prevent get_addr_base_and_unit_offset() from failing 11421 due to it. Use it later to compute the non-constant offset 11422 into the string and return it to the caller. */ 11423 varidx = idx; 11424 ref = TREE_OPERAND (arg, 0); 11425 11426 if (TREE_CODE (TREE_TYPE (arg)) == ARRAY_TYPE) 11427 return NULL_TREE; 11428 11429 if (!integer_zerop (array_ref_low_bound (arg))) 11430 return NULL_TREE; 11431 11432 if (!integer_onep (array_ref_element_size (arg))) 11433 return NULL_TREE; 11434 } 11435 } 11436 array = get_addr_base_and_unit_offset (ref, &base_off); 11437 if (!array 11438 || (TREE_CODE (array) != VAR_DECL 11439 && TREE_CODE (array) != CONST_DECL 11440 && TREE_CODE (array) != STRING_CST)) 11441 return NULL_TREE; 11442 } 11443 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR) 11444 { 11445 tree arg0 = TREE_OPERAND (arg, 0); 11446 tree arg1 = TREE_OPERAND (arg, 1); 11447 11448 tree offset; 11449 tree str = string_constant (arg0, &offset, mem_size, decl); 11450 if (!str) 11451 { 11452 str = string_constant (arg1, &offset, mem_size, decl); 11453 arg1 = arg0; 11454 } 11455 11456 if (str) 11457 { 11458 /* Avoid pointers to arrays (see bug 86622). */ 11459 if (POINTER_TYPE_P (TREE_TYPE (arg)) 11460 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg))) == ARRAY_TYPE 11461 && !(decl && !*decl) 11462 && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl)) 11463 && mem_size && tree_fits_uhwi_p (*mem_size) 11464 && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl)))) 11465 return NULL_TREE; 11466 11467 tree type = TREE_TYPE (offset); 11468 arg1 = fold_convert (type, arg1); 11469 *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, arg1); 11470 return str; 11471 } 11472 return NULL_TREE; 11473 } 11474 else if (TREE_CODE (arg) == SSA_NAME) 11475 { 11476 gimple *stmt = SSA_NAME_DEF_STMT (arg); 11477 if (!is_gimple_assign (stmt)) 11478 return NULL_TREE; 11479 11480 tree rhs1 = gimple_assign_rhs1 (stmt); 11481 tree_code code = gimple_assign_rhs_code (stmt); 11482 if (code == ADDR_EXPR) 11483 return string_constant (rhs1, ptr_offset, mem_size, decl); 11484 else if (code != POINTER_PLUS_EXPR) 11485 return NULL_TREE; 11486 11487 tree offset; 11488 if (tree str = string_constant (rhs1, &offset, mem_size, decl)) 11489 { 11490 /* Avoid pointers to arrays (see bug 86622). */ 11491 if (POINTER_TYPE_P (TREE_TYPE (rhs1)) 11492 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1))) == ARRAY_TYPE 11493 && !(decl && !*decl) 11494 && !(decl && tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl)) 11495 && mem_size && tree_fits_uhwi_p (*mem_size) 11496 && tree_int_cst_equal (*mem_size, DECL_SIZE_UNIT (*decl)))) 11497 return NULL_TREE; 11498 11499 tree rhs2 = gimple_assign_rhs2 (stmt); 11500 tree type = TREE_TYPE (offset); 11501 rhs2 = fold_convert (type, rhs2); 11502 *ptr_offset = fold_build2 (PLUS_EXPR, type, offset, rhs2); 11503 return str; 11504 } 11505 return NULL_TREE; 11506 } 11507 else if (DECL_P (arg)) 11508 array = arg; 11509 else 11510 return NULL_TREE; 11511 11512 tree offset = wide_int_to_tree (sizetype, base_off); 11513 if (varidx) 11514 { 11515 if (TREE_CODE (TREE_TYPE (array)) != ARRAY_TYPE) 11516 return NULL_TREE; 11517 11518 gcc_assert (TREE_CODE (arg) == ARRAY_REF); 11519 tree chartype = TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg, 0))); 11520 if (TREE_CODE (chartype) != INTEGER_TYPE) 11521 return NULL; 11522 11523 offset = fold_convert (sizetype, varidx); 11524 } 11525 11526 if (TREE_CODE (array) == STRING_CST) 11527 { 11528 *ptr_offset = fold_convert (sizetype, offset); 11529 if (mem_size) 11530 *mem_size = TYPE_SIZE_UNIT (TREE_TYPE (array)); 11531 if (decl) 11532 *decl = NULL_TREE; 11533 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array))) 11534 >= TREE_STRING_LENGTH (array)); 11535 return array; 11536 } 11537 11538 if (!VAR_P (array) && TREE_CODE (array) != CONST_DECL) 11539 return NULL_TREE; 11540 11541 tree init = ctor_for_folding (array); 11542 11543 /* Handle variables initialized with string literals. */ 11544 if (!init || init == error_mark_node) 11545 return NULL_TREE; 11546 if (TREE_CODE (init) == CONSTRUCTOR) 11547 { 11548 /* Convert the 64-bit constant offset to a wider type to avoid 11549 overflow. */ 11550 offset_int wioff; 11551 if (!base_off.is_constant (&wioff)) 11552 return NULL_TREE; 11553 11554 wioff *= BITS_PER_UNIT; 11555 if (!wi::fits_uhwi_p (wioff)) 11556 return NULL_TREE; 11557 11558 base_off = wioff.to_uhwi (); 11559 unsigned HOST_WIDE_INT fieldoff = 0; 11560 init = fold_ctor_reference (NULL_TREE, init, base_off, 0, array, 11561 &fieldoff); 11562 HOST_WIDE_INT cstoff; 11563 if (!base_off.is_constant (&cstoff)) 11564 return NULL_TREE; 11565 11566 cstoff = (cstoff - fieldoff) / BITS_PER_UNIT; 11567 tree off = build_int_cst (sizetype, cstoff); 11568 if (varidx) 11569 offset = fold_build2 (PLUS_EXPR, TREE_TYPE (offset), offset, off); 11570 else 11571 offset = off; 11572 } 11573 11574 if (!init) 11575 return NULL_TREE; 11576 11577 *ptr_offset = offset; 11578 11579 tree eltype = TREE_TYPE (init); 11580 tree initsize = TYPE_SIZE_UNIT (eltype); 11581 if (mem_size) 11582 *mem_size = initsize; 11583 11584 if (decl) 11585 *decl = array; 11586 11587 if (TREE_CODE (init) == INTEGER_CST 11588 && (TREE_CODE (TREE_TYPE (array)) == INTEGER_TYPE 11589 || TYPE_MAIN_VARIANT (eltype) == char_type_node)) 11590 { 11591 /* For a reference to (address of) a single constant character, 11592 store the native representation of the character in CHARBUF. 11593 If the reference is to an element of an array or a member 11594 of a struct, only consider narrow characters until ctors 11595 for wide character arrays are transformed to STRING_CSTs 11596 like those for narrow arrays. */ 11597 unsigned char charbuf[MAX_BITSIZE_MODE_ANY_MODE / BITS_PER_UNIT]; 11598 int len = native_encode_expr (init, charbuf, sizeof charbuf, 0); 11599 if (len > 0) 11600 { 11601 /* Construct a string literal with elements of ELTYPE and 11602 the representation above. Then strip 11603 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */ 11604 init = build_string_literal (len, (char *)charbuf, eltype); 11605 init = TREE_OPERAND (TREE_OPERAND (init, 0), 0); 11606 } 11607 } 11608 11609 if (TREE_CODE (init) != STRING_CST) 11610 return NULL_TREE; 11611 11612 gcc_checking_assert (tree_to_shwi (initsize) >= TREE_STRING_LENGTH (init)); 11613 11614 return init; 11615 } 11616 11617 /* Compute the modular multiplicative inverse of A modulo M 11618 using extended Euclid's algorithm. Assumes A and M are coprime. */ 11619 static wide_int 11620 mod_inv (const wide_int &a, const wide_int &b) 11621 { 11622 /* Verify the assumption. */ 11623 gcc_checking_assert (wi::eq_p (wi::gcd (a, b), 1)); 11624 11625 unsigned int p = a.get_precision () + 1; 11626 gcc_checking_assert (b.get_precision () + 1 == p); 11627 wide_int c = wide_int::from (a, p, UNSIGNED); 11628 wide_int d = wide_int::from (b, p, UNSIGNED); 11629 wide_int x0 = wide_int::from (0, p, UNSIGNED); 11630 wide_int x1 = wide_int::from (1, p, UNSIGNED); 11631 11632 if (wi::eq_p (b, 1)) 11633 return wide_int::from (1, p, UNSIGNED); 11634 11635 while (wi::gt_p (c, 1, UNSIGNED)) 11636 { 11637 wide_int t = d; 11638 wide_int q = wi::divmod_trunc (c, d, UNSIGNED, &d); 11639 c = t; 11640 wide_int s = x0; 11641 x0 = wi::sub (x1, wi::mul (q, x0)); 11642 x1 = s; 11643 } 11644 if (wi::lt_p (x1, 0, SIGNED)) 11645 x1 += d; 11646 return x1; 11647 } 11648 11649 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2 11650 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)): 11651 for C2 > 0 to x & C3 == C2 11652 for C2 < 0 to x & C3 == (C2 & C3). */ 11653 enum tree_code 11654 maybe_optimize_pow2p_mod_cmp (enum tree_code code, tree *arg0, tree *arg1) 11655 { 11656 gimple *stmt = get_def_for_expr (*arg0, TRUNC_MOD_EXPR); 11657 tree treeop0 = gimple_assign_rhs1 (stmt); 11658 tree treeop1 = gimple_assign_rhs2 (stmt); 11659 tree type = TREE_TYPE (*arg0); 11660 scalar_int_mode mode; 11661 if (!is_a <scalar_int_mode> (TYPE_MODE (type), &mode)) 11662 return code; 11663 if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type) 11664 || TYPE_PRECISION (type) <= 1 11665 || TYPE_UNSIGNED (type) 11666 /* Signed x % c == 0 should have been optimized into unsigned modulo 11667 earlier. */ 11668 || integer_zerop (*arg1) 11669 /* If c is known to be non-negative, modulo will be expanded as unsigned 11670 modulo. */ 11671 || get_range_pos_neg (treeop0) == 1) 11672 return code; 11673 11674 /* x % c == d where d < 0 && d <= -c should be always false. */ 11675 if (tree_int_cst_sgn (*arg1) == -1 11676 && -wi::to_widest (treeop1) >= wi::to_widest (*arg1)) 11677 return code; 11678 11679 int prec = TYPE_PRECISION (type); 11680 wide_int w = wi::to_wide (treeop1) - 1; 11681 w |= wi::shifted_mask (0, prec - 1, true, prec); 11682 tree c3 = wide_int_to_tree (type, w); 11683 tree c4 = *arg1; 11684 if (tree_int_cst_sgn (*arg1) == -1) 11685 c4 = wide_int_to_tree (type, w & wi::to_wide (*arg1)); 11686 11687 rtx op0 = expand_normal (treeop0); 11688 treeop0 = make_tree (TREE_TYPE (treeop0), op0); 11689 11690 bool speed_p = optimize_insn_for_speed_p (); 11691 11692 do_pending_stack_adjust (); 11693 11694 location_t loc = gimple_location (stmt); 11695 struct separate_ops ops; 11696 ops.code = TRUNC_MOD_EXPR; 11697 ops.location = loc; 11698 ops.type = TREE_TYPE (treeop0); 11699 ops.op0 = treeop0; 11700 ops.op1 = treeop1; 11701 ops.op2 = NULL_TREE; 11702 start_sequence (); 11703 rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type), 11704 EXPAND_NORMAL); 11705 rtx_insn *moinsns = get_insns (); 11706 end_sequence (); 11707 11708 unsigned mocost = seq_cost (moinsns, speed_p); 11709 mocost += rtx_cost (mor, mode, EQ, 0, speed_p); 11710 mocost += rtx_cost (expand_normal (*arg1), mode, EQ, 1, speed_p); 11711 11712 ops.code = BIT_AND_EXPR; 11713 ops.location = loc; 11714 ops.type = TREE_TYPE (treeop0); 11715 ops.op0 = treeop0; 11716 ops.op1 = c3; 11717 ops.op2 = NULL_TREE; 11718 start_sequence (); 11719 rtx mur = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type), 11720 EXPAND_NORMAL); 11721 rtx_insn *muinsns = get_insns (); 11722 end_sequence (); 11723 11724 unsigned mucost = seq_cost (muinsns, speed_p); 11725 mucost += rtx_cost (mur, mode, EQ, 0, speed_p); 11726 mucost += rtx_cost (expand_normal (c4), mode, EQ, 1, speed_p); 11727 11728 if (mocost <= mucost) 11729 { 11730 emit_insn (moinsns); 11731 *arg0 = make_tree (TREE_TYPE (*arg0), mor); 11732 return code; 11733 } 11734 11735 emit_insn (muinsns); 11736 *arg0 = make_tree (TREE_TYPE (*arg0), mur); 11737 *arg1 = c4; 11738 return code; 11739 } 11740 11741 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2). 11742 If C1 is odd to: 11743 (X - C2) * C3 <= C4 (or >), where 11744 C3 is modular multiplicative inverse of C1 and 1<<prec and 11745 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter 11746 if C2 > ((1<<prec) - 1) % C1). 11747 If C1 is even, S = ctz (C1) and C2 is 0, use 11748 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative 11749 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S. 11750 11751 For signed (X % C1) == 0 if C1 is odd to (all operations in it 11752 unsigned): 11753 (X * C3) + C4 <= 2 * C4, where 11754 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and 11755 C4 is ((1<<(prec - 1) - 1) / C1). 11756 If C1 is even, S = ctz(C1), use 11757 ((X * C3) + C4) r>> S <= (C4 >> (S - 1)) 11758 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec 11759 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S). 11760 11761 See the Hacker's Delight book, section 10-17. */ 11762 enum tree_code 11763 maybe_optimize_mod_cmp (enum tree_code code, tree *arg0, tree *arg1) 11764 { 11765 gcc_checking_assert (code == EQ_EXPR || code == NE_EXPR); 11766 gcc_checking_assert (TREE_CODE (*arg1) == INTEGER_CST); 11767 11768 if (optimize < 2) 11769 return code; 11770 11771 gimple *stmt = get_def_for_expr (*arg0, TRUNC_MOD_EXPR); 11772 if (stmt == NULL) 11773 return code; 11774 11775 tree treeop0 = gimple_assign_rhs1 (stmt); 11776 tree treeop1 = gimple_assign_rhs2 (stmt); 11777 if (TREE_CODE (treeop0) != SSA_NAME 11778 || TREE_CODE (treeop1) != INTEGER_CST 11779 /* Don't optimize the undefined behavior case x % 0; 11780 x % 1 should have been optimized into zero, punt if 11781 it makes it here for whatever reason; 11782 x % -c should have been optimized into x % c. */ 11783 || compare_tree_int (treeop1, 2) <= 0 11784 /* Likewise x % c == d where d >= c should be always false. */ 11785 || tree_int_cst_le (treeop1, *arg1)) 11786 return code; 11787 11788 /* Unsigned x % pow2 is handled right already, for signed 11789 modulo handle it in maybe_optimize_pow2p_mod_cmp. */ 11790 if (integer_pow2p (treeop1)) 11791 return maybe_optimize_pow2p_mod_cmp (code, arg0, arg1); 11792 11793 tree type = TREE_TYPE (*arg0); 11794 scalar_int_mode mode; 11795 if (!is_a <scalar_int_mode> (TYPE_MODE (type), &mode)) 11796 return code; 11797 if (GET_MODE_BITSIZE (mode) != TYPE_PRECISION (type) 11798 || TYPE_PRECISION (type) <= 1) 11799 return code; 11800 11801 signop sgn = UNSIGNED; 11802 /* If both operands are known to have the sign bit clear, handle 11803 even the signed modulo case as unsigned. treeop1 is always 11804 positive >= 2, checked above. */ 11805 if (!TYPE_UNSIGNED (type) && get_range_pos_neg (treeop0) != 1) 11806 sgn = SIGNED; 11807 11808 if (!TYPE_UNSIGNED (type)) 11809 { 11810 if (tree_int_cst_sgn (*arg1) == -1) 11811 return code; 11812 type = unsigned_type_for (type); 11813 if (!type || TYPE_MODE (type) != TYPE_MODE (TREE_TYPE (*arg0))) 11814 return code; 11815 } 11816 11817 int prec = TYPE_PRECISION (type); 11818 wide_int w = wi::to_wide (treeop1); 11819 int shift = wi::ctz (w); 11820 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if 11821 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0. 11822 If C1 is odd, we can handle all cases by subtracting 11823 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases 11824 e.g. by testing for overflow on the subtraction, punt on that for now 11825 though. */ 11826 if ((sgn == SIGNED || shift) && !integer_zerop (*arg1)) 11827 { 11828 if (sgn == SIGNED) 11829 return code; 11830 wide_int x = wi::umod_trunc (wi::mask (prec, false, prec), w); 11831 if (wi::gtu_p (wi::to_wide (*arg1), x)) 11832 return code; 11833 } 11834 11835 imm_use_iterator imm_iter; 11836 use_operand_p use_p; 11837 FOR_EACH_IMM_USE_FAST (use_p, imm_iter, treeop0) 11838 { 11839 gimple *use_stmt = USE_STMT (use_p); 11840 /* Punt if treeop0 is used in the same bb in a division 11841 or another modulo with the same divisor. We should expect 11842 the division and modulo combined together. */ 11843 if (use_stmt == stmt 11844 || gimple_bb (use_stmt) != gimple_bb (stmt)) 11845 continue; 11846 if (!is_gimple_assign (use_stmt) 11847 || (gimple_assign_rhs_code (use_stmt) != TRUNC_DIV_EXPR 11848 && gimple_assign_rhs_code (use_stmt) != TRUNC_MOD_EXPR)) 11849 continue; 11850 if (gimple_assign_rhs1 (use_stmt) != treeop0 11851 || !operand_equal_p (gimple_assign_rhs2 (use_stmt), treeop1, 0)) 11852 continue; 11853 return code; 11854 } 11855 11856 w = wi::lrshift (w, shift); 11857 wide_int a = wide_int::from (w, prec + 1, UNSIGNED); 11858 wide_int b = wi::shifted_mask (prec, 1, false, prec + 1); 11859 wide_int m = wide_int::from (mod_inv (a, b), prec, UNSIGNED); 11860 tree c3 = wide_int_to_tree (type, m); 11861 tree c5 = NULL_TREE; 11862 wide_int d, e; 11863 if (sgn == UNSIGNED) 11864 { 11865 d = wi::divmod_trunc (wi::mask (prec, false, prec), w, UNSIGNED, &e); 11866 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1, 11867 otherwise use < or subtract one from C4. E.g. for 11868 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but 11869 x % 3U == 1 already needs to be 11870 (x - 1) * 0xaaaaaaabU <= 0x55555554. */ 11871 if (!shift && wi::gtu_p (wi::to_wide (*arg1), e)) 11872 d -= 1; 11873 if (shift) 11874 d = wi::lrshift (d, shift); 11875 } 11876 else 11877 { 11878 e = wi::udiv_trunc (wi::mask (prec - 1, false, prec), w); 11879 if (!shift) 11880 d = wi::lshift (e, 1); 11881 else 11882 { 11883 e = wi::bit_and (e, wi::mask (shift, true, prec)); 11884 d = wi::lrshift (e, shift - 1); 11885 } 11886 c5 = wide_int_to_tree (type, e); 11887 } 11888 tree c4 = wide_int_to_tree (type, d); 11889 11890 rtx op0 = expand_normal (treeop0); 11891 treeop0 = make_tree (TREE_TYPE (treeop0), op0); 11892 11893 bool speed_p = optimize_insn_for_speed_p (); 11894 11895 do_pending_stack_adjust (); 11896 11897 location_t loc = gimple_location (stmt); 11898 struct separate_ops ops; 11899 ops.code = TRUNC_MOD_EXPR; 11900 ops.location = loc; 11901 ops.type = TREE_TYPE (treeop0); 11902 ops.op0 = treeop0; 11903 ops.op1 = treeop1; 11904 ops.op2 = NULL_TREE; 11905 start_sequence (); 11906 rtx mor = expand_expr_real_2 (&ops, NULL_RTX, TYPE_MODE (ops.type), 11907 EXPAND_NORMAL); 11908 rtx_insn *moinsns = get_insns (); 11909 end_sequence (); 11910 11911 unsigned mocost = seq_cost (moinsns, speed_p); 11912 mocost += rtx_cost (mor, mode, EQ, 0, speed_p); 11913 mocost += rtx_cost (expand_normal (*arg1), mode, EQ, 1, speed_p); 11914 11915 tree t = fold_convert_loc (loc, type, treeop0); 11916 if (!integer_zerop (*arg1)) 11917 t = fold_build2_loc (loc, MINUS_EXPR, type, t, fold_convert (type, *arg1)); 11918 t = fold_build2_loc (loc, MULT_EXPR, type, t, c3); 11919 if (sgn == SIGNED) 11920 t = fold_build2_loc (loc, PLUS_EXPR, type, t, c5); 11921 if (shift) 11922 { 11923 tree s = build_int_cst (NULL_TREE, shift); 11924 t = fold_build2_loc (loc, RROTATE_EXPR, type, t, s); 11925 } 11926 11927 start_sequence (); 11928 rtx mur = expand_normal (t); 11929 rtx_insn *muinsns = get_insns (); 11930 end_sequence (); 11931 11932 unsigned mucost = seq_cost (muinsns, speed_p); 11933 mucost += rtx_cost (mur, mode, LE, 0, speed_p); 11934 mucost += rtx_cost (expand_normal (c4), mode, LE, 1, speed_p); 11935 11936 if (mocost <= mucost) 11937 { 11938 emit_insn (moinsns); 11939 *arg0 = make_tree (TREE_TYPE (*arg0), mor); 11940 return code; 11941 } 11942 11943 emit_insn (muinsns); 11944 *arg0 = make_tree (type, mur); 11945 *arg1 = c4; 11946 return code == EQ_EXPR ? LE_EXPR : GT_EXPR; 11947 } 11948 11949 /* Generate code to calculate OPS, and exploded expression 11950 using a store-flag instruction and return an rtx for the result. 11951 OPS reflects a comparison. 11952 11953 If TARGET is nonzero, store the result there if convenient. 11954 11955 Return zero if there is no suitable set-flag instruction 11956 available on this machine. 11957 11958 Once expand_expr has been called on the arguments of the comparison, 11959 we are committed to doing the store flag, since it is not safe to 11960 re-evaluate the expression. We emit the store-flag insn by calling 11961 emit_store_flag, but only expand the arguments if we have a reason 11962 to believe that emit_store_flag will be successful. If we think that 11963 it will, but it isn't, we have to simulate the store-flag with a 11964 set/jump/set sequence. */ 11965 11966 static rtx 11967 do_store_flag (sepops ops, rtx target, machine_mode mode) 11968 { 11969 enum rtx_code code; 11970 tree arg0, arg1, type; 11971 machine_mode operand_mode; 11972 int unsignedp; 11973 rtx op0, op1; 11974 rtx subtarget = target; 11975 location_t loc = ops->location; 11976 11977 arg0 = ops->op0; 11978 arg1 = ops->op1; 11979 11980 /* Don't crash if the comparison was erroneous. */ 11981 if (arg0 == error_mark_node || arg1 == error_mark_node) 11982 return const0_rtx; 11983 11984 type = TREE_TYPE (arg0); 11985 operand_mode = TYPE_MODE (type); 11986 unsignedp = TYPE_UNSIGNED (type); 11987 11988 /* We won't bother with BLKmode store-flag operations because it would mean 11989 passing a lot of information to emit_store_flag. */ 11990 if (operand_mode == BLKmode) 11991 return 0; 11992 11993 /* We won't bother with store-flag operations involving function pointers 11994 when function pointers must be canonicalized before comparisons. */ 11995 if (targetm.have_canonicalize_funcptr_for_compare () 11996 && ((POINTER_TYPE_P (TREE_TYPE (arg0)) 11997 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0)))) 11998 || (POINTER_TYPE_P (TREE_TYPE (arg1)) 11999 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1)))))) 12000 return 0; 12001 12002 STRIP_NOPS (arg0); 12003 STRIP_NOPS (arg1); 12004 12005 /* For vector typed comparisons emit code to generate the desired 12006 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR 12007 expander for this. */ 12008 if (TREE_CODE (ops->type) == VECTOR_TYPE) 12009 { 12010 tree ifexp = build2 (ops->code, ops->type, arg0, arg1); 12011 if (VECTOR_BOOLEAN_TYPE_P (ops->type) 12012 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code)) 12013 return expand_vec_cmp_expr (ops->type, ifexp, target); 12014 else 12015 { 12016 tree if_true = constant_boolean_node (true, ops->type); 12017 tree if_false = constant_boolean_node (false, ops->type); 12018 return expand_vec_cond_expr (ops->type, ifexp, if_true, 12019 if_false, target); 12020 } 12021 } 12022 12023 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial 12024 into (x - C2) * C3 < C4. */ 12025 if ((ops->code == EQ_EXPR || ops->code == NE_EXPR) 12026 && TREE_CODE (arg0) == SSA_NAME 12027 && TREE_CODE (arg1) == INTEGER_CST) 12028 { 12029 enum tree_code code = maybe_optimize_mod_cmp (ops->code, &arg0, &arg1); 12030 if (code != ops->code) 12031 { 12032 struct separate_ops nops = *ops; 12033 nops.code = ops->code = code; 12034 nops.op0 = arg0; 12035 nops.op1 = arg1; 12036 nops.type = TREE_TYPE (arg0); 12037 return do_store_flag (&nops, target, mode); 12038 } 12039 } 12040 12041 /* Get the rtx comparison code to use. We know that EXP is a comparison 12042 operation of some type. Some comparisons against 1 and -1 can be 12043 converted to comparisons with zero. Do so here so that the tests 12044 below will be aware that we have a comparison with zero. These 12045 tests will not catch constants in the first operand, but constants 12046 are rarely passed as the first operand. */ 12047 12048 switch (ops->code) 12049 { 12050 case EQ_EXPR: 12051 code = EQ; 12052 break; 12053 case NE_EXPR: 12054 code = NE; 12055 break; 12056 case LT_EXPR: 12057 if (integer_onep (arg1)) 12058 arg1 = integer_zero_node, code = unsignedp ? LEU : LE; 12059 else 12060 code = unsignedp ? LTU : LT; 12061 break; 12062 case LE_EXPR: 12063 if (! unsignedp && integer_all_onesp (arg1)) 12064 arg1 = integer_zero_node, code = LT; 12065 else 12066 code = unsignedp ? LEU : LE; 12067 break; 12068 case GT_EXPR: 12069 if (! unsignedp && integer_all_onesp (arg1)) 12070 arg1 = integer_zero_node, code = GE; 12071 else 12072 code = unsignedp ? GTU : GT; 12073 break; 12074 case GE_EXPR: 12075 if (integer_onep (arg1)) 12076 arg1 = integer_zero_node, code = unsignedp ? GTU : GT; 12077 else 12078 code = unsignedp ? GEU : GE; 12079 break; 12080 12081 case UNORDERED_EXPR: 12082 code = UNORDERED; 12083 break; 12084 case ORDERED_EXPR: 12085 code = ORDERED; 12086 break; 12087 case UNLT_EXPR: 12088 code = UNLT; 12089 break; 12090 case UNLE_EXPR: 12091 code = UNLE; 12092 break; 12093 case UNGT_EXPR: 12094 code = UNGT; 12095 break; 12096 case UNGE_EXPR: 12097 code = UNGE; 12098 break; 12099 case UNEQ_EXPR: 12100 code = UNEQ; 12101 break; 12102 case LTGT_EXPR: 12103 code = LTGT; 12104 break; 12105 12106 default: 12107 gcc_unreachable (); 12108 } 12109 12110 /* Put a constant second. */ 12111 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST 12112 || TREE_CODE (arg0) == FIXED_CST) 12113 { 12114 std::swap (arg0, arg1); 12115 code = swap_condition (code); 12116 } 12117 12118 /* If this is an equality or inequality test of a single bit, we can 12119 do this by shifting the bit being tested to the low-order bit and 12120 masking the result with the constant 1. If the condition was EQ, 12121 we xor it with 1. This does not require an scc insn and is faster 12122 than an scc insn even if we have it. 12123 12124 The code to make this transformation was moved into fold_single_bit_test, 12125 so we just call into the folder and expand its result. */ 12126 12127 if ((code == NE || code == EQ) 12128 && integer_zerop (arg1) 12129 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type))) 12130 { 12131 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR); 12132 if (srcstmt 12133 && integer_pow2p (gimple_assign_rhs2 (srcstmt))) 12134 { 12135 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR; 12136 tree type = lang_hooks.types.type_for_mode (mode, unsignedp); 12137 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1), 12138 gimple_assign_rhs1 (srcstmt), 12139 gimple_assign_rhs2 (srcstmt)); 12140 temp = fold_single_bit_test (loc, tcode, temp, arg1, type); 12141 if (temp) 12142 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL); 12143 } 12144 } 12145 12146 if (! get_subtarget (target) 12147 || GET_MODE (subtarget) != operand_mode) 12148 subtarget = 0; 12149 12150 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL); 12151 12152 if (target == 0) 12153 target = gen_reg_rtx (mode); 12154 12155 /* Try a cstore if possible. */ 12156 return emit_store_flag_force (target, code, op0, op1, 12157 operand_mode, unsignedp, 12158 (TYPE_PRECISION (ops->type) == 1 12159 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1); 12160 } 12161 12162 /* Attempt to generate a casesi instruction. Returns 1 if successful, 12163 0 otherwise (i.e. if there is no casesi instruction). 12164 12165 DEFAULT_PROBABILITY is the probability of jumping to the default 12166 label. */ 12167 int 12168 try_casesi (tree index_type, tree index_expr, tree minval, tree range, 12169 rtx table_label, rtx default_label, rtx fallback_label, 12170 profile_probability default_probability) 12171 { 12172 struct expand_operand ops[5]; 12173 scalar_int_mode index_mode = SImode; 12174 rtx op1, op2, index; 12175 12176 if (! targetm.have_casesi ()) 12177 return 0; 12178 12179 /* The index must be some form of integer. Convert it to SImode. */ 12180 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type); 12181 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode)) 12182 { 12183 rtx rangertx = expand_normal (range); 12184 12185 /* We must handle the endpoints in the original mode. */ 12186 index_expr = build2 (MINUS_EXPR, index_type, 12187 index_expr, minval); 12188 minval = integer_zero_node; 12189 index = expand_normal (index_expr); 12190 if (default_label) 12191 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX, 12192 omode, 1, default_label, 12193 default_probability); 12194 /* Now we can safely truncate. */ 12195 index = convert_to_mode (index_mode, index, 0); 12196 } 12197 else 12198 { 12199 if (omode != index_mode) 12200 { 12201 index_type = lang_hooks.types.type_for_mode (index_mode, 0); 12202 index_expr = fold_convert (index_type, index_expr); 12203 } 12204 12205 index = expand_normal (index_expr); 12206 } 12207 12208 do_pending_stack_adjust (); 12209 12210 op1 = expand_normal (minval); 12211 op2 = expand_normal (range); 12212 12213 create_input_operand (&ops[0], index, index_mode); 12214 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval)); 12215 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range)); 12216 create_fixed_operand (&ops[3], table_label); 12217 create_fixed_operand (&ops[4], (default_label 12218 ? default_label 12219 : fallback_label)); 12220 expand_jump_insn (targetm.code_for_casesi, 5, ops); 12221 return 1; 12222 } 12223 12224 /* Attempt to generate a tablejump instruction; same concept. */ 12225 /* Subroutine of the next function. 12226 12227 INDEX is the value being switched on, with the lowest value 12228 in the table already subtracted. 12229 MODE is its expected mode (needed if INDEX is constant). 12230 RANGE is the length of the jump table. 12231 TABLE_LABEL is a CODE_LABEL rtx for the table itself. 12232 12233 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the 12234 index value is out of range. 12235 DEFAULT_PROBABILITY is the probability of jumping to 12236 the default label. */ 12237 12238 static void 12239 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label, 12240 rtx default_label, profile_probability default_probability) 12241 { 12242 rtx temp, vector; 12243 12244 if (INTVAL (range) > cfun->cfg->max_jumptable_ents) 12245 cfun->cfg->max_jumptable_ents = INTVAL (range); 12246 12247 /* Do an unsigned comparison (in the proper mode) between the index 12248 expression and the value which represents the length of the range. 12249 Since we just finished subtracting the lower bound of the range 12250 from the index expression, this comparison allows us to simultaneously 12251 check that the original index expression value is both greater than 12252 or equal to the minimum value of the range and less than or equal to 12253 the maximum value of the range. */ 12254 12255 if (default_label) 12256 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1, 12257 default_label, default_probability); 12258 12259 /* If index is in range, it must fit in Pmode. 12260 Convert to Pmode so we can index with it. */ 12261 if (mode != Pmode) 12262 { 12263 unsigned int width; 12264 12265 /* We know the value of INDEX is between 0 and RANGE. If we have a 12266 sign-extended subreg, and RANGE does not have the sign bit set, then 12267 we have a value that is valid for both sign and zero extension. In 12268 this case, we get better code if we sign extend. */ 12269 if (GET_CODE (index) == SUBREG 12270 && SUBREG_PROMOTED_VAR_P (index) 12271 && SUBREG_PROMOTED_SIGNED_P (index) 12272 && ((width = GET_MODE_PRECISION (as_a <scalar_int_mode> (mode))) 12273 <= HOST_BITS_PER_WIDE_INT) 12274 && ! (UINTVAL (range) & (HOST_WIDE_INT_1U << (width - 1)))) 12275 index = convert_to_mode (Pmode, index, 0); 12276 else 12277 index = convert_to_mode (Pmode, index, 1); 12278 } 12279 12280 /* Don't let a MEM slip through, because then INDEX that comes 12281 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address, 12282 and break_out_memory_refs will go to work on it and mess it up. */ 12283 #ifdef PIC_CASE_VECTOR_ADDRESS 12284 if (flag_pic && !REG_P (index)) 12285 index = copy_to_mode_reg (Pmode, index); 12286 #endif 12287 12288 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the 12289 GET_MODE_SIZE, because this indicates how large insns are. The other 12290 uses should all be Pmode, because they are addresses. This code 12291 could fail if addresses and insns are not the same size. */ 12292 index = simplify_gen_binary (MULT, Pmode, index, 12293 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE), 12294 Pmode)); 12295 index = simplify_gen_binary (PLUS, Pmode, index, 12296 gen_rtx_LABEL_REF (Pmode, table_label)); 12297 12298 #ifdef PIC_CASE_VECTOR_ADDRESS 12299 if (flag_pic) 12300 index = PIC_CASE_VECTOR_ADDRESS (index); 12301 else 12302 #endif 12303 index = memory_address (CASE_VECTOR_MODE, index); 12304 temp = gen_reg_rtx (CASE_VECTOR_MODE); 12305 vector = gen_const_mem (CASE_VECTOR_MODE, index); 12306 convert_move (temp, vector, 0); 12307 12308 emit_jump_insn (targetm.gen_tablejump (temp, table_label)); 12309 12310 /* If we are generating PIC code or if the table is PC-relative, the 12311 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */ 12312 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic) 12313 emit_barrier (); 12314 } 12315 12316 int 12317 try_tablejump (tree index_type, tree index_expr, tree minval, tree range, 12318 rtx table_label, rtx default_label, 12319 profile_probability default_probability) 12320 { 12321 rtx index; 12322 12323 if (! targetm.have_tablejump ()) 12324 return 0; 12325 12326 index_expr = fold_build2 (MINUS_EXPR, index_type, 12327 fold_convert (index_type, index_expr), 12328 fold_convert (index_type, minval)); 12329 index = expand_normal (index_expr); 12330 do_pending_stack_adjust (); 12331 12332 do_tablejump (index, TYPE_MODE (index_type), 12333 convert_modes (TYPE_MODE (index_type), 12334 TYPE_MODE (TREE_TYPE (range)), 12335 expand_normal (range), 12336 TYPE_UNSIGNED (TREE_TYPE (range))), 12337 table_label, default_label, default_probability); 12338 return 1; 12339 } 12340 12341 /* Return a CONST_VECTOR rtx representing vector mask for 12342 a VECTOR_CST of booleans. */ 12343 static rtx 12344 const_vector_mask_from_tree (tree exp) 12345 { 12346 machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); 12347 machine_mode inner = GET_MODE_INNER (mode); 12348 12349 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp), 12350 VECTOR_CST_NELTS_PER_PATTERN (exp)); 12351 unsigned int count = builder.encoded_nelts (); 12352 for (unsigned int i = 0; i < count; ++i) 12353 { 12354 tree elt = VECTOR_CST_ELT (exp, i); 12355 gcc_assert (TREE_CODE (elt) == INTEGER_CST); 12356 if (integer_zerop (elt)) 12357 builder.quick_push (CONST0_RTX (inner)); 12358 else if (integer_onep (elt) 12359 || integer_minus_onep (elt)) 12360 builder.quick_push (CONSTM1_RTX (inner)); 12361 else 12362 gcc_unreachable (); 12363 } 12364 return builder.build (); 12365 } 12366 12367 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones. 12368 Return a constant scalar rtx of mode MODE in which bit X is set if element 12369 X of EXP is nonzero. */ 12370 static rtx 12371 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp) 12372 { 12373 wide_int res = wi::zero (GET_MODE_PRECISION (mode)); 12374 tree elt; 12375 12376 /* The result has a fixed number of bits so the input must too. */ 12377 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant (); 12378 for (unsigned int i = 0; i < nunits; ++i) 12379 { 12380 elt = VECTOR_CST_ELT (exp, i); 12381 gcc_assert (TREE_CODE (elt) == INTEGER_CST); 12382 if (integer_all_onesp (elt)) 12383 res = wi::set_bit (res, i); 12384 else 12385 gcc_assert (integer_zerop (elt)); 12386 } 12387 12388 return immed_wide_int_const (res, mode); 12389 } 12390 12391 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */ 12392 static rtx 12393 const_vector_from_tree (tree exp) 12394 { 12395 machine_mode mode = TYPE_MODE (TREE_TYPE (exp)); 12396 12397 if (initializer_zerop (exp)) 12398 return CONST0_RTX (mode); 12399 12400 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp))) 12401 return const_vector_mask_from_tree (exp); 12402 12403 machine_mode inner = GET_MODE_INNER (mode); 12404 12405 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp), 12406 VECTOR_CST_NELTS_PER_PATTERN (exp)); 12407 unsigned int count = builder.encoded_nelts (); 12408 for (unsigned int i = 0; i < count; ++i) 12409 { 12410 tree elt = VECTOR_CST_ELT (exp, i); 12411 if (TREE_CODE (elt) == REAL_CST) 12412 builder.quick_push (const_double_from_real_value (TREE_REAL_CST (elt), 12413 inner)); 12414 else if (TREE_CODE (elt) == FIXED_CST) 12415 builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt), 12416 inner)); 12417 else 12418 builder.quick_push (immed_wide_int_const (wi::to_poly_wide (elt), 12419 inner)); 12420 } 12421 return builder.build (); 12422 } 12423 12424 /* Build a decl for a personality function given a language prefix. */ 12425 12426 tree 12427 build_personality_function (const char *lang) 12428 { 12429 const char *unwind_and_version; 12430 tree decl, type; 12431 char *name; 12432 12433 switch (targetm_common.except_unwind_info (&global_options)) 12434 { 12435 case UI_NONE: 12436 return NULL; 12437 case UI_SJLJ: 12438 unwind_and_version = "_sj0"; 12439 break; 12440 case UI_DWARF2: 12441 case UI_TARGET: 12442 unwind_and_version = "_v0"; 12443 break; 12444 case UI_SEH: 12445 unwind_and_version = "_seh0"; 12446 break; 12447 default: 12448 gcc_unreachable (); 12449 } 12450 12451 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL)); 12452 12453 type = build_function_type_list (integer_type_node, integer_type_node, 12454 long_long_unsigned_type_node, 12455 ptr_type_node, ptr_type_node, NULL_TREE); 12456 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, 12457 get_identifier (name), type); 12458 DECL_ARTIFICIAL (decl) = 1; 12459 DECL_EXTERNAL (decl) = 1; 12460 TREE_PUBLIC (decl) = 1; 12461 12462 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with 12463 are the flags assigned by targetm.encode_section_info. */ 12464 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL); 12465 12466 return decl; 12467 } 12468 12469 /* Extracts the personality function of DECL and returns the corresponding 12470 libfunc. */ 12471 12472 rtx 12473 get_personality_function (tree decl) 12474 { 12475 tree personality = DECL_FUNCTION_PERSONALITY (decl); 12476 enum eh_personality_kind pk; 12477 12478 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl)); 12479 if (pk == eh_personality_none) 12480 return NULL; 12481 12482 if (!personality 12483 && pk == eh_personality_any) 12484 personality = lang_hooks.eh_personality (); 12485 12486 if (pk == eh_personality_lang) 12487 gcc_assert (personality != NULL_TREE); 12488 12489 return XEXP (DECL_RTL (personality), 0); 12490 } 12491 12492 /* Returns a tree for the size of EXP in bytes. */ 12493 12494 static tree 12495 tree_expr_size (const_tree exp) 12496 { 12497 if (DECL_P (exp) 12498 && DECL_SIZE_UNIT (exp) != 0) 12499 return DECL_SIZE_UNIT (exp); 12500 else 12501 return size_in_bytes (TREE_TYPE (exp)); 12502 } 12503 12504 /* Return an rtx for the size in bytes of the value of EXP. */ 12505 12506 rtx 12507 expr_size (tree exp) 12508 { 12509 tree size; 12510 12511 if (TREE_CODE (exp) == WITH_SIZE_EXPR) 12512 size = TREE_OPERAND (exp, 1); 12513 else 12514 { 12515 size = tree_expr_size (exp); 12516 gcc_assert (size); 12517 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp)); 12518 } 12519 12520 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL); 12521 } 12522 12523 /* Return a wide integer for the size in bytes of the value of EXP, or -1 12524 if the size can vary or is larger than an integer. */ 12525 12526 static HOST_WIDE_INT 12527 int_expr_size (tree exp) 12528 { 12529 tree size; 12530 12531 if (TREE_CODE (exp) == WITH_SIZE_EXPR) 12532 size = TREE_OPERAND (exp, 1); 12533 else 12534 { 12535 size = tree_expr_size (exp); 12536 gcc_assert (size); 12537 } 12538 12539 if (size == 0 || !tree_fits_shwi_p (size)) 12540 return -1; 12541 12542 return tree_to_shwi (size); 12543 } 12544