xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/spu/constraints.md (revision c0a68be459da21030695f60d10265c2fc49758f8)
1;; Constraint definitions for SPU
2;; Copyright (C) 2006-2019 Free Software Foundation, Inc.
3;;
4;; This file is free software; you can redistribute it and/or modify it under
5;; the terms of the GNU General Public License as published by the Free
6;; Software Foundation; either version 3 of the License, or (at your option)
7;; any later version.
8
9;; This file is distributed in the hope that it will be useful, but WITHOUT
10;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11;; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12;; for more details.
13
14;; You should have received a copy of the GNU General Public License
15;; along with GCC; see the file COPYING3.  If not see
16;; <http://www.gnu.org/licenses/>.
17
18
19;;       ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz
20;; GCC:      ffffiiiiiiii     x x        x x   xxxx xx
21;; SPU:  xxxx    xxx xxxx xxxx x xxx xx x   xxx         xx
22;; FREE:     ffff   i    a          a  a  a        a  aa  aaa
23;; x - used
24;; a - available
25;; i - available for integer immediates
26;; f - available for floating point immediates
27
28;; For most immediate constraints we have 3 variations to deal with the
29;; fact const_int has no mode.  One variation treats const_int as 32 bit,
30;; another treats it as 64 bit, and the third sign extends it to 128 bit.
31
32(define_constraint "A"
33  "An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 32-bit value."
34  (ior (and (match_code "const_int,const_double,const_vector")
35	    (match_test "immediate_load_p (op, SImode)"))
36       (match_code "symbol_ref,label_ref,high,const")))
37
38(define_constraint "B"
39  "An immediate for arithmetic instructions (e.g., ai, ceqi).  const_int is treated as a 32-bit value."
40  (and (match_code "const_int,const_double,const_vector")
41       (match_test "arith_immediate_p (op, SImode, -0x200, 0x1ff)")))
42
43(define_constraint "C"
44  "An immediate for and/xor/or instructions.  const_int is treated as a 32-bit value."
45  (and (match_code "const_int,const_double,const_vector")
46       (match_test "logical_immediate_p (op, SImode)")))
47
48(define_constraint "D"
49  "An immediate for iohl instruction.  const_int is treated as a 32-bit value."
50  (and (match_code "const_int,const_double,const_vector")
51       (match_test "iohl_immediate_p (op, SImode)")))
52
53(define_constraint "U"
54  "An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is sign extended to 128 bit."
55  (and (match_code "const_int,const_double,const_vector")
56       (match_test "immediate_load_p (op, TImode)")))
57
58(define_constraint "W"
59  "An immediate for shift and rotate instructions.  const_int is treated as a 32-bit value."
60  (and (match_code "const_int,const_double,const_vector")
61       (match_test "arith_immediate_p (op, SImode, -0x80000000ll, 0x7fffffffll)")))
62
63(define_constraint "Y"
64  "An immediate for and/xor/or instructions.  const_int is sign extended as a 128 bit."
65  (and (match_code "const_int,const_double,const_vector")
66       (match_test "logical_immediate_p (op, TImode)")))
67
68(define_constraint "Z"
69  "An immediate for iohl instruction.  const_int is sign extended to 128 bit."
70  (and (match_code "const_int,const_double,const_vector")
71       (match_test "iohl_immediate_p (op, TImode)")))
72
73(define_constraint "a"
74  "An immediate which can be loaded with the il/ila/ilh/ilhu instructions.  const_int is treated as a 64-bit value."
75  (and (match_code "const_int")
76       (match_test "immediate_load_p (op, DImode)")))
77
78(define_constraint "c"
79  "An immediate for and/xor/or instructions.  const_int is treated as a 64-bit value."
80  (and (match_code "const_int")
81       (match_test "logical_immediate_p (op, DImode)")))
82
83(define_constraint "d"
84  "An immediate for iohl instruction.  const_int is treated as a 64-bit value."
85  (and (match_code "const_int")
86       (match_test "iohl_immediate_p (op, DImode)")))
87
88(define_constraint "f"
89  "An immediate which can be loaded with fsmbi."
90  (and (match_code "const_int,const_double,const_vector")
91       (match_test "fsmbi_const_p (op)")))
92
93(define_constraint "j"
94  "An immediate which can be loaded with one of the cbd/chd/cwd/cdd instructions.  const_int is treated as a 32-bit value."
95  (and (match_code "const_int,const_double,const_vector")
96       (match_test "cpat_const_p (op, SImode)")))
97
98(define_constraint "k"
99  "An immediate which can be loaded with one of the cbd/chd/cwd/cdd instructions.  const_int is treated as a 64-bit value."
100  (and (match_code "const_int,const_double,const_vector")
101       (match_test "cpat_const_p (op, DImode)")))
102
103(define_constraint "l"
104  "An immediate which can be loaded with one of the cbd/chd/cwd/cdd instructions."
105  (and (match_code "const_double,const_vector")
106       (match_test "cpat_const_p (op, TImode)")))
107
108
109;; Integer constraints
110
111(define_constraint "I"
112  "A constant in the range [-64, 63] for shift/rotate instructions."
113  (and (match_code "const_int")
114       (match_test "ival >= -0x40 && ival <= 0x3f")))
115
116(define_constraint "J"
117  "An unsigned 7-bit constant for conversion/nop/channel instructions."
118  (and (match_code "const_int")
119       (match_test "ival >= 0 && ival <= 0x7f")))
120
121(define_constraint "K"
122  "A signed 10-bit constant for most arithmetic instructions."
123  (and (match_code "const_int")
124       (match_test "ival >= -0x200 && ival <= 0x1ff")))
125
126(define_constraint "M"
127  "A signed 16-bit immediate for @code{stop}."
128  (and (match_code "const_int")
129       (match_test "ival >= -0x8000ll && ival <= 0x7fffll")))
130
131(define_constraint "N"
132  "An unsigned 16-bit constant for @code{iohl} and @code{fsmbi}."
133  (and (match_code "const_int")
134       (match_test "ival >= 0 && ival <= 0xffff")))
135
136(define_constraint "O"
137  "An unsigned 7-bit constant whose 3 least significant bits are 0."
138  (and (match_code "const_int")
139       (match_test "(ival & 7) == 0")))
140
141(define_constraint "P"
142  "An unsigned 3-bit constant for 16-byte rotates and shifts"
143  (and (match_code "const_int")
144       (match_test "ival >= 0 && ival <= 7")))
145
146
147;; Memory constraints
148
149(define_memory_constraint "R"
150  "Call operand, reg, for indirect calls"
151  (and (match_code "mem")
152       (match_test "GET_CODE(XEXP(op, 0)) == REG")))
153
154(define_memory_constraint "S"
155  "Call operand, symbol, for relative calls."
156  (and (match_code "mem")
157       (match_test "!TARGET_LARGE_MEM
158		    && ((GET_CODE (XEXP (op, 0)) == SYMBOL_REF
159			 || GET_CODE (XEXP (op, 0)) == LABEL_REF))")))
160
161(define_memory_constraint "T"
162  "Call operand, const_int, for absolute calls."
163  (and (match_code "mem")
164       (match_test "GET_CODE (XEXP (op, 0)) == CONST_INT
165		    && INTVAL (XEXP (op, 0)) >= 0
166		    && INTVAL (XEXP (op, 0)) <= 0x3ffff")))
167
168
169;; Floating-point constant constraints.
170
171(define_constraint "v"
172  "Floating point power of 2 with exponent in [0..127]"
173  (and (match_code "const_double,const_vector")
174       (match_test "exp2_immediate_p (op, VOIDmode, 0, 127)")))
175
176(define_constraint "w"
177  "Floating point power of 2 with exponent in [-126..0]"
178  (and (match_code "const_double,const_vector")
179       (match_test "exp2_immediate_p (op, VOIDmode, -126, 0)")))
180