xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/sparc/sparc-modes.def (revision 8feb0f0b7eaff0608f8350bbfa3098827b4bb91b)
1/* Definitions of target machine for GCC, for Sun SPARC.
2   Copyright (C) 2002-2020 Free Software Foundation, Inc.
3   Contributed by Michael Tiemann (tiemann@cygnus.com).
4   64-bit SPARC V9 support by Michael Tiemann, Jim Wilson, and Doug Evans,
5   at Cygnus Support.
6
7This file is part of GCC.
8
9GCC is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 3, or (at your option)
12any later version.
13
14GCC is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License
20along with GCC; see the file COPYING3.  If not see
21<http://www.gnu.org/licenses/>.  */
22
23/* 128-bit floating point */
24FLOAT_MODE (TF, 16, ieee_quad_format);
25
26/* We need a 32-byte mode to return structures in the 64-bit ABI.  */
27INT_MODE (OI, 32);
28
29/* Add any extra modes needed to represent the condition code.
30
31   We have a CCNZ mode which is used for implicit comparisons with zero when
32   arithmetic instructions set the condition code.  Only the N and Z flags
33   are valid in this mode, which means that only the =,!= and <,>= operators
34   can be used in conjunction with it.
35
36   We also have a CCCmode which is used by the arithmetic instructions when
37   they explicitly set the C flag (unsigned overflow).  Only the unsigned
38   <,>= operators can be used in conjunction with it.
39
40   We also have a CCVmode which is used by the arithmetic instructions when
41   they explicitly set the V flag (signed overflow).  Only the =,!= operators
42   can be used in conjunction with it.
43
44   We also have two modes to indicate that the relevant condition code is
45   in the floating-point condition code register.  One for comparisons which
46   will generate an exception if the result is unordered (CCFPEmode) and
47   one for comparisons which will never trap (CCFPmode).
48
49   CC modes are used for the 32-bit ICC, CCX modes for the 64-bit XCC.  */
50
51CC_MODE (CCX);
52CC_MODE (CCNZ);
53CC_MODE (CCXNZ);
54CC_MODE (CCC);
55CC_MODE (CCXC);
56CC_MODE (CCV);
57CC_MODE (CCXV);
58CC_MODE (CCFP);
59CC_MODE (CCFPE);
60
61/* Vector modes.  */
62VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI      */
63VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI      */
64VECTOR_MODES (INT, 4);        /*            V4QI V2HI      */
65VECTOR_MODE (INT, DI, 1);     /*                      V1DI */
66VECTOR_MODE (INT, SI, 1);     /*                      V1SI */
67