1;;- Constraint definitions for the pdp11 for GNU C compiler 2;; Copyright (C) 2010-2020 Free Software Foundation, Inc. 3;; Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at). 4 5;; This file is part of GCC. 6 7;; GCC is free software; you can redistribute it and/or modify 8;; it under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11 12;; GCC is distributed in the hope that it will be useful, 13;; but WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15;; GNU General Public License for more details. 16 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21(define_register_constraint "a" "LOAD_FPU_REGS" 22 "FPU register that can be directly loaded from memory") 23 24(define_register_constraint "f" "FPU_REGS" 25 "Any FPU register") 26 27(define_register_constraint "h" "NO_LOAD_FPU_REGS" 28 "FPU register that cannot be directly loaded from memory") 29 30(define_register_constraint "d" "MUL_REGS" 31 "General register that can be used for 16-bit multiply (odd numbered)") 32 33(define_constraint "I" 34 "Integer constant that fits in 16 bits unsigned" 35 (and (match_code "const_int") 36 (match_test "(ival & 0xffff0000) == 0"))) 37 38(define_constraint "J" 39 "Integer constant whose low 16 bits are zero" 40 (and (match_code "const_int") 41 (match_test "(ival & 0xffff) == 0"))) 42 43(define_constraint "K" 44 "Integer constant whose lower and upper 16 bit half are both non-zero" 45 (and (match_code "const_int") 46 (match_test "(ival & 0xffff) != 0 && (ival & 0xffff0000) != 0"))) 47 48(define_constraint "L" 49 "Integer constant 1" 50 (and (match_code "const_int") 51 (match_test "ival == 1"))) 52 53(define_constraint "M" 54 "Integer constant -1" 55 (and (match_code "const_int") 56 (match_test "ival == -1"))) 57 58(define_constraint "N" 59 "Integer constant 0" 60 (and (match_code "const_int") 61 (match_test "ival == 0"))) 62 63(define_constraint "O" 64 "Integer constant for which several individual shifts are better than one big one" 65 (and (match_code "const_int") 66 (match_test "pdp11_small_shift (ival)"))) 67 68(define_constraint "G" 69 "Defines a real zero constant." 70 (and (match_code "const_double") 71 (match_test "op == CONST0_RTX (GET_MODE (op))"))) 72 73(define_memory_constraint "Q" 74 "Memory reference that requires an additional word after the opcode" 75 (and (match_code "mem") 76 (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0)) 77 && !simple_memory_operand (op, GET_MODE (op))"))) 78 79(define_memory_constraint "R" 80 "Memory reference that is encoded within the opcode" 81 (and (match_code "mem") 82 (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0)) 83 && simple_memory_operand (op, GET_MODE (op))"))) 84 85(define_memory_constraint "D" 86 "Memory reference that is encoded within the opcode, and not push or pop" 87 (and (match_code "mem") 88 (match_test "memory_address_p (GET_MODE (op), XEXP (op, 0)) 89 && no_side_effect_operand (op, GET_MODE (op))"))) 90 91;; What follows is a set of constraints used to prevent the generation 92;; of insns that have a register as source, and an auto-increment or 93;; auto-decrement memory reference as the destination where the register 94;; is the same as the source. On the PDP11, such instructions are not 95;; implemented consistently across the models and often do something 96;; different from what the RTL intends. 97(define_register_constraint "Z0" "NOTR0_REG" "Register other than 0") 98(define_register_constraint "Z1" "NOTR1_REG" "Register other than 1") 99(define_register_constraint "Z2" "NOTR2_REG" "Register other than 2") 100(define_register_constraint "Z3" "NOTR3_REG" "Register other than 3") 101(define_register_constraint "Z4" "NOTR4_REG" "Register other than 4") 102(define_register_constraint "Z5" "NOTR5_REG" "Register other than 5") 103(define_register_constraint "Z6" "NOTSP_REG" 104 "Register other than stack pointer (register 6)") 105(define_memory_constraint "Za" "R0 push/pop" 106 (match_test "pushpop_regeq (op, 0)")) 107(define_memory_constraint "Zb" "R1 push/pop" 108 (match_test "pushpop_regeq (op, 1)")) 109(define_memory_constraint "Zc" "R2 push/pop" 110 (match_test "pushpop_regeq (op, 2)")) 111(define_memory_constraint "Zd" "R3 push/pop" 112 (match_test "pushpop_regeq (op, 3)")) 113(define_memory_constraint "Ze" "R4 push/pop" 114 (match_test "pushpop_regeq (op, 4)")) 115(define_memory_constraint "Zf" "R5 push/pop" 116 (match_test "pushpop_regeq (op, 5)")) 117(define_memory_constraint "Zg" "SP push/pop" 118 (match_test "pushpop_regeq (op, 6)")) 119 120