xref: /netbsd-src/external/gpl3/binutils/dist/gas/doc/c-ppc.texi (revision a5847cc334d9a7029f6352b847e9e8d71a0f9e0c)
1@c Copyright 2001, 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node PPC-Dependent
8@chapter PowerPC Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter PowerPC Dependent Features
13@end ifclear
14
15@cindex PowerPC support
16@menu
17* PowerPC-Opts::                Options
18* PowerPC-Pseudo::              PowerPC Assembler Directives
19@end menu
20
21@node PowerPC-Opts
22@section Options
23
24@cindex options for PowerPC
25@cindex PowerPC options
26@cindex architectures, PowerPC
27@cindex PowerPC architectures
28The PowerPC chip family includes several successive levels, using the same
29core instruction set, but including a few additional instructions at
30each level.  There are exceptions to this however.  For details on what
31instructions each variant supports, please see the chip's architecture
32reference manual.
33
34The following table lists all available PowerPC options.
35
36@table @code
37@item -a32
38Generate ELF32 or XCOFF32.
39
40@item -a64
41Generate ELF64 or XCOFF64.
42
43@item -K PIC
44Set EF_PPC_RELOCATABLE_LIB in ELF flags.
45
46@item -mpwrx | -mpwr2
47Generate code for POWER/2 (RIOS2).
48
49@item -mpwr
50Generate code for POWER (RIOS1)
51
52@item -m601
53Generate code for PowerPC 601.
54
55@item -mppc, -mppc32, -m603, -m604
56Generate code for PowerPC 603/604.
57
58@item -m403, -m405
59Generate code for PowerPC 403/405.
60
61@item -m440
62Generate code for PowerPC 440.  BookE and some 405 instructions.
63
64@item -m464
65Generate code for PowerPC 464.
66
67@item -m476
68Generate code for PowerPC 476.
69
70@item -m7400, -m7410, -m7450, -m7455
71Generate code for PowerPC 7400/7410/7450/7455.
72
73@item -m750cl
74Generate code for PowerPC 750CL.
75
76@item -mppc64, -m620
77Generate code for PowerPC 620/625/630.
78
79@item -me500, -me500x2
80Generate code for Motorola e500 core complex.
81
82@item -me500mc
83Generate code for Freescale e500mc core complex.
84
85@item -me500mc64
86Generate code for Freescale e500mc64 core complex.
87
88@item -mspe
89Generate code for Motorola SPE instructions.
90
91@item -mtitan
92Generate code for AppliedMicro Titan core complex.
93
94@item -mppc64bridge
95Generate code for PowerPC 64, including bridge insns.
96
97@item -mbooke
98Generate code for 32-bit BookE.
99
100@item -ma2
101Generate code for A2 architecture.
102
103@item -me300
104Generate code for PowerPC e300 family.
105
106@item -maltivec
107Generate code for processors with AltiVec instructions.
108
109@item -mvsx
110Generate code for processors with Vector-Scalar (VSX) instructions.
111
112@item -mpower4, -mpwr4
113Generate code for Power4 architecture.
114
115@item -mpower5, -mpwr5, -mpwr5x
116Generate code for Power5 architecture.
117
118@item -mpower6, -mpwr6
119Generate code for Power6 architecture.
120
121@item -mpower7, -mpwr7
122Generate code for Power7 architecture.
123
124@item -mcell
125Generate code for Cell Broadband Engine architecture.
126
127@item -mcom
128Generate code Power/PowerPC common instructions.
129
130@item -many
131Generate code for any architecture (PWR/PWRX/PPC).
132
133@item -mregnames
134Allow symbolic names for registers.
135
136@item -mno-regnames
137Do not allow symbolic names for registers.
138
139@item -mrelocatable
140Support for GCC's -mrelocatable option.
141
142@item -mrelocatable-lib
143Support for GCC's -mrelocatable-lib option.
144
145@item -memb
146Set PPC_EMB bit in ELF flags.
147
148@item -mlittle, -mlittle-endian, -le
149Generate code for a little endian machine.
150
151@item -mbig, -mbig-endian, -be
152Generate code for a big endian machine.
153
154@item -msolaris
155Generate code for Solaris.
156
157@item -mno-solaris
158Do not generate code for Solaris.
159
160@item -nops=@var{count}
161If an alignment directive inserts more than @var{count} nops, put a
162branch at the beginning to skip execution of the nops.
163@end table
164
165
166@node PowerPC-Pseudo
167@section PowerPC Assembler Directives
168
169@cindex directives for PowerPC
170@cindex PowerPC directives
171A number of assembler directives are available for PowerPC.  The
172following table is far from complete.
173
174@table @code
175@item .machine "string"
176This directive allows you to change the machine for which code is
177generated.  @code{"string"} may be any of the -m cpu selection options
178(without the -m) enclosed in double quotes, @code{"push"}, or
179@code{"pop"}.  @code{.machine "push"} saves the currently selected
180cpu, which may be restored with @code{.machine "pop"}.
181@end table
182