1@c Copyright (C) 2001-2024 Free Software Foundation, Inc. 2@c This is part of the GAS manual. 3@c For copying conditions, see the file as.texinfo. 4@c man end 5@ifset GENERIC 6@page 7@node PPC-Dependent 8@chapter PowerPC Dependent Features 9@end ifset 10@ifclear GENERIC 11@node Machine Dependencies 12@chapter PowerPC Dependent Features 13@end ifclear 14 15@cindex PowerPC support 16@menu 17* PowerPC-Opts:: Options 18* PowerPC-Pseudo:: PowerPC Assembler Directives 19* PowerPC-Syntax:: PowerPC Syntax 20@end menu 21 22@node PowerPC-Opts 23@section Options 24 25@cindex options for PowerPC 26@cindex PowerPC options 27@cindex architectures, PowerPC 28@cindex PowerPC architectures 29The PowerPC chip family includes several successive levels, using the same 30core instruction set, but including a few additional instructions at 31each level. There are exceptions to this however. For details on what 32instructions each variant supports, please see the chip's architecture 33reference manual. 34 35The following table lists all available PowerPC options. 36 37@c man begin OPTIONS 38@table @gcctabopt 39@item -a32 40Generate ELF32 or XCOFF32. 41 42@item -a64 43Generate ELF64 or XCOFF64. 44 45@item -K PIC 46Set EF_PPC_RELOCATABLE_LIB in ELF flags. 47 48@item -mpwrx | -mpwr2 49Generate code for POWER/2 (RIOS2). 50 51@item -mpwr 52Generate code for POWER (RIOS1) 53 54@item -m601 55Generate code for PowerPC 601. 56 57@item -mppc, -mppc32, -m603, -m604 58Generate code for PowerPC 603/604. 59 60@item -m403, -m405 61Generate code for PowerPC 403/405. 62 63@item -m440 64Generate code for PowerPC 440. BookE and some 405 instructions. 65 66@item -m464 67Generate code for PowerPC 464. 68 69@item -m476 70Generate code for PowerPC 476. 71 72@item -m7400, -m7410, -m7450, -m7455 73Generate code for PowerPC 7400/7410/7450/7455. 74 75@item -m750cl, -mgekko, -mbroadway 76Generate code for PowerPC 750CL/Gekko/Broadway. 77 78@item -m821, -m850, -m860 79Generate code for PowerPC 821/850/860. 80 81@item -mppc64, -m620 82Generate code for PowerPC 620/625/630. 83 84@item -me200z2, -me200z4 85Generate code for e200 variants, e200z2 with LSP, e200z4 with SPE. 86 87@item -me300 88Generate code for PowerPC e300 family. 89 90@item -me500, -me500x2 91Generate code for Motorola e500 core complex. 92 93@item -me500mc 94Generate code for Freescale e500mc core complex. 95 96@item -me500mc64 97Generate code for Freescale e500mc64 core complex. 98 99@item -me5500 100Generate code for Freescale e5500 core complex. 101 102@item -me6500 103Generate code for Freescale e6500 core complex. 104 105@item -mlsp 106Enable LSP instructions. (Disables SPE and SPE2.) 107 108@item -mspe 109Generate code for Motorola SPE instructions. (Disables LSP.) 110 111@item -mspe2 112Generate code for Freescale SPE2 instructions. (Disables LSP.) 113 114@item -mtitan 115Generate code for AppliedMicro Titan core complex. 116 117@item -mppc64bridge 118Generate code for PowerPC 64, including bridge insns. 119 120@item -mbooke 121Generate code for 32-bit BookE. 122 123@item -ma2 124Generate code for A2 architecture. 125 126@item -maltivec 127Generate code for processors with AltiVec instructions. 128 129@item -mvle 130Generate code for Freescale PowerPC VLE instructions. 131 132@item -mvsx 133Generate code for processors with Vector-Scalar (VSX) instructions. 134 135@item -mhtm 136Generate code for processors with Hardware Transactional Memory instructions. 137 138@item -mpower4, -mpwr4 139Generate code for Power4 architecture. 140 141@item -mpower5, -mpwr5, -mpwr5x 142Generate code for Power5 architecture. 143 144@item -mpower6, -mpwr6 145Generate code for Power6 architecture. 146 147@item -mpower7, -mpwr7 148Generate code for Power7 architecture. 149 150@item -mpower8, -mpwr8 151Generate code for Power8 architecture. 152 153@item -mpower9, -mpwr9 154Generate code for Power9 architecture. 155 156@item -mpower10, -mpwr10 157Generate code for Power10 architecture. 158 159@item -mfuture 160Generate code for 'future' architecture. 161 162@item -mcell 163@item -mcell 164Generate code for Cell Broadband Engine architecture. 165 166@item -mcom 167Generate code Power/PowerPC common instructions. 168 169@item -many 170Generate code for any architecture (PWR/PWRX/PPC). 171 172@item -mregnames 173Allow symbolic names for registers. 174 175@item -mno-regnames 176Do not allow symbolic names for registers. 177 178@item -mrelocatable 179Support for GCC's -mrelocatable option. 180 181@item -mrelocatable-lib 182Support for GCC's -mrelocatable-lib option. 183 184@item -memb 185Set PPC_EMB bit in ELF flags. 186 187@item -mlittle, -mlittle-endian, -le 188Generate code for a little endian machine. 189 190@item -mbig, -mbig-endian, -be 191Generate code for a big endian machine. 192 193@item -msolaris 194Generate code for Solaris. 195 196@item -mno-solaris 197Do not generate code for Solaris. 198 199@item -nops=@var{count} 200If an alignment directive inserts more than @var{count} nops, put a 201branch at the beginning to skip execution of the nops. 202@end table 203@c man end 204 205 206@node PowerPC-Pseudo 207@section PowerPC Assembler Directives 208 209@cindex directives for PowerPC 210@cindex PowerPC directives 211A number of assembler directives are available for PowerPC. The 212following table is far from complete. 213 214@table @code 215@item .machine "string" 216This directive allows you to change the machine for which code is 217generated. @code{"string"} may be any of the -m cpu selection options 218(without the -m) enclosed in double quotes, @code{"push"}, or 219@code{"pop"}. @code{.machine "push"} saves the currently selected 220cpu, which may be restored with @code{.machine "pop"}. 221@end table 222 223@node PowerPC-Syntax 224@section PowerPC Syntax 225@menu 226* PowerPC-Chars:: Special Characters 227@end menu 228 229@node PowerPC-Chars 230@subsection Special Characters 231 232@cindex line comment character, PowerPC 233@cindex PowerPC line comment character 234The presence of a @samp{#} on a line indicates the start of a comment 235that extends to the end of the current line. 236 237If a @samp{#} appears as the first character of a line then the whole 238line is treated as a comment, but in this case the line could also be 239a logical line number directive (@pxref{Comments}) or a preprocessor 240control command (@pxref{Preprocessing}). 241 242If the assembler has been configured for the ppc-*-solaris* target 243then the @samp{!} character also acts as a line comment character. 244This can be disabled via the @option{-mno-solaris} command-line 245option. 246 247@cindex line separator, PowerPC 248@cindex statement separator, PowerPC 249@cindex PowerPC line separator 250The @samp{;} character can be used to separate statements on the same 251line. 252