1 /* s390.h -- Header file for S390 opcode table 2 Copyright (C) 2000-2022 Free Software Foundation, Inc. 3 Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com). 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #ifndef S390_H 23 #define S390_H 24 25 /* List of instruction sets variations. */ 26 27 enum s390_opcode_mode_val 28 { 29 S390_OPCODE_ESA = 0, 30 S390_OPCODE_ZARCH 31 }; 32 33 enum s390_opcode_cpu_val 34 { 35 S390_OPCODE_G5 = 0, 36 S390_OPCODE_G6, 37 S390_OPCODE_Z900, 38 S390_OPCODE_Z990, 39 S390_OPCODE_Z9_109, 40 S390_OPCODE_Z9_EC, 41 S390_OPCODE_Z10, 42 S390_OPCODE_Z196, 43 S390_OPCODE_ZEC12, 44 S390_OPCODE_Z13, 45 S390_OPCODE_ARCH12, 46 S390_OPCODE_ARCH13, 47 S390_OPCODE_ARCH14, 48 S390_OPCODE_MAXCPU 49 }; 50 51 /* Instruction specific flags. */ 52 #define S390_INSTR_FLAG_OPTPARM 0x1 53 #define S390_INSTR_FLAG_OPTPARM2 0x2 54 55 #define S390_INSTR_FLAG_HTM 0x4 56 #define S390_INSTR_FLAG_VX 0x8 57 #define S390_INSTR_FLAG_FACILITY_MASK 0xc 58 59 /* The opcode table is an array of struct s390_opcode. */ 60 61 struct s390_opcode 62 { 63 /* The opcode name. */ 64 const char * name; 65 66 /* The opcode itself. Those bits which will be filled in with 67 operands are zeroes. */ 68 unsigned char opcode[6]; 69 70 /* The opcode mask. This is used by the disassembler. This is a 71 mask containing ones indicating those bits which must match the 72 opcode field, and zeroes indicating those bits which need not 73 match (and are presumably filled in by operands). */ 74 unsigned char mask[6]; 75 76 /* The opcode length in bytes. */ 77 int oplen; 78 79 /* An array of operand codes. Each code is an index into the 80 operand table. They appear in the order which the operands must 81 appear in assembly code, and are terminated by a zero. */ 82 unsigned char operands[6]; 83 84 /* Bitmask of execution modes this opcode is available for. */ 85 unsigned int modes; 86 87 /* First cpu this opcode is available for. */ 88 enum s390_opcode_cpu_val min_cpu; 89 90 /* Instruction specific flags. */ 91 unsigned int flags; 92 }; 93 94 /* The table itself is sorted by major opcode number, and is otherwise 95 in the order in which the disassembler should consider 96 instructions. */ 97 extern const struct s390_opcode s390_opcodes[]; 98 extern const int s390_num_opcodes; 99 100 /* A opcode format table for the .insn pseudo mnemonic. */ 101 extern const struct s390_opcode s390_opformats[]; 102 extern const int s390_num_opformats; 103 104 /* Values defined for the flags field of a struct s390_opcode. */ 105 106 /* The operands table is an array of struct s390_operand. */ 107 108 struct s390_operand 109 { 110 /* The number of bits in the operand. */ 111 int bits; 112 113 /* How far the operand is left shifted in the instruction. */ 114 int shift; 115 116 /* One bit syntax flags. */ 117 unsigned long flags; 118 }; 119 120 /* Elements in the table are retrieved by indexing with values from 121 the operands field of the s390_opcodes table. */ 122 123 extern const struct s390_operand s390_operands[]; 124 125 /* Values defined for the flags field of a struct s390_operand. */ 126 127 /* This operand names a register. The disassembler uses this to print 128 register names with a leading 'r'. */ 129 #define S390_OPERAND_GPR 0x1 130 131 /* This operand names a floating point register. The disassembler 132 prints these with a leading 'f'. */ 133 #define S390_OPERAND_FPR 0x2 134 135 /* This operand names an access register. The disassembler 136 prints these with a leading 'a'. */ 137 #define S390_OPERAND_AR 0x4 138 139 /* This operand names a control register. The disassembler 140 prints these with a leading 'c'. */ 141 #define S390_OPERAND_CR 0x8 142 143 /* This operand is a displacement. */ 144 #define S390_OPERAND_DISP 0x10 145 146 /* This operand names a base register. */ 147 #define S390_OPERAND_BASE 0x20 148 149 /* This operand names an index register, it can be skipped. */ 150 #define S390_OPERAND_INDEX 0x40 151 152 /* This operand is a relative branch displacement. The disassembler 153 prints these symbolically if possible. */ 154 #define S390_OPERAND_PCREL 0x80 155 156 /* This operand takes signed values. */ 157 #define S390_OPERAND_SIGNED 0x100 158 159 /* This operand is a length. */ 160 #define S390_OPERAND_LENGTH 0x200 161 162 /* The operand needs to be a valid GP or FP register pair. */ 163 #define S390_OPERAND_REG_PAIR 0x400 164 165 /* This operand names a vector register. The disassembler uses this 166 to print register names with a leading 'v'. */ 167 #define S390_OPERAND_VR 0x800 168 169 #define S390_OPERAND_CP16 0x1000 170 171 #define S390_OPERAND_OR1 0x2000 172 #define S390_OPERAND_OR2 0x4000 173 #define S390_OPERAND_OR8 0x8000 174 175 #endif /* S390_H */ 176