1/* $NetBSD: atomic_cas_32.S,v 1.8 2021/07/28 07:32:20 skrll Exp $ */ 2/*- 3 * Copyright (c) 2008 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Matt Thomas <matt@3am-software.com> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31#include "atomic_op_asm.h" 32 33#if defined(_ARM_ARCH_6) 34 35/* 36 * ARMv6 has load-exclusive/store-exclusive which works for both user 37 * and kernel. 38 */ 39ENTRY_NP(_atomic_cas_32) 40 mov ip, r0 /* we need r0 for return value */ 411: 42 ldrex r0, [ip] /* load old value */ 43 cmp r0, r1 /* compare? */ 44#ifdef __thumb__ 45 bne 2f /* return if different */ 46#else 47 RETc(ne) /* return if different */ 48#endif 49 strex r3, r2, [ip] /* store new value */ 50 cmp r3, #0 /* succeed? */ 51 bne 1b /* nope, try again. */ 522: RET /* return. */ 53END(_atomic_cas_32) 54 55ATOMIC_OP_ALIAS(atomic_cas_32,_atomic_cas_32) 56ATOMIC_OP_ALIAS(atomic_cas_uint,_atomic_cas_32) 57ATOMIC_OP_ALIAS(atomic_cas_ulong,_atomic_cas_32) 58ATOMIC_OP_ALIAS(atomic_cas_ptr,_atomic_cas_32) 59ATOMIC_OP_ALIAS(atomic_cas_32_ni,_atomic_cas_32) 60ATOMIC_OP_ALIAS(atomic_cas_uint_ni,_atomic_cas_32) 61ATOMIC_OP_ALIAS(atomic_cas_ulong_ni,_atomic_cas_32) 62ATOMIC_OP_ALIAS(atomic_cas_ptr_ni,_atomic_cas_32) 63STRONG_ALIAS(_atomic_cas_uint,_atomic_cas_32) 64STRONG_ALIAS(_atomic_cas_ulong,_atomic_cas_32) 65STRONG_ALIAS(_atomic_cas_32_ni,_atomic_cas_32) 66STRONG_ALIAS(_atomic_cas_ptr_ni,_atomic_cas_32) 67STRONG_ALIAS(_atomic_cas_uint_ni,_atomic_cas_32) 68STRONG_ALIAS(_atomic_cas_ulong_ni,_atomic_cas_32) 69STRONG_ALIAS(_atomic_cas_ptr,_atomic_cas_32) 70 71ENTRY_NP(__sync_val_compare_and_swap_4) 72 push {r4, lr} 73 DMB 74 bl _atomic_cas_32 75 DMB 76 pop {r4, pc} 77END(__sync_val_compare_and_swap_4) 78 79#endif /* _ARM_ARCH_6 */ 80