1/*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===// 2 * 3 * The LLVM Compiler Infrastructure 4 * 5 * This file is dual licensed under the MIT and the University of Illinois Open 6 * Source Licenses. See LICENSE.TXT for details. 7 * 8 *===----------------------------------------------------------------------===// 9 * 10 * This file implements the __udivsi3 (32-bit unsigned integer divide) 11 * function for the ARM 32-bit architecture. 12 * 13 *===----------------------------------------------------------------------===*/ 14 15#include "../assembly.h" 16 17 .syntax unified 18 .text 19 20#if __ARM_ARCH_ISA_THUMB == 2 21 .thumb 22#endif 23 24 .p2align 2 25DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3) 26 27@ unsigned int __udivsi3(unsigned int divident, unsigned int divisor) 28@ Calculate and return the quotient of the (unsigned) division. 29 30DEFINE_COMPILERRT_FUNCTION(__udivsi3) 31#if __ARM_ARCH_EXT_IDIV__ 32 tst r1, r1 33 beq LOCAL_LABEL(divby0) 34 udiv r0, r0, r1 35 bx lr 36#else 37 cmp r1, #1 38 bcc LOCAL_LABEL(divby0) 39 IT(eq) 40 JMPc(lr, eq) 41 cmp r0, r1 42 ITT(cc) 43 movcc r0, #0 44 JMPc(lr, cc) 45 /* 46 * Implement division using binary long division algorithm. 47 * 48 * r0 is the numerator, r1 the denominator. 49 * 50 * The code before JMP computes the correct shift I, so that 51 * r0 and (r1 << I) have the highest bit set in the same position. 52 * At the time of JMP, ip := .Ldiv0block - 12 * I. 53 * This depends on the fixed instruction size of block. 54 * For ARM mode, this is 12 Bytes, for THUMB mode 14 Bytes. 55 * 56 * block(shift) implements the test-and-update-quotient core. 57 * It assumes (r0 << shift) can be computed without overflow and 58 * that (r0 << shift) < 2 * r1. The quotient is stored in r3. 59 */ 60 61# ifdef __ARM_FEATURE_CLZ 62 clz ip, r0 63 clz r3, r1 64 /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ 65 sub r3, r3, ip 66# if __ARM_ARCH_ISA_THUMB == 2 67 adr ip, LOCAL_LABEL(div0block) + 1 68 sub ip, ip, r3, lsl #1 69# else 70 adr ip, LOCAL_LABEL(div0block) 71# endif 72 sub ip, ip, r3, lsl #2 73 sub ip, ip, r3, lsl #3 74 mov r3, #0 75 bx ip 76# else 77# if __ARM_ARCH_ISA_THUMB == 2 78# error THUMB mode requires CLZ or UDIV 79# endif 80 mov r2, r0 81 adr ip, LOCAL_LABEL(div0block) 82 83 lsr r3, r2, #16 84 cmp r3, r1 85 movhs r2, r3 86 subhs ip, ip, #(16 * 12) 87 88 lsr r3, r2, #8 89 cmp r3, r1 90 movhs r2, r3 91 subhs ip, ip, #(8 * 12) 92 93 lsr r3, r2, #4 94 cmp r3, r1 95 movhs r2, r3 96 subhs ip, #(4 * 12) 97 98 lsr r3, r2, #2 99 cmp r3, r1 100 movhs r2, r3 101 subhs ip, ip, #(2 * 12) 102 103 /* Last block, no need to update r2 or r3. */ 104 cmp r1, r2, lsr #1 105 subls ip, ip, #(1 * 12) 106 107 mov r3, #0 108 109 JMP(ip) 110# endif 111 112#define IMM # 113 114#define block(shift) \ 115 cmp r0, r1, lsl IMM shift; \ 116 ITT(hs); \ 117 WIDE(addhs) r3, r3, IMM (1 << shift); \ 118 WIDE(subhs) r0, r0, r1, lsl IMM shift 119 120 block(31) 121 block(30) 122 block(29) 123 block(28) 124 block(27) 125 block(26) 126 block(25) 127 block(24) 128 block(23) 129 block(22) 130 block(21) 131 block(20) 132 block(19) 133 block(18) 134 block(17) 135 block(16) 136 block(15) 137 block(14) 138 block(13) 139 block(12) 140 block(11) 141 block(10) 142 block(9) 143 block(8) 144 block(7) 145 block(6) 146 block(5) 147 block(4) 148 block(3) 149 block(2) 150 block(1) 151LOCAL_LABEL(div0block): 152 block(0) 153 154 mov r0, r3 155 JMP(lr) 156#endif /* __ARM_ARCH_EXT_IDIV__ */ 157 158LOCAL_LABEL(divby0): 159 mov r0, #0 160#ifdef __ARM_EABI__ 161 b __aeabi_idiv0 162#else 163 JMP(lr) 164#endif 165 166END_COMPILERRT_FUNCTION(__udivsi3) 167