1*0a6a1f1dSLionel Sambuc# $NetBSD: Makefile,v 1.14 2015/01/29 20:41:35 joerg Exp $ 2f4a2713aSLionel Sambuc 3f4a2713aSLionel SambucLIB= LLVMARMCodeGen 4f4a2713aSLionel Sambuc 5f4a2713aSLionel Sambuc.include <bsd.init.mk> 6f4a2713aSLionel Sambuc 7f4a2713aSLionel Sambuc.PATH: ${LLVM_SRCDIR}/lib/Target/ARM 8f4a2713aSLionel Sambuc 9f4a2713aSLionel SambucSRCS+= ARMAsmPrinter.cpp \ 10f4a2713aSLionel Sambuc ARMBaseInstrInfo.cpp \ 11f4a2713aSLionel Sambuc ARMBaseRegisterInfo.cpp \ 12f4a2713aSLionel Sambuc ARMConstantIslandPass.cpp \ 13f4a2713aSLionel Sambuc ARMConstantPoolValue.cpp \ 14f4a2713aSLionel Sambuc ARMExpandPseudoInsts.cpp \ 15f4a2713aSLionel Sambuc ARMFastISel.cpp \ 16f4a2713aSLionel Sambuc ARMFrameLowering.cpp \ 17f4a2713aSLionel Sambuc ARMHazardRecognizer.cpp \ 18f4a2713aSLionel Sambuc ARMISelDAGToDAG.cpp \ 19f4a2713aSLionel Sambuc ARMISelLowering.cpp \ 20f4a2713aSLionel Sambuc ARMInstrInfo.cpp \ 21f4a2713aSLionel Sambuc ARMLoadStoreOptimizer.cpp \ 22f4a2713aSLionel Sambuc ARMMCInstLower.cpp \ 23f4a2713aSLionel Sambuc ARMMachineFunctionInfo.cpp \ 24*0a6a1f1dSLionel Sambuc ARMOptimizeBarriersPass.cpp \ 25f4a2713aSLionel Sambuc ARMRegisterInfo.cpp \ 26f4a2713aSLionel Sambuc ARMSelectionDAGInfo.cpp \ 27f4a2713aSLionel Sambuc ARMSubtarget.cpp \ 28f4a2713aSLionel Sambuc ARMTargetMachine.cpp \ 29f4a2713aSLionel Sambuc ARMTargetObjectFile.cpp \ 30f4a2713aSLionel Sambuc ARMTargetTransformInfo.cpp \ 31f4a2713aSLionel Sambuc A15SDOptimizer.cpp \ 32f4a2713aSLionel Sambuc MLxExpansionPass.cpp \ 33f4a2713aSLionel Sambuc Thumb1InstrInfo.cpp \ 34f4a2713aSLionel Sambuc Thumb1FrameLowering.cpp \ 35f4a2713aSLionel Sambuc Thumb1RegisterInfo.cpp \ 36f4a2713aSLionel Sambuc Thumb2ITBlockPass.cpp \ 37f4a2713aSLionel Sambuc Thumb2InstrInfo.cpp \ 38f4a2713aSLionel Sambuc Thumb2RegisterInfo.cpp \ 39f4a2713aSLionel Sambuc Thumb2SizeReduction.cpp 40f4a2713aSLionel Sambuc 41f4a2713aSLionel SambucTABLEGEN_SRC= ARM.td 42f4a2713aSLionel SambucTABLEGEN_INCLUDES= -I${LLVM_SRCDIR}/lib/Target/ARM 43f4a2713aSLionel SambucTABLEGEN_OUTPUT= \ 44f4a2713aSLionel Sambuc ARMGenRegisterInfo.inc|-gen-register-info \ 45f4a2713aSLionel Sambuc ARMGenInstrInfo.inc|-gen-instr-info \ 46f4a2713aSLionel Sambuc ARMGenCodeEmitter.inc|-gen-emitter \ 47*0a6a1f1dSLionel Sambuc ARMGenMCCodeEmitter.inc|-gen-emitter \ 48f4a2713aSLionel Sambuc ARMGenMCPseudoLowering.inc|-gen-pseudo-lowering \ 49f4a2713aSLionel Sambuc ARMGenAsmWriter.inc|-gen-asm-writer \ 50f4a2713aSLionel Sambuc ARMGenAsmMatcher.inc|-gen-asm-matcher \ 51f4a2713aSLionel Sambuc ARMGenDAGISel.inc|-gen-dag-isel \ 52f4a2713aSLionel Sambuc ARMGenFastISel.inc|-gen-fast-isel \ 53f4a2713aSLionel Sambuc ARMGenCallingConv.inc|-gen-callingconv \ 54f4a2713aSLionel Sambuc ARMGenSubtargetInfo.inc|-gen-subtarget \ 55f4a2713aSLionel Sambuc ARMGenDisassemblerTables.inc|-gen-disassembler 56f4a2713aSLionel Sambuc 57f4a2713aSLionel Sambuc.include "${.PARSEDIR}/../../tablegen.mk" 58f4a2713aSLionel Sambuc 59f4a2713aSLionel Sambuc.if defined(HOSTLIB) 60f4a2713aSLionel Sambuc.include <bsd.hostlib.mk> 61f4a2713aSLionel Sambuc.else 62f4a2713aSLionel Sambuc.include <bsd.lib.mk> 63f4a2713aSLionel Sambuc.endif 64