1; RUN: opt %loadNPMPolly '-passes=print<polly-function-scops>' -polly-print-instructions -disable-output < %s 2>&1 | FileCheck %s 2 3; CHECK: Statements { 4; CHECK: Stmt_bb46 5; CHECK: Domain := 6; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] : tmp9 = tmp44 }; 7; CHECK: Schedule := 8; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] -> [0, 0] }; 9; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 1] 10; CHECK: [tmp44, tmp9] -> { Stmt_bb46[] -> MemRef_tmp47[] }; 11; CHECK: Instructions { 12; CHECK: %tmp47 = or i64 1, %tmp14 13; CHECK: } 14; CHECK: Stmt_bb48__TO__bb56 15; CHECK: Domain := 16; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] : tmp9 = tmp44 and 0 <= i0 < tmp44 }; 17; CHECK: Schedule := 18; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> [1, i0] }; 19; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 0] 20; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] }; 21; CHECK: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0] 22; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] }; 23; CHECK: ReadAccess := [Reduction Type: NONE] [Scalar: 1] 24; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_tmp47[] }; 25; CHECK: MayWriteAccess := [Reduction Type: NONE] [Scalar: 0] 26; CHECK: [tmp44, tmp9] -> { Stmt_bb48__TO__bb56[i0] -> MemRef_A[i0] }; 27; CHECK: Instructions { 28; CHECK: %tmp51 = load i64, ptr %tmp50, align 8 29; CHECK: %tmp52 = and i64 %tmp51, %tmp26 30; CHECK: %tmp53 = icmp eq i64 %tmp52, %tmp26 31; CHECK: store i64 42, ptr %tmp50, align 8 32; CHECK: } 33; CHECK: } 34 35target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 36 37define void @quux(i32 %arg, i32 %arg1, ptr %A, i64 %tmp9, i64 %tmp24, i64 %tmp14, i64 %tmp22, i64 %tmp44) { 38bb: 39 %tmp26 = or i64 %tmp22, %tmp24 40 br label %bb39 41 42bb39: ; preds = %bb39, %bb38 43 %tmp45 = icmp eq i64 %tmp44, %tmp9 44 br i1 %tmp45, label %bb46, label %bb81 45 46bb46: ; preds = %bb39 47 %tmp47 = or i64 1, %tmp14 48 br label %bb48 49 50bb48: ; preds = %bb56, %bb46 51 %tmp49 = phi i64 [ 0, %bb46 ], [ %tmp57, %bb56 ] 52 %tmp50 = getelementptr inbounds i64, ptr %A, i64 %tmp49 53 %tmp51 = load i64, ptr %tmp50, align 8 54 %tmp52 = and i64 %tmp51, %tmp26 55 %tmp53 = icmp eq i64 %tmp52, %tmp26 56 store i64 42, ptr %tmp50, align 8 57 br i1 %tmp53, label %bb54, label %bb56 58 59bb54: ; preds = %bb48 60 %tmp55 = xor i64 %tmp51, %tmp47 61 store i64 %tmp55, ptr %tmp50, align 8 62 br label %bb56 63 64bb56: ; preds = %bb54, %bb48 65 %tmp57 = add nuw nsw i64 %tmp49, 1 66 %tmp58 = icmp eq i64 %tmp57, %tmp9 67 br i1 %tmp58, label %bb81, label %bb48 68 69bb81: ; preds = %bb74, %bb56 70 ret void 71} 72