xref: /llvm-project/polly/test/ScopInfo/phi_scalar_simple_2.ll (revision e1f056f692d869708c1898d9d65a69ac5584a0ed)
1; RUN: opt %loadNPMPolly -polly-stmt-granularity=bb '-passes=print<polly-function-scops>' -disable-output < %s 2>&1 | FileCheck %s
2;
3;    int jd(int *restrict A, int x, int N, int c) {
4;      for (int i = 0; i < N; i++)
5;        for (int j = 0; j < N; j++)
6;          if (i < c)
7;            x += A[i];
8;      return x;
9;    }
10
11; CHECK:      Statements {
12; CHECK-NEXT:     Stmt_for_cond
13; CHECK-NEXT:         Domain :=
14; CHECK-NEXT:             [N, c] -> { Stmt_for_cond[i0] : 0 <= i0 <= N; Stmt_for_cond[0] : N < 0 };
15; CHECK-NEXT:         Schedule :=
16; CHECK-NEXT:             [N, c] -> { Stmt_for_cond[i0] -> [i0, 0, 0, 0] : i0 <= N; Stmt_for_cond[0] -> [0, 0, 0, 0] : N < 0 };
17; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
18; CHECK-NEXT:             [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0__phi[] };
19; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
20; CHECK-NEXT:             [N, c] -> { Stmt_for_cond[i0] -> MemRef_A[i0] };
21; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
22; CHECK-NEXT:             [N, c] -> { Stmt_for_cond[i0] -> MemRef_x_addr_0[] };
23; CHECK-NEXT:     Stmt_for_body
24; CHECK-NEXT:         Domain :=
25; CHECK-NEXT:             [N, c] -> { Stmt_for_body[i0] : 0 <= i0 < N };
26; CHECK-NEXT:         Schedule :=
27; CHECK-NEXT:             [N, c] -> { Stmt_for_body[i0] -> [i0, 1, 0, 0] };
28; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
29; CHECK-NEXT:             [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_0[] };
30; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
31; CHECK-NEXT:             [N, c] -> { Stmt_for_body[i0] -> MemRef_x_addr_1__phi[] };
32; CHECK-NEXT:     Stmt_for_cond1
33; CHECK-NEXT:         Domain :=
34; CHECK-NEXT:             [N, c] -> { Stmt_for_cond1[i0, i1] : 0 <= i0 < N and 0 <= i1 <= N };
35; CHECK-NEXT:         Schedule :=
36; CHECK-NEXT:             [N, c] -> { Stmt_for_cond1[i0, i1] -> [i0, 2, i1, 0] };
37; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
38; CHECK-NEXT:             [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1[] };
39; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
40; CHECK-NEXT:             [N, c] -> { Stmt_for_cond1[i0, i1] -> MemRef_x_addr_1__phi[] };
41; CHECK-NEXT:     Stmt_for_body3
42; CHECK-NEXT:         Domain :=
43; CHECK-NEXT:             [N, c] -> { Stmt_for_body3[i0, i1] : 0 <= i0 < N and 0 <= i1 < N };
44; CHECK-NEXT:         Schedule :=
45; CHECK-NEXT:             [N, c] -> { Stmt_for_body3[i0, i1] -> [i0, 2, i1, 1] };
46; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
47; CHECK-NEXT:             [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_1[] };
48; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
49; CHECK-NEXT:             [N, c] -> { Stmt_for_body3[i0, i1] -> MemRef_x_addr_2__phi[] };
50; CHECK-NEXT:     Stmt_if_then
51; CHECK-NEXT:         Domain :=
52; CHECK-NEXT:             [N, c] -> { Stmt_if_then[i0, i1] : 0 <= i0 < c and i0 < N and 0 <= i1 < N };
53; CHECK-NEXT:         Schedule :=
54; CHECK-NEXT:             [N, c] -> { Stmt_if_then[i0, i1] -> [i0, 2, i1, 2] };
55; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 0]
56; CHECK-NEXT:             [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_A[i0] };
57; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
58; CHECK-NEXT:             [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_1[] };
59; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
60; CHECK-NEXT:             [N, c] -> { Stmt_if_then[i0, i1] -> MemRef_x_addr_2__phi[] };
61; CHECK-NEXT:     Stmt_if_end
62; CHECK-NEXT:         Domain :=
63; CHECK-NEXT:             [N, c] -> { Stmt_if_end[i0, i1] : 0 <= i0 < N and 0 <= i1 < N };
64; CHECK-NEXT:         Schedule :=
65; CHECK-NEXT:             [N, c] -> { Stmt_if_end[i0, i1] -> [i0, 2, i1, 3] };
66; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
67; CHECK-NEXT:             [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2[] };
68; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
69; CHECK-NEXT:             [N, c] -> { Stmt_if_end[i0, i1] -> MemRef_x_addr_2__phi[] };
70; CHECK-NEXT:     Stmt_for_inc
71; CHECK-NEXT:         Domain :=
72; CHECK-NEXT:             [N, c] -> { Stmt_for_inc[i0, i1] : 0 <= i0 < N and 0 <= i1 < N };
73; CHECK-NEXT:         Schedule :=
74; CHECK-NEXT:             [N, c] -> { Stmt_for_inc[i0, i1] -> [i0, 2, i1, 4] };
75; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
76; CHECK-NEXT:             [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_2[] };
77; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
78; CHECK-NEXT:             [N, c] -> { Stmt_for_inc[i0, i1] -> MemRef_x_addr_1__phi[] };
79; CHECK-NEXT:     Stmt_for_inc5
80; CHECK-NEXT:         Domain :=
81; CHECK-NEXT:             [N, c] -> { Stmt_for_inc5[i0] : 0 <= i0 < N };
82; CHECK-NEXT:         Schedule :=
83; CHECK-NEXT:             [N, c] -> { Stmt_for_inc5[i0] -> [i0, 3, 0, 0] };
84; CHECK-NEXT:         ReadAccess :=    [Reduction Type: NONE] [Scalar: 1]
85; CHECK-NEXT:             [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_1[] };
86; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 1]
87; CHECK-NEXT:             [N, c] -> { Stmt_for_inc5[i0] -> MemRef_x_addr_0__phi[] };
88; CHECK-NEXT: }
89
90target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
91
92define i32 @jd(ptr noalias %A, i32 %x, i32 %N, i32 %c) {
93entry:
94  %tmp = sext i32 %N to i64
95  %tmp1 = sext i32 %c to i64
96  br label %for.cond
97
98for.cond:                                         ; preds = %for.inc5, %entry
99  %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc5 ], [ 0, %entry ]
100  %x.addr.0 = phi i32 [ %x, %entry ], [ %x.addr.1, %for.inc5 ]
101  %arrayidx2 = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
102  store i32 %x.addr.0, ptr %arrayidx2
103  %cmp = icmp slt i64 %indvars.iv, %tmp
104  br i1 %cmp, label %for.body, label %for.end7
105
106for.body:                                         ; preds = %for.cond
107  br label %for.cond1
108
109for.cond1:                                        ; preds = %for.inc, %for.body
110  %x.addr.1 = phi i32 [ %x.addr.0, %for.body ], [ %x.addr.2, %for.inc ]
111  %j.0 = phi i32 [ 0, %for.body ], [ %inc, %for.inc ]
112  %exitcond = icmp ne i32 %j.0, %N
113  br i1 %exitcond, label %for.body3, label %for.end
114
115for.body3:                                        ; preds = %for.cond1
116  %cmp4 = icmp slt i64 %indvars.iv, %tmp1
117  br i1 %cmp4, label %if.then, label %if.end
118
119if.then:                                          ; preds = %for.body3
120  %arrayidx = getelementptr inbounds i32, ptr %A, i64 %indvars.iv
121  %tmp2 = load i32, ptr %arrayidx, align 4
122  %add = add nsw i32 %x.addr.1, %tmp2
123  br label %if.end
124
125if.end:                                           ; preds = %if.then, %for.body3
126  %x.addr.2 = phi i32 [ %add, %if.then ], [ %x.addr.1, %for.body3 ]
127  br label %for.inc
128
129for.inc:                                          ; preds = %if.end
130  %inc = add nsw i32 %j.0, 1
131  br label %for.cond1
132
133for.end:                                          ; preds = %for.cond1
134  br label %for.inc5
135
136for.inc5:                                         ; preds = %for.end
137  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
138  br label %for.cond
139
140for.end7:                                         ; preds = %for.cond
141  ret i32 %x.addr.0
142}
143
144