xref: /llvm-project/polly/test/ScopInfo/cfg_consequences.ll (revision e1f056f692d869708c1898d9d65a69ac5584a0ed) 
1; RUN: opt %loadNPMPolly '-passes=print<polly-function-scops>' -disable-output < %s 2>&1 | FileCheck %s
2;
3; void consequences(int *A, int bool_cond, int lhs, int rhs) {
4;
5;   BC: *A = 0;
6;     if (bool_cond)
7;   S_BC:     *A = 0;
8;   M_BC: *A = 0;
9;
10;   NEG_BC: *A = 0;
11;     if (!bool_cond)
12;   S_NEG_BC: *A = 0;
13;   M_NEG_BC: *A = 0;
14;
15;   SLT: *A = 0;
16;     if (lhs < rhs)
17;   S_SLT:    *A = 0;
18;   M_SLT: *A = 0;
19;
20;   SLE: *A = 0;
21;     if (lhs <= rhs)
22;   S_SLE:    *A = 0;
23;   M_SLE: *A = 0;
24;
25;   SGT: *A = 0;
26;     if (lhs > rhs)
27;   S_SGT:    *A = 0;
28;   M_SGT: *A = 0;
29;
30;   SGE: *A = 0;
31;     if (lhs >= rhs)
32;   S_SGE:    *A = 0;
33;   M_SGE: *A = 0;
34;
35;   EQ: *A = 0;
36;     if (lhs == rhs)
37;   S_EQ:    *A = 0;
38;   M_EQ: *A = 0;
39;
40;   NEQ: *A = 0;
41;     if (lhs != rhs)
42;   S_NEQ:   *A = 0;
43;   M_NEQ: *A = 0;
44;
45; }
46; CHECK:      Statements {
47; CHECK-NEXT:     Stmt_BC
48; CHECK-NEXT:         Domain :=
49; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_BC[] };
50; CHECK-NEXT:         Schedule :=
51; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_BC[] -> [0] };
52; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
53; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_BC[] -> MemRef_A[0] };
54; CHECK-NEXT:     Stmt_S_BC
55; CHECK-NEXT:         Domain :=
56; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_BC[] : bool_cond < 0 or bool_cond > 0 };
57; CHECK-NEXT:         Schedule :=
58; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> [1] : bool_cond < 0 or bool_cond > 0 };
59; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
60; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_BC[] -> MemRef_A[0] };
61; CHECK-NEXT:     Stmt_M_BC
62; CHECK-NEXT:         Domain :=
63; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_BC[] };
64; CHECK-NEXT:         Schedule :=
65; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> [2] };
66; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
67; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_BC[] -> MemRef_A[0] };
68; CHECK-NEXT:     Stmt_NEG_BC
69; CHECK-NEXT:         Domain :=
70; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] };
71; CHECK-NEXT:         Schedule :=
72; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> [3] };
73; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
74; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEG_BC[] -> MemRef_A[0] };
75; CHECK-NEXT:     Stmt_S_NEG_BC
76; CHECK-NEXT:         Domain :=
77; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] : bool_cond = 0 };
78; CHECK-NEXT:         Schedule :=
79; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> [4] };
80; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
81; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEG_BC[] -> MemRef_A[0] };
82; CHECK-NEXT:     Stmt_M_NEG_BC
83; CHECK-NEXT:         Domain :=
84; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] };
85; CHECK-NEXT:         Schedule :=
86; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> [5] };
87; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
88; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEG_BC[] -> MemRef_A[0] };
89; CHECK-NEXT:     Stmt_SLT
90; CHECK-NEXT:         Domain :=
91; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLT[] };
92; CHECK-NEXT:         Schedule :=
93; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> [6] };
94; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
95; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLT[] -> MemRef_A[0] };
96; CHECK-NEXT:     Stmt_S_SLT
97; CHECK-NEXT:         Domain :=
98; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] : rhs > lhs };
99; CHECK-NEXT:         Schedule :=
100; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> [7] };
101; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
102; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLT[] -> MemRef_A[0] };
103; CHECK-NEXT:     Stmt_M_SLT
104; CHECK-NEXT:         Domain :=
105; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] };
106; CHECK-NEXT:         Schedule :=
107; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> [8] };
108; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
109; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLT[] -> MemRef_A[0] };
110; CHECK-NEXT:     Stmt_SLE
111; CHECK-NEXT:         Domain :=
112; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLE[] };
113; CHECK-NEXT:         Schedule :=
114; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> [9] };
115; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
116; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SLE[] -> MemRef_A[0] };
117; CHECK-NEXT:     Stmt_S_SLE
118; CHECK-NEXT:         Domain :=
119; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] : rhs >= lhs };
120; CHECK-NEXT:         Schedule :=
121; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> [10] };
122; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
123; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SLE[] -> MemRef_A[0] };
124; CHECK-NEXT:     Stmt_M_SLE
125; CHECK-NEXT:         Domain :=
126; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] };
127; CHECK-NEXT:         Schedule :=
128; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> [11] };
129; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
130; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SLE[] -> MemRef_A[0] };
131; CHECK-NEXT:     Stmt_SGT
132; CHECK-NEXT:         Domain :=
133; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGT[] };
134; CHECK-NEXT:         Schedule :=
135; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> [12] };
136; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
137; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGT[] -> MemRef_A[0] };
138; CHECK-NEXT:     Stmt_S_SGT
139; CHECK-NEXT:         Domain :=
140; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] : rhs < lhs };
141; CHECK-NEXT:         Schedule :=
142; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> [13] };
143; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
144; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGT[] -> MemRef_A[0] };
145; CHECK-NEXT:     Stmt_M_SGT
146; CHECK-NEXT:         Domain :=
147; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] };
148; CHECK-NEXT:         Schedule :=
149; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> [14] };
150; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
151; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGT[] -> MemRef_A[0] };
152; CHECK-NEXT:     Stmt_SGE
153; CHECK-NEXT:         Domain :=
154; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGE[] };
155; CHECK-NEXT:         Schedule :=
156; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> [15] };
157; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
158; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_SGE[] -> MemRef_A[0] };
159; CHECK-NEXT:     Stmt_S_SGE
160; CHECK-NEXT:         Domain :=
161; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] : rhs <= lhs };
162; CHECK-NEXT:         Schedule :=
163; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> [16] };
164; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
165; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_SGE[] -> MemRef_A[0] };
166; CHECK-NEXT:     Stmt_M_SGE
167; CHECK-NEXT:         Domain :=
168; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] };
169; CHECK-NEXT:         Schedule :=
170; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> [17] };
171; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
172; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_SGE[] -> MemRef_A[0] };
173; CHECK-NEXT:     Stmt_EQ
174; CHECK-NEXT:         Domain :=
175; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_EQ[] };
176; CHECK-NEXT:         Schedule :=
177; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> [18] };
178; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
179; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_EQ[] -> MemRef_A[0] };
180; CHECK-NEXT:     Stmt_S_EQ
181; CHECK-NEXT:         Domain :=
182; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] : rhs = lhs };
183; CHECK-NEXT:         Schedule :=
184; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> [19] };
185; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
186; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_EQ[] -> MemRef_A[0] };
187; CHECK-NEXT:     Stmt_M_EQ
188; CHECK-NEXT:         Domain :=
189; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] };
190; CHECK-NEXT:         Schedule :=
191; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> [20] };
192; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
193; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_EQ[] -> MemRef_A[0] };
194; CHECK-NEXT:     Stmt_NEQ
195; CHECK-NEXT:         Domain :=
196; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEQ[] };
197; CHECK-NEXT:         Schedule :=
198; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> [21] };
199; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
200; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_NEQ[] -> MemRef_A[0] };
201; CHECK-NEXT:     Stmt_S_NEQ
202; CHECK-NEXT:         Domain :=
203; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] : rhs > lhs or rhs < lhs };
204; CHECK-NEXT:         Schedule :=
205; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> [22] : rhs > lhs or rhs < lhs };
206; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
207; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_S_NEQ[] -> MemRef_A[0] };
208; CHECK-NEXT:     Stmt_M_NEQ
209; CHECK-NEXT:         Domain :=
210; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] };
211; CHECK-NEXT:         Schedule :=
212; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> [23] };
213; CHECK-NEXT:         MustWriteAccess :=    [Reduction Type: NONE] [Scalar: 0]
214; CHECK-NEXT:             [bool_cond, lhs, rhs] -> { Stmt_M_NEQ[] -> MemRef_A[0] };
215; CHECK-NEXT: }
216;
217target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
218
219define void @consequences(ptr %A, i32 %bool_cond, i32 %lhs, i32 %rhs) {
220entry:
221  br label %BC
222
223BC:                                               ; preds = %entry
224  store i32 0, ptr %A, align 4
225  %tobool = icmp eq i32 %bool_cond, 0
226  br i1 %tobool, label %M_BC, label %S_BC
227
228S_BC:                                             ; preds = %if.then
229  store i32 0, ptr %A, align 4
230  br label %M_BC
231
232M_BC:                                           ; preds = %BC, %S_BC
233  store i32 0, ptr %A, align 4
234  br label %NEG_BC
235
236NEG_BC:                                           ; preds = %if.end
237  store i32 0, ptr %A, align 4
238  %tobool1 = icmp eq i32 %bool_cond, 0
239  br i1 %tobool1, label %S_NEG_BC, label %M_NEG_BC
240
241S_NEG_BC:                                         ; preds = %if.then.2
242  store i32 0, ptr %A, align 4
243  br label %M_NEG_BC
244
245M_NEG_BC:                                         ; preds = %NEG_BC, %S_NEG_BC
246  store i32 0, ptr %A, align 4
247  br label %SLT
248
249SLT:                                              ; preds = %if.end.3
250  store i32 0, ptr %A, align 4
251  %cmp = icmp slt i32 %lhs, %rhs
252  br i1 %cmp, label %S_SLT, label %M_SLT
253
254S_SLT:                                            ; preds = %if.then.4
255  store i32 0, ptr %A, align 4
256  br label %M_SLT
257
258M_SLT:                                         ; preds = %S_SLT, %SLT
259  store i32 0, ptr %A, align 4
260  br label %SLE
261
262SLE:                                              ; preds = %if.end.5
263  store i32 0, ptr %A, align 4
264  %cmp6 = icmp sgt i32 %lhs, %rhs
265  br i1 %cmp6, label %M_SLE, label %S_SLE
266
267S_SLE:                                            ; preds = %if.then.7
268  store i32 0, ptr %A, align 4
269  br label %M_SLE
270
271M_SLE:                                         ; preds = %SLE, %S_SLE
272  store i32 0, ptr %A, align 4
273  br label %SGT
274
275SGT:                                              ; preds = %if.end.8
276  store i32 0, ptr %A, align 4
277  %cmp9 = icmp sgt i32 %lhs, %rhs
278  br i1 %cmp9, label %S_SGT, label %M_SGT
279
280S_SGT:                                            ; preds = %if.then.10
281  store i32 0, ptr %A, align 4
282  br label %M_SGT
283
284M_SGT:                                        ; preds = %S_SGT, %SGT
285  store i32 0, ptr %A, align 4
286  br label %SGE
287
288SGE:                                              ; preds = %if.end.11
289  store i32 0, ptr %A, align 4
290  %cmp12 = icmp slt i32 %lhs, %rhs
291  br i1 %cmp12, label %M_SGE, label %S_SGE
292
293S_SGE:                                            ; preds = %if.then.13
294  store i32 0, ptr %A, align 4
295  br label %M_SGE
296
297M_SGE:                                        ; preds = %SGE, %S_SGE
298  store i32 0, ptr %A, align 4
299  br label %EQ
300
301EQ:                                               ; preds = %if.end.14
302  store i32 0, ptr %A, align 4
303  %cmp15 = icmp eq i32 %lhs, %rhs
304  br i1 %cmp15, label %S_EQ, label %M_EQ
305
306S_EQ:                                             ; preds = %if.then.16
307  store i32 0, ptr %A, align 4
308  br label %M_EQ
309
310M_EQ:                                        ; preds = %S_EQ, %EQ
311  store i32 0, ptr %A, align 4
312  br label %NEQ
313
314NEQ:                                              ; preds = %if.end.17
315  store i32 0, ptr %A, align 4
316  %cmp18 = icmp eq i32 %lhs, %rhs
317  br i1 %cmp18, label %M_NEQ, label %S_NEQ
318
319S_NEQ:                                            ; preds = %if.then.19
320  store i32 0, ptr %A, align 4
321  br label %M_NEQ
322
323M_NEQ:                                        ; preds = %NEQ, %S_NEQ
324  store i32 0, ptr %A, align 4
325  br label %exit
326
327exit:
328  ret void
329}
330