xref: /llvm-project/polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout_2.ll (revision e1f056f692d869708c1898d9d65a69ac5584a0ed)
1; RUN: opt %loadNPMPolly -polly-pattern-matching-based-opts=true \
2; RUN: -polly-target-throughput-vector-fma=1 \
3; RUN: -polly-target-latency-vector-fma=8 \
4; RUN: -polly-target-1st-cache-level-associativity=8 \
5; RUN: -polly-target-2nd-cache-level-associativity=8 \
6; RUN: -polly-target-1st-cache-level-size=32768 \
7; RUN: -polly-target-2nd-cache-level-size=262144 \
8; RUN: -polly-target-vector-register-bitwidth=256 \
9; RUN: '-passes=polly-opt-isl,print<polly-ast>' -disable-output < %s | FileCheck %s
10;
11;    /* C := alpha*A*B + beta*C */
12;    /* _PB_NK % Kc != 0 */
13;    for (i = 0; i < _PB_NI; i++)
14;      for (j = 0; j < _PB_NJ; j++)
15;        {
16;	   C[i][j] *= beta;
17;	   for (k = 0; k < _PB_NK; ++k)
18;	     C[i][j] += alpha * A[i][k] * B[k][j];
19;        }
20;
21; CHECK-LABEL:     :: isl ast :: kernel_gemm :: %bb8---%bb32
22; CHECK:    {
23; CHECK-NEXT:      // 1st level tiling - Tiles
24; CHECK-NEXT:      for (int c0 = 0; c0 <= 32; c0 += 1)
25; CHECK-NEXT:        for (int c1 = 0; c1 <= 32; c1 += 1) {
26; CHECK-NEXT:          // 1st level tiling - Points
27; CHECK-NEXT:          for (int c2 = 0; c2 <= 31; c2 += 1)
28; CHECK-NEXT:            for (int c3 = 0; c3 <= 31; c3 += 1)
29; CHECK-NEXT:              Stmt_bb9(32 * c0 + c2, 32 * c1 + c3);
30; CHECK-NEXT:        }
31; CHECK-NEXT:      // 1st level tiling - Tiles
32; CHECK-NEXT:      for (int c1 = 0; c1 <= 3; c1 += 1) {
33; CHECK-NEXT:        for (int c3 = 0; c3 <= 1055; c3 += 1)
34; CHECK-NEXT:          for (int c4 = 256 * c1; c4 <= min(1022, 256 * c1 + 255); c4 += 1)
35; CHECK-NEXT:            CopyStmt_0(0, c3, c4);
36; CHECK-NEXT:        for (int c2 = 0; c2 <= 10; c2 += 1) {
37; CHECK-NEXT:          for (int c6 = 96 * c2; c6 <= 96 * c2 + 95; c6 += 1)
38; CHECK-NEXT:            for (int c7 = 256 * c1; c7 <= min(1022, 256 * c1 + 255); c7 += 1)
39; CHECK-NEXT:              CopyStmt_1(0, c1, c2, c6, c7);
40; CHECK-NEXT:          // 1st level tiling - Points
41; CHECK-NEXT:          // Register tiling - Tiles
42; CHECK-NEXT:          for (int c3 = 0; c3 <= 131; c3 += 1)
43; CHECK-NEXT:            for (int c4 = 0; c4 <= 23; c4 += 1)
44; CHECK-NEXT:              for (int c5 = 0; c5 <= min(255, -256 * c1 + 1022); c5 += 1) {
45; CHECK-NEXT:                // Loop Vectorizer Disabled
46; CHECK-NEXT:                // Register tiling - Points
47; CHECK-NEXT:                {
48; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3, 256 * c1 + c5);
49; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 1, 256 * c1 + c5);
50; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 2, 256 * c1 + c5);
51; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 3, 256 * c1 + c5);
52; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 4, 256 * c1 + c5);
53; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 5, 256 * c1 + c5);
54; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 6, 256 * c1 + c5);
55; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4, 8 * c3 + 7, 256 * c1 + c5);
56; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3, 256 * c1 + c5);
57; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 1, 256 * c1 + c5);
58; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 2, 256 * c1 + c5);
59; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 3, 256 * c1 + c5);
60; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 4, 256 * c1 + c5);
61; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 5, 256 * c1 + c5);
62; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 6, 256 * c1 + c5);
63; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 1, 8 * c3 + 7, 256 * c1 + c5);
64; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3, 256 * c1 + c5);
65; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 1, 256 * c1 + c5);
66; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 2, 256 * c1 + c5);
67; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 3, 256 * c1 + c5);
68; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 4, 256 * c1 + c5);
69; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 5, 256 * c1 + c5);
70; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 6, 256 * c1 + c5);
71; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 2, 8 * c3 + 7, 256 * c1 + c5);
72; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3, 256 * c1 + c5);
73; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 1, 256 * c1 + c5);
74; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 2, 256 * c1 + c5);
75; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 3, 256 * c1 + c5);
76; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 4, 256 * c1 + c5);
77; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 5, 256 * c1 + c5);
78; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 6, 256 * c1 + c5);
79; CHECK-NEXT:                  Stmt_Copy_0(96 * c2 + 4 * c4 + 3, 8 * c3 + 7, 256 * c1 + c5);
80; CHECK-NEXT:                }
81; CHECK-NEXT:              }
82; CHECK-NEXT:        }
83; CHECK-NEXT:      }
84; CHECK-NEXT:    }
85;
86target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
87target triple = "x86_64-unknown-unknown"
88
89define internal void @kernel_gemm(i32 %arg, i32 %arg1, i32 %arg2, double %arg3, double %arg4, ptr %arg5, ptr %arg6, ptr %arg7) #0 {
90bb:
91  br label %bb8
92
93bb8:                                              ; preds = %bb29, %bb
94  %tmp = phi i64 [ 0, %bb ], [ %tmp30, %bb29 ]
95  br label %bb9
96
97bb9:                                              ; preds = %bb26, %bb8
98  %tmp10 = phi i64 [ 0, %bb8 ], [ %tmp27, %bb26 ]
99  %tmp11 = getelementptr inbounds [1056 x double], ptr %arg5, i64 %tmp, i64 %tmp10
100  %tmp12 = load double, ptr %tmp11, align 8
101  %tmp13 = fmul double %tmp12, %arg4
102  store double %tmp13, ptr %tmp11, align 8
103  br label %Copy_0
104
105Copy_0:                                             ; preds = %Copy_0, %bb9
106  %tmp15 = phi i64 [ 0, %bb9 ], [ %tmp24, %Copy_0 ]
107  %tmp16 = getelementptr inbounds [1023 x double], ptr %arg6, i64 %tmp, i64 %tmp15
108  %tmp17 = load double, ptr %tmp16, align 8
109  %tmp18 = fmul double %tmp17, %arg3
110  %tmp19 = getelementptr inbounds [1056 x double], ptr %arg7, i64 %tmp15, i64 %tmp10
111  %tmp20 = load double, ptr %tmp19, align 8
112  %tmp21 = fmul double %tmp18, %tmp20
113  %tmp22 = load double, ptr %tmp11, align 8
114  %tmp23 = fadd double %tmp22, %tmp21
115  store double %tmp23, ptr %tmp11, align 8
116  %tmp24 = add nuw nsw i64 %tmp15, 1
117  %tmp25 = icmp ne i64 %tmp24, 1023
118  br i1 %tmp25, label %Copy_0, label %bb26
119
120bb26:                                             ; preds = %Copy_0
121  %tmp27 = add nuw nsw i64 %tmp10, 1
122  %tmp28 = icmp ne i64 %tmp27, 1056
123  br i1 %tmp28, label %bb9, label %bb29
124
125bb29:                                             ; preds = %bb26
126  %tmp30 = add nuw nsw i64 %tmp, 1
127  %tmp31 = icmp ne i64 %tmp30, 1056
128  br i1 %tmp31, label %bb8, label %bb32
129
130bb32:                                             ; preds = %bb29
131  ret void
132}
133
134attributes #0 = { nounwind uwtable "target-cpu"="x86-64" "target-features"="+aes,+avx,+cmov,+cx16,+fxsr,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" }
135