xref: /llvm-project/polly/test/ForwardOpTree/atax.ll (revision e1f056f692d869708c1898d9d65a69ac5584a0ed)
1; RUN: opt %loadNPMPolly -polly-stmt-granularity=bb -polly-optree-normalize-phi=true '-passes=print<polly-optree>' -disable-output < %s | FileCheck %s -match-full-lines
2
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4
5define internal fastcc void @kernel_atax(ptr nocapture readonly %A, ptr nocapture readonly %x, ptr nocapture %y, ptr nocapture %tmp) unnamed_addr #0 {
6entry:
7  br label %entry.split
8
9entry.split:                                      ; preds = %entry
10  call void @llvm.memset.p0.i64(ptr %y, i8 0, i64 16800, i32 8, i1 false)
11  br label %for.body3
12
13for.body3:                                        ; preds = %for.inc40, %entry.split
14  %indvars.iv8 = phi i64 [ 0, %entry.split ], [ %indvars.iv.next9, %for.inc40 ]
15  %arrayidx5 = getelementptr inbounds double, ptr %tmp, i64 %indvars.iv8
16  store double 0.000000e+00, ptr %arrayidx5, align 8, !tbaa !6
17  br label %for.body8
18
19for.body8:                                        ; preds = %for.body8, %for.body3
20  %0 = phi double [ 0.000000e+00, %for.body3 ], [ %add, %for.body8 ]
21  %indvars.iv = phi i64 [ 0, %for.body3 ], [ %indvars.iv.next, %for.body8 ]
22  %arrayidx14 = getelementptr inbounds [2100 x double], ptr %A, i64 %indvars.iv8, i64 %indvars.iv
23  %1 = load double, ptr %arrayidx14, align 8, !tbaa !6
24  %arrayidx16 = getelementptr inbounds double, ptr %x, i64 %indvars.iv
25  %2 = load double, ptr %arrayidx16, align 8, !tbaa !6
26  %mul = fmul double %1, %2
27  %add = fadd double %0, %mul
28  store double %add, ptr %arrayidx5, align 8, !tbaa !6
29  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
30  %exitcond = icmp eq i64 %indvars.iv.next, 2
31  br i1 %exitcond, label %for.end21, label %for.body8
32
33for.end21:                                        ; preds = %for.body8
34  br label %for.body24
35
36for.body24:                                       ; preds = %for.body24.for.body24_crit_edge, %for.end21
37  %3 = phi double [ %add, %for.end21 ], [ %.pre, %for.body24.for.body24_crit_edge ]
38  %indvars.iv5 = phi i64 [ 0, %for.end21 ], [ %indvars.iv.next6, %for.body24.for.body24_crit_edge ]
39  %arrayidx26 = getelementptr inbounds double, ptr %y, i64 %indvars.iv5
40  %4 = load double, ptr %arrayidx26, align 8, !tbaa !6
41  %arrayidx30 = getelementptr inbounds [2100 x double], ptr %A, i64 %indvars.iv8, i64 %indvars.iv5
42  %5 = load double, ptr %arrayidx30, align 8, !tbaa !6
43  %mul33 = fmul double %5, %3
44  %add34 = fadd double %4, %mul33
45  store double %add34, ptr %arrayidx26, align 8, !tbaa !6
46  %indvars.iv.next6 = add nuw nsw i64 %indvars.iv5, 1
47  %exitcond7 = icmp eq i64 %indvars.iv.next6, 2
48  br i1 %exitcond7, label %for.inc40, label %for.body24.for.body24_crit_edge
49
50for.body24.for.body24_crit_edge:                  ; preds = %for.body24
51  %.pre = load double, ptr %arrayidx5, align 8, !tbaa !6
52  br label %for.body24
53
54for.inc40:                                        ; preds = %for.body24
55  %indvars.iv.next9 = add nuw nsw i64 %indvars.iv8, 1
56  %exitcond10 = icmp eq i64 %indvars.iv.next9, 2
57  br i1 %exitcond10, label %for.end42, label %for.body3
58
59for.end42:                                        ; preds = %for.inc40
60  ret void
61}
62
63; Function Attrs: argmemonly nounwind
64declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i32, i1) #1
65
66attributes #0 = { noinline norecurse nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
67attributes #1 = { argmemonly nounwind }
68
69!llvm.module.flags = !{!0}
70!llvm.ident = !{!1}
71
72!0 = !{i32 1, !"wchar_size", i32 4}
73!1 = !{!"clang version 6.0.0 (trunk 312565) (llvm/trunk 312564)"}
74!2 = !{!3, !3, i64 0}
75!3 = !{!"any pointer", !4, i64 0}
76!4 = !{!"omnipotent char", !5, i64 0}
77!5 = !{!"Simple C/C++ TBAA"}
78!6 = !{!7, !7, i64 0}
79!7 = !{!"double", !4, i64 0}
80
81
82; CHECK: Statistics {
83; CHECK:     Operand trees forwarded: 2
84; CHECK:     Statements with forwarded operand trees: 2
85; CHECK: }
86
87; CHECK-NEXT: After statements {
88; CHECK-NEXT:     Stmt_for_body3
89; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
90; CHECK-NEXT:                 { Stmt_for_body3[i0] -> MemRef_tmp[i0] };
91; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
92; CHECK-NEXT:                 { Stmt_for_body3[i0] -> MemRef1__phi[] };
93; CHECK-NEXT:             Instructions {
94; CHECK-NEXT:                   store double 0.000000e+00, ptr %arrayidx5, align 8, !tbaa !2
95; CHECK-NEXT:             }
96; CHECK-NEXT:     Stmt_for_body8
97; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
98; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef1__phi[] };
99; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
100; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef1__phi[] };
101; CHECK-NEXT:            new: { Stmt_for_body8[i0, i1] -> MemRef_tmp[i0] };
102; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
103; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef_A[i0, i1] };
104; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
105; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef_x[i1] };
106; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
107; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef_tmp[i0] };
108; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
109; CHECK-NEXT:                 { Stmt_for_body8[i0, i1] -> MemRef_add[] };
110; CHECK-NEXT:             Instructions {
111; CHECK-NEXT:                   %0 = phi double [ 0.000000e+00, %for.body3 ], [ %add, %for.body8 ]
112; CHECK-NEXT:                   %1 = load double, ptr %arrayidx14, align 8, !tbaa !2
113; CHECK-NEXT:                   %2 = load double, ptr %arrayidx16, align 8, !tbaa !2
114; CHECK-NEXT:                   %mul = fmul double %1, %2
115; CHECK-NEXT:                   %add = fadd double %0, %mul
116; CHECK-NEXT:                   store double %add, ptr %arrayidx5, align 8, !tbaa !2
117; CHECK-NEXT:                   %exitcond = icmp eq i64 %indvars.iv.next, 2
118; CHECK-NEXT:             }
119; CHECK-NEXT:     Stmt_for_end21
120; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
121; CHECK-NEXT:                 { Stmt_for_end21[i0] -> MemRef_add[] };
122; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
123; CHECK-NEXT:                 { Stmt_for_end21[i0] -> MemRef5__phi[] };
124; CHECK-NEXT:             Instructions {
125; CHECK-NEXT:             }
126; CHECK-NEXT:     Stmt_for_body24
127; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 1]
128; CHECK-NEXT:                 { Stmt_for_body24[i0, i1] -> MemRef5__phi[] };
129; CHECK-NEXT:            new: { Stmt_for_body24[i0, i1] -> MemRef_tmp[i0] };
130; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
131; CHECK-NEXT:                 { Stmt_for_body24[i0, i1] -> MemRef_y[i1] };
132; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
133; CHECK-NEXT:                 { Stmt_for_body24[i0, i1] -> MemRef_A[i0, i1] };
134; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 0]
135; CHECK-NEXT:                 { Stmt_for_body24[i0, i1] -> MemRef_y[i1] };
136; CHECK-NEXT:             Instructions {
137; CHECK-NEXT:                   %3 = phi double [ %add, %for.end21 ], [ %.pre, %for.body24.for.body24_crit_edge ]
138; CHECK-NEXT:                   %4 = load double, ptr %arrayidx26, align 8, !tbaa !2
139; CHECK-NEXT:                   %5 = load double, ptr %arrayidx30, align 8, !tbaa !2
140; CHECK-NEXT:                   %mul33 = fmul double %5, %3
141; CHECK-NEXT:                   %add34 = fadd double %4, %mul33
142; CHECK-NEXT:                   store double %add34, ptr %arrayidx26, align 8, !tbaa !2
143; CHECK-NEXT:                   %exitcond7 = icmp eq i64 %indvars.iv.next6, 2
144; CHECK-NEXT:             }
145; CHECK-NEXT:     Stmt_for_body24_for_body24_crit_edge
146; CHECK-NEXT:             MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
147; CHECK-NEXT:                 { Stmt_for_body24_for_body24_crit_edge[i0, i1] -> MemRef5__phi[] };
148; CHECK-NEXT:             ReadAccess :=       [Reduction Type: NONE] [Scalar: 0]
149; CHECK-NEXT:                 { Stmt_for_body24_for_body24_crit_edge[i0, i1] -> MemRef_tmp[i0] };
150; CHECK-NEXT:             Instructions {
151; CHECK-NEXT:                   %.pre = load double, ptr %arrayidx5, align 8, !tbaa !2
152; CHECK-NEXT:             }
153; CHECK-NEXT: }
154