xref: /llvm-project/polly/test/DeLICM/contradicting_assumed_context_and_domain.ll (revision e1f056f692d869708c1898d9d65a69ac5584a0ed)
1; RUN: opt %loadNPMPolly '-passes=print<polly-delicm>' -disable-output < %s | FileCheck %s
2;
3; The domain of bb14 contradicts the SCoP's assumptions. This leads to
4; 'anything goes' inside the statement since it is never executed,
5; including changing a memory write inside to
6;   [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false }
7; (i.e.: never write)
8;
9target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
10
11define void @f(ptr %arg, i32 %arg1) {
12bb:
13  %tmp = alloca [24 x i32], align 4
14  br label %bb2
15
16bb2:
17  %tmp3 = phi i32 [ 0, %bb ], [ %tmp32, %bb34 ]
18  br i1 true, label %bb5, label %bb4
19
20bb4:
21  br label %bb24
22
23bb5:
24  %tmp6 = sub nsw i32 %arg1, %tmp3
25  %tmp7 = add i32 %tmp6, -1
26  %tmp8 = icmp eq i32 %tmp3, 0
27  br i1 %tmp8, label %bb13, label %bb10
28
29bb10:
30  %tmp11 = getelementptr inbounds i16, ptr %arg, i32 %tmp7
31  %tmp12 = load i16, ptr %tmp11, align 2
32  br label %bb14
33
34bb13:
35  br label %bb31
36
37bb14:
38  %tmp15 = phi i32 [ 0, %bb10 ], [ %tmp21, %bb14 ]
39  %tmp16 = phi i16 [ undef, %bb10 ], [ %tmp19, %bb14 ]
40  %tmp17 = getelementptr inbounds [24 x i32], ptr %tmp, i32 0, i32 %tmp15
41  %tmp19 = load i16, ptr %arg, align 2
42  store i32 undef, ptr %tmp17, align 4
43  %tmp20 = call i32 asm "#", "=r,r"(i16 %tmp19) readnone
44  %tmp21 = add nuw nsw i32 %tmp15, 1
45  %tmp22 = icmp eq i32 %tmp21, %tmp3
46  br i1 %tmp22, label %bb23, label %bb14
47
48bb23:
49  br label %bb31
50
51bb24:
52  %tmp25 = phi i32 [ %tmp30, %bb24 ], [ 0, %bb4 ]
53  %tmp26 = mul nsw i32 %tmp25, %arg1
54  %tmp27 = getelementptr inbounds i16, ptr %arg, i32 %tmp26
55  %tmp29 = load i16, ptr %tmp27, align 2
56  %tmp30 = add nuw nsw i32 %tmp25, 1
57  br i1 false, label %bb31, label %bb24
58
59bb31:
60  %tmp32 = add nuw nsw i32 %tmp3, 1
61  br i1 undef, label %bb34, label %bb33
62
63bb33:
64  unreachable
65
66bb34:
67  br label %bb2
68}
69
70
71; CHECK:      Stmt_bb14
72; CHECK:        MustWriteAccess :=  [Reduction Type: NONE] [Scalar: 1]
73; CHECK-NEXT:            [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp16__phi[] };
74; CHECK-NEXT:       new: [p_0, arg1] -> { Stmt_bb14[i0] -> MemRef_tmp[o0] : false };
75