xref: /llvm-project/polly/test/CodeGen/MemAccess/simple_stride___%for.cond---%for.end.jscop (revision 35f7020098773816f151c2c1da7b4dfc11041126) 
1{
2   "context" : "{  :  }",
3   "name" : "for.cond => for.end",
4   "statements" : [
5      {
6         "accesses" : [
7            {
8               "kind" : "read",
9               "relation" : "{ Stmt_for_body[i0] -> MemRef_B[0] }"
10            },
11            {
12               "kind" : "write",
13               "relation" : "{ Stmt_for_body[i0] -> MemRef_A[i0] }"
14            }
15         ],
16         "domain" : "{ Stmt_for_body[i0] : i0 >= 0 and i0 <= 15 }",
17         "name" : "Stmt_for_body",
18         "schedule" : "{ Stmt_for_body[i0] -> [0, i0, 0] }"
19      }
20   ]
21}
22