1; RUN: opt %loadNPMPolly -passes=polly-codegen -S < %s | FileCheck %s -check-prefix=SEQUENTIAL 2; RUN: opt %loadNPMPolly -passes=polly-codegen -polly-ast-detect-parallel -S < %s | FileCheck %s -check-prefix=PARALLEL 3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 4 5; This is a trivially parallel loop. We just use it to ensure that we actually 6; emit the right information. 7; 8; for (i = 0; i < n; i++) 9; A[i] = 1; 10; 11@A = common global [1024 x i32] zeroinitializer 12define void @test-one(i64 %n) { 13start: 14 fence seq_cst 15 br label %loop.header 16 17loop.header: 18 %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ] 19 %exitcond = icmp ne i64 %i, %n 20 br i1 %exitcond, label %loop.body, label %ret 21 22loop.body: 23 %scevgep = getelementptr [1024 x i32], ptr @A, i64 0, i64 %i 24 store i32 1, ptr %scevgep 25 br label %loop.backedge 26 27loop.backedge: 28 %i.next = add nsw i64 %i, 1 29 br label %loop.header 30 31ret: 32 fence seq_cst 33 ret void 34} 35 36; SEQUENTIAL-LABEL: @test-one 37; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access 38; SEQUENTIAL-NOT: !llvm.access.group 39 40; PARALLEL: @test-one 41; PARALLEL: store i32 1, ptr %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID3:[0-9]+]] 42; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID4:[0-9]+]] 43 44 45; This loop has memory dependences that require at least a simple dependence 46; analysis to detect the parallelism. 47; 48; for (i = 0; i < n; i++) 49; A[2 * i] = A[2 * i + 1]; 50; 51define void @test-two(i64 %n) { 52start: 53 fence seq_cst 54 br label %loop.header 55 56loop.header: 57 %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ] 58 %exitcond = icmp ne i64 %i, %n 59 br i1 %exitcond, label %loop.body, label %ret 60 61loop.body: 62 %loadoffset1 = mul nsw i64 %i, 2 63 %loadoffset2 = add nsw i64 %loadoffset1, 1 64 %scevgepload = getelementptr [1024 x i32], ptr @A, i64 0, i64 %loadoffset2 65 %val = load i32, ptr %scevgepload 66 %storeoffset = mul i64 %i, 2 67 %scevgepstore = getelementptr [1024 x i32], ptr @A, i64 0, i64 %storeoffset 68 store i32 %val, ptr %scevgepstore 69 br label %loop.backedge 70 71loop.backedge: 72 %i.next = add nsw i64 %i, 1 73 br label %loop.header 74 75ret: 76 fence seq_cst 77 ret void 78} 79 80; SEQUENTIAL-LABEL: @test-two 81; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access 82; SEQUENTIAL-NOT: !llvm.access.group 83 84; PARALLEL: @test-two 85; PARALLEL: %val_p_scalar_ = load i32, ptr %scevgep, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8:[0-9]*]] 86; PARALLEL: store i32 %val_p_scalar_, ptr %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8]] 87; PARALLEL: br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID9:[0-9]*]] 88 89; PARALLEL: ![[LoopID4]] = distinct !{![[LoopID4]], ![[PARACC5:[0-9]+]]} 90; PARALLEL: ![[PARACC5]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID3]]} 91; PARALLEL: ![[LoopID9]] = distinct !{![[LoopID9]], ![[PARACC10:[0-9]+]]} 92; PARALLEL: ![[PARACC10]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID8]]} 93