1// RUN: mlir-translate -no-implicit-module -test-spirv-roundtrip-debug -mlir-print-debuginfo -mlir-print-local-scope %s | FileCheck %s 2 3spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [Shader], []> { 4 // CHECK: loc({{".*debug.mlir"}}:5:3) 5 spirv.GlobalVariable @var0 bind(0, 1) : !spirv.ptr<f32, Input> 6 spirv.func @arithmetic(%arg0 : vector<4xf32>, %arg1 : vector<4xf32>) "None" { 7 // CHECK: loc({{".*debug.mlir"}}:8:10) 8 %0 = spirv.FAdd %arg0, %arg1 : vector<4xf32> 9 // CHECK: loc({{".*debug.mlir"}}:10:10) 10 %1 = spirv.FNegate %arg0 : vector<4xf32> 11 spirv.Return 12 } 13 14 spirv.func @atomic(%ptr: !spirv.ptr<i32, Workgroup>, %value: i32, %comparator: i32) "None" { 15 // CHECK: loc({{".*debug.mlir"}}:16:10) 16 %1 = spirv.AtomicAnd <Device> <None> %ptr, %value : !spirv.ptr<i32, Workgroup> 17 spirv.Return 18 } 19 20 spirv.func @bitwiser(%arg0 : i32, %arg1 : i32) "None" { 21 // CHECK: loc({{".*debug.mlir"}}:22:10) 22 %0 = spirv.BitwiseAnd %arg0, %arg1 : i32 23 spirv.Return 24 } 25 26 spirv.func @convert(%arg0 : f32) "None" { 27 // CHECK: loc({{".*debug.mlir"}}:28:10) 28 %0 = spirv.ConvertFToU %arg0 : f32 to i32 29 spirv.Return 30 } 31 32 spirv.func @composite(%arg0 : !spirv.struct<(f32, !spirv.struct<(!spirv.array<4xf32>, f32)>)>, %arg1: !spirv.array<4xf32>, %arg2 : f32, %arg3 : f32) "None" { 33 // CHECK: loc({{".*debug.mlir"}}:34:10) 34 %0 = spirv.CompositeInsert %arg1, %arg0[1 : i32, 0 : i32] : !spirv.array<4xf32> into !spirv.struct<(f32, !spirv.struct<(!spirv.array<4xf32>, f32)>)> 35 // CHECK: loc({{".*debug.mlir"}}:36:10) 36 %1 = spirv.CompositeConstruct %arg2, %arg3 : (f32, f32) -> vector<2xf32> 37 spirv.Return 38 } 39 40 spirv.func @group_non_uniform(%val: f32) "None" { 41 // CHECK: loc({{".*debug.mlir"}}:42:10) 42 %0 = spirv.GroupNonUniformFAdd <Workgroup> <Reduce> %val : f32 -> f32 43 spirv.Return 44 } 45 46 spirv.func @local_var() "None" { 47 %zero = spirv.Constant 0: i32 48 // CHECK: loc({{".*debug.mlir"}}:49:12) 49 %var = spirv.Variable init(%zero) : !spirv.ptr<i32, Function> 50 spirv.Return 51 } 52 53 spirv.func @logical(%arg0: i32, %arg1: i32) "None" { 54 // CHECK: loc({{".*debug.mlir"}}:55:10) 55 %0 = spirv.IEqual %arg0, %arg1 : i32 56 spirv.Return 57 } 58 59 spirv.func @memory_accesses(%arg0 : !spirv.ptr<!spirv.array<4x!spirv.array<4xf32>>, StorageBuffer>, %arg1 : i32, %arg2 : i32) "None" { 60 // CHECK: loc({{".*debug.mlir"}}:61:10) 61 %2 = spirv.AccessChain %arg0[%arg1, %arg2] : !spirv.ptr<!spirv.array<4x!spirv.array<4xf32>>, StorageBuffer>, i32, i32 -> !spirv.ptr<f32, StorageBuffer> 62 // CHECK: loc({{".*debug.mlir"}}:63:10) 63 %3 = spirv.Load "StorageBuffer" %2 : f32 64 // CHECK: loc({{.*debug.mlir"}}:65:5) 65 spirv.Store "StorageBuffer" %2, %3 : f32 66 // CHECK: loc({{".*debug.mlir"}}:67:5) 67 spirv.Return 68 } 69 70 spirv.func @loop(%count : i32) -> () "None" { 71 %zero = spirv.Constant 0: i32 72 %one = spirv.Constant 1: i32 73 %ivar = spirv.Variable init(%zero) : !spirv.ptr<i32, Function> 74 %jvar = spirv.Variable init(%zero) : !spirv.ptr<i32, Function> 75 spirv.mlir.loop { 76 // CHECK: loc({{".*debug.mlir"}}:75:5) 77 spirv.Branch ^header 78 ^header: 79 %ival0 = spirv.Load "Function" %ivar : i32 80 %icmp = spirv.SLessThan %ival0, %count : i32 81 // CHECK: loc({{".*debug.mlir"}}:75:5) 82 spirv.BranchConditional %icmp, ^body, ^merge 83 ^body: 84 spirv.Store "Function" %jvar, %zero : i32 85 spirv.mlir.loop { 86 // CHECK: loc({{".*debug.mlir"}}:85:7) 87 spirv.Branch ^header 88 ^header: 89 %jval0 = spirv.Load "Function" %jvar : i32 90 %jcmp = spirv.SLessThan %jval0, %count : i32 91 // CHECK: loc({{".*debug.mlir"}}:85:7) 92 spirv.BranchConditional %jcmp, ^body, ^merge 93 ^body: 94 // CHECK: loc({{".*debug.mlir"}}:95:9) 95 spirv.Branch ^continue 96 ^continue: 97 %jval1 = spirv.Load "Function" %jvar : i32 98 %add = spirv.IAdd %jval1, %one : i32 99 spirv.Store "Function" %jvar, %add : i32 100 // CHECK: loc({{".*debug.mlir"}}:101:9) 101 spirv.Branch ^header 102 ^merge: 103 // CHECK: loc({{".*debug.mlir"}}:85:7) 104 spirv.mlir.merge 105 // CHECK: loc({{".*debug.mlir"}}:85:7) 106 } 107 // CHECK: loc({{".*debug.mlir"}}:108:7) 108 spirv.Branch ^continue 109 ^continue: 110 %ival1 = spirv.Load "Function" %ivar : i32 111 %add = spirv.IAdd %ival1, %one : i32 112 spirv.Store "Function" %ivar, %add : i32 113 // CHECK: loc({{".*debug.mlir"}}:114:7) 114 spirv.Branch ^header 115 ^merge: 116 // CHECK: loc({{".*debug.mlir"}}:75:5) 117 spirv.mlir.merge 118 // CHECK: loc({{".*debug.mlir"}}:75:5) 119 } 120 spirv.Return 121 } 122 123 spirv.func @selection(%cond: i1) -> () "None" { 124 %zero = spirv.Constant 0: i32 125 %one = spirv.Constant 1: i32 126 %two = spirv.Constant 2: i32 127 %var = spirv.Variable init(%zero) : !spirv.ptr<i32, Function> 128 spirv.mlir.selection { 129 // CHECK: loc({{".*debug.mlir"}}:128:5) 130 spirv.BranchConditional %cond [5, 10], ^then, ^else 131 ^then: 132 spirv.Store "Function" %var, %one : i32 133 // CHECK: loc({{".*debug.mlir"}}:134:7) 134 spirv.Branch ^merge 135 ^else: 136 spirv.Store "Function" %var, %two : i32 137 // CHECK: loc({{".*debug.mlir"}}:138:7) 138 spirv.Branch ^merge 139 ^merge: 140 // CHECK: loc({{".*debug.mlir"}}:128:5) 141 spirv.mlir.merge 142 // CHECK: loc({{".*debug.mlir"}}:128:5) 143 } 144 spirv.Return 145 } 146} 147