xref: /llvm-project/mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir (revision cdb3ebf1e62df060767863e1e683409d6077ca6e)
1// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
2
3module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
4  llvm.func @omp_target_region_() {
5    %0 = llvm.mlir.constant(20 : i32) : i32
6    %1 = llvm.mlir.constant(10 : i32) : i32
7    %2 = llvm.mlir.constant(1 : i64) : i64
8    %3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr
9    %4 = llvm.mlir.constant(1 : i64) : i64
10    %5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr
11    %6 = llvm.mlir.constant(1 : i64) : i64
12    %7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr
13    llvm.store %1, %3 : i32, !llvm.ptr
14    llvm.store %0, %5 : i32, !llvm.ptr
15    %map1 = omp.map.info var_ptr(%3 : !llvm.ptr, i32)   map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
16    %map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32)   map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
17    %map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32)   map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
18    omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
19      %8 = llvm.load %arg0 : !llvm.ptr -> i32
20      %9 = llvm.load %arg1 : !llvm.ptr -> i32
21      %10 = llvm.add %8, %9  : i32
22      llvm.store %10, %arg2 : i32, !llvm.ptr
23      omp.terminator
24    }
25    llvm.return
26  }
27
28  llvm.func @omp_target_no_map() {
29    omp.target {
30      omp.terminator
31    }
32    llvm.return
33  }
34}
35
36// CHECK: define void @omp_target_region_()
37// CHECK: call i32 @__tgt_target_kernel(ptr @4, i64 -1, i32 -1, i32 0, ptr @.__omp_offloading_[[DEV:.*]]_[[FIL:.*]]_omp_target_region__l[[LINE1:.*]].region_id, ptr %kernel_args)
38
39// CHECK: br i1 %{{.*}}, label %omp_offload.failed, label %omp_offload.cont
40// CHECK: omp_offload.failed:
41// CHECK: call void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE1]](ptr %{{.*}}, ptr %{{.*}}, ptr %{{.*}})
42// CHECK: omp_offload.cont:
43
44// CHECK: define void @omp_target_no_map()
45// CHECK: call i32 @__tgt_target_kernel(ptr @4, i64 -1, i32 -1, i32 0, ptr @.__omp_offloading_[[DEV:.*]]_[[FIL:.*]]_omp_target_no_map_l[[LINE2:.*]].region_id, ptr %kernel_args)
46
47// CHECK: br i1 %{{.*}}, label %omp_offload.failed, label %omp_offload.cont
48// CHECK: omp_offload.failed:
49// CHECK: call void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_no_map_l[[LINE2]]()
50// CHECK: omp_offload.cont:
51
52// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE1]](ptr %[[ADDR_A:.*]], ptr %[[ADDR_B:.*]], ptr %[[ADDR_C:.*]])
53// CHECK: %[[VAL_A:.*]] = load i32, ptr %[[ADDR_A]], align 4
54// CHECK: %[[VAL_B:.*]] = load i32, ptr %[[ADDR_B]], align 4
55// CHECK: %[[SUM:.*]] = add i32 %[[VAL_A]], %[[VAL_B]]
56// CHECK: store i32 %[[SUM]], ptr %[[ADDR_C]], align 4
57
58// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_no_map_l[[LINE2]]()
59// CHECK: ret void
60