1// RUN: mlir-translate -verify-diagnostics -split-input-file -mlir-to-llvmir %s 2 3// Verify shape of predicate and vector must match 4llvm.func @arm_sme_vector_to_tile_invalid_types(%tileslice : i32, 5 %nxv4i1 : vector<[4]xi1>, 6 %nxv16i8 : vector<[16]xi8>) { 7 // expected-error @+1 {{failed to verify that all of {predicate, vector} have same shape}} 8 "arm_sme.intr.write.horiz"(%tileslice, %nxv4i1, %nxv16i8) <{tile_id = 0 : i32}> : 9 (i32, vector<[4]xi1>, vector<[16]xi8>) -> () 10 llvm.return 11} 12 13// ----- 14 15llvm.func @arm_sme_tile_slice_to_vector_invalid_shapes( 16 %tileslice : i32, %nxv4i1 : vector<[4]xi1>, %nxv16i8 : vector<[16]xi8> 17) -> vector<[3]xf32> { 18 // expected-error @+1 {{failed to verify that all of {vector, predicate, res} have same shape}} 19 %res = "arm_sme.intr.read.horiz"(%nxv16i8, %nxv4i1, %tileslice) <{tile_id = 0 : i32}> : 20 (vector<[16]xi8>, vector<[4]xi1>, i32) -> vector<[3]xf32> 21 llvm.return %res : vector<[3]xf32> 22} 23 24// ----- 25 26llvm.func @arm_sme_tile_slice_to_vector_invalid_element_types( 27 %tileslice : i32, %nxv4i1 : vector<[4]xi1>, %nxv4f32 : vector<[4]xf32> 28) -> vector<[3]xi32> { 29 // expected-error @+1 {{failed to verify that all of {vector, res} have same element type}} 30 %res = "arm_sme.intr.read.horiz"(%nxv4f32, %nxv4i1, %tileslice) <{tile_id = 0 : i32}> : 31 (vector<[4]xf32>, vector<[4]xi1>, i32) -> vector<[4]xi32> 32 llvm.return %res : vector<[4]xi32> 33} 34 35// ----- 36 37llvm.func @arm_sme_streaming_vl_invalid_return_type() -> i32 { 38 // expected-error @+1 {{failed to verify that `res` is i64}} 39 %res = "arm_sme.intr.cntsb"() : () -> i32 40 llvm.return %res : i32 41} 42