xref: /llvm-project/mlir/test/IR/slice_multiple_blocks.mlir (revision 641b12e94b8a4e7befbda691364554c186a61639)
1// RUN: mlir-opt --pass-pipeline="builtin.module(slice-analysis-test{omit-block-arguments=true})" %s | FileCheck %s
2
3func.func @slicing_linalg_op(%arg0 : index, %arg1 : index, %arg2 : index) {
4  %a = memref.alloc(%arg0, %arg2) : memref<?x?xf32>
5  %b = memref.alloc(%arg2, %arg1) : memref<?x?xf32>
6  cf.br ^bb1
7^bb1() :
8  %c = memref.alloc(%arg0, %arg1) : memref<?x?xf32>
9  %d = memref.alloc(%arg0, %arg1) : memref<?x?xf32>
10  linalg.matmul ins(%a, %b : memref<?x?xf32>, memref<?x?xf32>)
11               outs(%c : memref<?x?xf32>)
12  linalg.matmul ins(%a, %b : memref<?x?xf32>, memref<?x?xf32>)
13               outs(%d : memref<?x?xf32>)
14  memref.dealloc %c : memref<?x?xf32>
15  memref.dealloc %b : memref<?x?xf32>
16  memref.dealloc %a : memref<?x?xf32>
17  memref.dealloc %d : memref<?x?xf32>
18  return
19}
20// CHECK-LABEL: func @slicing_linalg_op__backward_slice__0
21//  CHECK-SAME:   %[[ARG0:[a-zA-Z0-9_]+]]: index
22//  CHECK-SAME:   %[[ARG1:[a-zA-Z0-9_]+]]: index
23//  CHECK-SAME:   %[[ARG2:[a-zA-Z0-9_]+]]: index
24//   CHECK-DAG:   %[[A:.+]] = memref.alloc(%[[ARG0]], %[[ARG2]]) : memref<?x?xf32>
25//   CHECK-DAG:   %[[B:.+]] = memref.alloc(%[[ARG2]], %[[ARG1]]) : memref<?x?xf32>
26//   CHECK-DAG:   %[[C:.+]] = memref.alloc(%[[ARG0]], %[[ARG1]]) : memref<?x?xf32>
27//       CHECK:   return
28
29// CHECK-LABEL: func @slicing_linalg_op__backward_slice__1
30//  CHECK-SAME:   %[[ARG0:[a-zA-Z0-9_]+]]: index
31//  CHECK-SAME:   %[[ARG1:[a-zA-Z0-9_]+]]: index
32//  CHECK-SAME:   %[[ARG2:[a-zA-Z0-9_]+]]: index
33//   CHECK-DAG:   %[[A:.+]] = memref.alloc(%[[ARG0]], %[[ARG2]]) : memref<?x?xf32>
34//   CHECK-DAG:   %[[B:.+]] = memref.alloc(%[[ARG2]], %[[ARG1]]) : memref<?x?xf32>
35//   CHECK-DAG:   %[[C:.+]] = memref.alloc(%[[ARG0]], %[[ARG1]]) : memref<?x?xf32>
36//       CHECK:   return
37