xref: /llvm-project/mlir/test/Dialect/Vector/chained-vector-reduction-folding.mlir (revision d33bad66d86a6fdb443c59561f9524f451a82db0)
1// RUN: mlir-opt %s --test-vector-chained-reduction-folding-patterns | FileCheck %s
2
3// CHECK-LABEL:   func.func @reduce_1x_fp32(
4// CHECK-SAME:     %[[ARG0:.+]]: vector<8xf32>) -> f32 {
5// CHECK-DAG:        %[[CST:.+]] = arith.constant 0.0
6// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ARG0]], %[[CST]] : vector<8xf32> into f32
7// CHECK-NEXT:       return %[[RES]] : f32
8func.func @reduce_1x_fp32(%arg0: vector<8xf32>) -> f32 {
9  %cst0 = arith.constant 0.0 : f32
10  %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
11  return %0 : f32
12}
13
14// CHECK-LABEL:   func.func @reduce_2x_fp32(
15// CHECK-SAME:     %[[ARG0:.+]]: vector<8xf32>, %[[ARG1:.+]]: vector<8xf32>) -> f32 {
16// CHECK-DAG:        %[[CST:.+]] = arith.constant 0.0
17// CHECK-DAG:        %[[ADD:.+]] = arith.addf %[[ARG0]], %[[ARG1]] : vector<8xf32>
18// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xf32> into f32
19// CHECK-NEXT:       return %[[RES]] : f32
20func.func @reduce_2x_fp32(%arg0: vector<8xf32>, %arg1: vector<8xf32>) -> f32 {
21  %cst0 = arith.constant 0.0 : f32
22  %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
23  %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
24  return %1 : f32
25}
26
27// CHECK-LABEL:   func.func @reduce_2x_no_acc_fp32(
28// CHECK-SAME:     %[[ARG0:.+]]: vector<8xf32>, %[[ARG1:.+]]: vector<8xf32>) -> f32 {
29// CHECK:            %[[ADD:.+]] = arith.addf %[[ARG0]], %[[ARG1]] : vector<8xf32>
30// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xf32> into f32
31// CHECK-NEXT:       return %[[RES]] : f32
32func.func @reduce_2x_no_acc_fp32(%arg0: vector<8xf32>, %arg1: vector<8xf32>) -> f32 {
33  %0 = vector.reduction <add>, %arg0 : vector<8xf32> into f32
34  %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
35  return %1 : f32
36}
37
38// CHECK-LABEL:   func.func @reduce_2x_zero_add_fp32(
39// CHECK-SAME:     %[[ARG0:.+]]: vector<8xf32>, %[[ARG1:.+]]: vector<8xf32>) -> f32 {
40// CHECK:            %[[ADD:.+]] = arith.addf %[[ARG0]], %[[ARG1]] : vector<8xf32>
41// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xf32> into f32
42// CHECK-NEXT:       return %[[RES]] : f32
43func.func @reduce_2x_zero_add_fp32(%arg0: vector<8xf32>, %arg1: vector<8xf32>) -> f32 {
44  %cst0 = arith.constant dense<0.0> : vector<8xf32>
45  %x = arith.addf %arg0, %cst0 : vector<8xf32>
46  %0 = vector.reduction <add>, %x : vector<8xf32> into f32
47  %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
48  return %1 : f32
49}
50
51// CHECK-LABEL:   func.func @reduce_3x_fp32(
52// CHECK-SAME:     %[[ARG0:.+]]: vector<8xf32>, %[[ARG1:.+]]: vector<8xf32>,
53// CHECK-SAME:     %[[ARG2:.+]]: vector<8xf32>) -> f32 {
54// CHECK-DAG:        %[[CST:.+]] = arith.constant 0.0
55// CHECK-DAG:        %[[ADD0:.+]] = arith.addf %[[ARG1]], %[[ARG2]] : vector<8xf32>
56// CHECK-DAG:        %[[ADD1:.+]] = arith.addf %[[ARG0]], %[[ADD0]] : vector<8xf32>
57// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD1]], %[[CST]] : vector<8xf32> into f32
58// CHECK-NEXT:       return %[[RES]] : f32
59func.func @reduce_3x_fp32(%arg0: vector<8xf32>, %arg1: vector<8xf32>,
60                          %arg2: vector<8xf32>) -> f32 {
61  %cst0 = arith.constant 0.0 : f32
62  %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xf32> into f32
63  %1 = vector.reduction <add>, %arg1, %0 : vector<8xf32> into f32
64  %2 = vector.reduction <add>, %arg2, %1 : vector<8xf32> into f32
65  return %2 : f32
66}
67
68// CHECK-LABEL:   func.func @reduce_1x_i32(
69// CHECK-SAME:     %[[ARG0:.+]]: vector<8xi32>) -> i32 {
70// CHECK-DAG:        %[[CST:.+]] = arith.constant 0
71// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ARG0]], %[[CST]] : vector<8xi32> into i32
72// CHECK-NEXT:       return %[[RES]] : i32
73func.func @reduce_1x_i32(%arg0: vector<8xi32>) -> i32 {
74  %cst0 = arith.constant 0 : i32
75  %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xi32> into i32
76  return %0 : i32
77}
78
79// CHECK-LABEL:   func.func @reduce_2x_i32(
80// CHECK-SAME:     %[[ARG0:.+]]: vector<8xi32>, %[[ARG1:.+]]: vector<8xi32>) -> i32 {
81// CHECK-DAG:        %[[CST:.+]] = arith.constant 0
82// CHECK-DAG:        %[[ADD:.+]] = arith.addi %[[ARG0]], %[[ARG1]] : vector<8xi32>
83// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xi32> into i32
84// CHECK-NEXT:       return %[[RES]] : i32
85func.func @reduce_2x_i32(%arg0: vector<8xi32>, %arg1: vector<8xi32>) -> i32 {
86  %cst0 = arith.constant 0 : i32
87  %0 = vector.reduction <add>, %arg0, %cst0 : vector<8xi32> into i32
88  %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32
89  return %1 : i32
90}
91
92// CHECK-LABEL:   func.func @reduce_2x_no_acc_i32(
93// CHECK-SAME:     %[[ARG0:.+]]: vector<8xi32>, %[[ARG1:.+]]: vector<8xi32>) -> i32 {
94// CHECK:            %[[ADD:.+]] = arith.addi %[[ARG0]], %[[ARG1]] : vector<8xi32>
95// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]] : vector<8xi32> into i32
96// CHECK-NEXT:       return %[[RES]] : i32
97func.func @reduce_2x_no_acc_i32(%arg0: vector<8xi32>, %arg1: vector<8xi32>) -> i32 {
98  %0 = vector.reduction <add>, %arg0 : vector<8xi32> into i32
99  %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32
100  return %1 : i32
101}
102
103// CHECK-LABEL:   func.func @reduce_2x_zero_add_i32(
104// CHECK-SAME:     %[[ARG0:.+]]: vector<8xi32>, %[[ARG1:.+]]: vector<8xi32>) -> i32 {
105// CHECK-DAG:        %[[CST:.+]] = arith.constant 0
106// CHECK-DAG:        %[[ADD:.+]] = arith.addi %[[ARG0]], %[[ARG1]] : vector<8xi32>
107// CHECK-NEXT:       %[[RES:.+]] = vector.reduction <add>, %[[ADD]], %[[CST]] : vector<8xi32> into i32
108// CHECK-NEXT:       return %[[RES]] : i32
109func.func @reduce_2x_zero_add_i32(%arg0: vector<8xi32>, %arg1: vector<8xi32>) -> i32 {
110  %cst0 = arith.constant 0 : i32
111  %cstV = arith.constant dense<0> : vector<8xi32>
112  %x = arith.addi %arg0, %cstV : vector<8xi32>
113  %0 = vector.reduction <add>, %x, %cst0 : vector<8xi32> into i32
114  %1 = vector.reduction <add>, %arg1, %0 : vector<8xi32> into i32
115  return %1 : i32
116}
117