1// RUN: mlir-opt -split-input-file -verify-diagnostics %s | FileCheck %s 2 3//===----------------------------------------------------------------------===// 4// spirv.INTEL.ConvertFToBF16 5//===----------------------------------------------------------------------===// 6 7spirv.func @f32_to_bf16(%arg0 : f32) "None" { 8 // CHECK: {{%.*}} = spirv.INTEL.ConvertFToBF16 {{%.*}} : f32 to i16 9 %0 = spirv.INTEL.ConvertFToBF16 %arg0 : f32 to i16 10 spirv.Return 11} 12 13// ----- 14 15spirv.func @f32_to_bf16_vec(%arg0 : vector<2xf32>) "None" { 16 // CHECK: {{%.*}} = spirv.INTEL.ConvertFToBF16 {{%.*}} : vector<2xf32> to vector<2xi16> 17 %0 = spirv.INTEL.ConvertFToBF16 %arg0 : vector<2xf32> to vector<2xi16> 18 spirv.Return 19} 20 21// ----- 22 23spirv.func @f32_to_bf16_unsupported(%arg0 : f64) "None" { 24 // expected-error @+1 {{operand #0 must be Float32 or vector of Float32 values of length 2/3/4/8/16, but got}} 25 %0 = spirv.INTEL.ConvertFToBF16 %arg0 : f64 to i16 26 spirv.Return 27} 28 29// ----- 30 31spirv.func @f32_to_bf16_vec_unsupported(%arg0 : vector<2xf32>) "None" { 32 // expected-error @+1 {{operand and result must have same number of elements}} 33 %0 = spirv.INTEL.ConvertFToBF16 %arg0 : vector<2xf32> to vector<4xi16> 34 spirv.Return 35} 36 37// ----- 38 39//===----------------------------------------------------------------------===// 40// spirv.INTEL.ConvertBF16ToF 41//===----------------------------------------------------------------------===// 42 43spirv.func @bf16_to_f32(%arg0 : i16) "None" { 44 // CHECK: {{%.*}} = spirv.INTEL.ConvertBF16ToF {{%.*}} : i16 to f32 45 %0 = spirv.INTEL.ConvertBF16ToF %arg0 : i16 to f32 46 spirv.Return 47} 48 49// ----- 50 51spirv.func @bf16_to_f32_vec(%arg0 : vector<2xi16>) "None" { 52 // CHECK: {{%.*}} = spirv.INTEL.ConvertBF16ToF {{%.*}} : vector<2xi16> to vector<2xf32> 53 %0 = spirv.INTEL.ConvertBF16ToF %arg0 : vector<2xi16> to vector<2xf32> 54 spirv.Return 55} 56 57// ----- 58 59spirv.func @bf16_to_f32_unsupported(%arg0 : i16) "None" { 60 // expected-error @+1 {{result #0 must be Float32 or vector of Float32 values of length 2/3/4/8/16, but got}} 61 %0 = spirv.INTEL.ConvertBF16ToF %arg0 : i16 to f16 62 spirv.Return 63} 64 65// ----- 66 67spirv.func @bf16_to_f32_vec_unsupported(%arg0 : vector<2xi16>) "None" { 68 // expected-error @+1 {{operand and result must have same number of elements}} 69 %0 = spirv.INTEL.ConvertBF16ToF %arg0 : vector<2xi16> to vector<3xf32> 70 spirv.Return 71} 72 73// ----- 74 75//===----------------------------------------------------------------------===// 76// spirv.INTEL.SplitBarrier 77//===----------------------------------------------------------------------===// 78 79spirv.func @split_barrier() "None" { 80 // CHECK: spirv.INTEL.ControlBarrierArrive <Workgroup> <Device> <Acquire|UniformMemory> 81 spirv.INTEL.ControlBarrierArrive <Workgroup> <Device> <Acquire|UniformMemory> 82 // CHECK: spirv.INTEL.ControlBarrierWait <Workgroup> <Device> <Acquire|UniformMemory> 83 spirv.INTEL.ControlBarrierWait <Workgroup> <Device> <Acquire|UniformMemory> 84 spirv.Return 85} 86 87// ----- 88 89//===----------------------------------------------------------------------===// 90// spirv.INTEL.CacheControls 91//===----------------------------------------------------------------------===// 92 93spirv.module Logical GLSL450 requires #spirv.vce<v1.0, [CacheControlsINTEL], [SPV_INTEL_cache_controls]> { 94 spirv.func @foo() "None" { 95 // CHECK: spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function> 96 %0 = spirv.Variable {cache_control_load_intel = [#spirv.cache_control_load_intel<cache_level = 0, load_cache_control = Uncached>, #spirv.cache_control_load_intel<cache_level = 1, load_cache_control = Cached>, #spirv.cache_control_load_intel<cache_level = 2, load_cache_control = InvalidateAfterR>]} : !spirv.ptr<f32, Function> 97 // CHECK: spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function> 98 %1 = spirv.Variable {cache_control_store_intel = [#spirv.cache_control_store_intel<cache_level = 0, store_cache_control = Uncached>, #spirv.cache_control_store_intel<cache_level = 1, store_cache_control = WriteThrough>, #spirv.cache_control_store_intel<cache_level = 2, store_cache_control = WriteBack>]} : !spirv.ptr<f32, Function> 99 spirv.Return 100 } 101} 102 103// ----- 104