xref: /llvm-project/llvm/unittests/tools/llvm-exegesis/X86/RegisterAliasingTest.cpp (revision 89b57061f7b769e9ea9bf6ed686e284f3e55affe)
1 //===-- X86RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 
10 #include "RegisterAliasing.h"
11 
12 #include <cassert>
13 #include <memory>
14 
15 #include "TestBase.h"
16 #include "X86InstrInfo.h"
17 #include "llvm/MC/TargetRegistry.h"
18 #include "llvm/Support/TargetSelect.h"
19 #include "gmock/gmock.h"
20 #include "gtest/gtest.h"
21 
22 namespace llvm {
23 namespace exegesis {
24 namespace {
25 
26 class X86RegisterAliasingTest : public X86TestBase {};
27 
TEST_F(X86RegisterAliasingTest,TrackSimpleRegister)28 TEST_F(X86RegisterAliasingTest, TrackSimpleRegister) {
29   const auto &RegInfo = State.getRegInfo();
30   const RegisterAliasingTracker tracker(RegInfo, X86::EAX);
31   std::set<MCPhysReg> ActualAliasedRegisters;
32   for (unsigned I : tracker.aliasedBits().set_bits())
33     ActualAliasedRegisters.insert(static_cast<MCPhysReg>(I));
34   const std::set<MCPhysReg> ExpectedAliasedRegisters = {
35       X86::AL, X86::AH, X86::AX, X86::EAX, X86::HAX, X86::RAX};
36   ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);
37   for (MCPhysReg aliased : ExpectedAliasedRegisters) {
38     ASSERT_THAT(tracker.getOrigin(aliased), X86::EAX);
39   }
40 }
41 
TEST_F(X86RegisterAliasingTest,TrackRegisterClass)42 TEST_F(X86RegisterAliasingTest, TrackRegisterClass) {
43   // The alias bits for GR8_ABCD_LRegClassID are the union of the alias bits for
44   // AL, BL, CL and DL.
45   const auto &RegInfo = State.getRegInfo();
46   const BitVector NoReservedReg(RegInfo.getNumRegs());
47 
48   const RegisterAliasingTracker RegClassTracker(
49       RegInfo, NoReservedReg, RegInfo.getRegClass(X86::GR8_ABCD_LRegClassID));
50 
51   BitVector sum(RegInfo.getNumRegs());
52   sum |= RegisterAliasingTracker(RegInfo, X86::AL).aliasedBits();
53   sum |= RegisterAliasingTracker(RegInfo, X86::BL).aliasedBits();
54   sum |= RegisterAliasingTracker(RegInfo, X86::CL).aliasedBits();
55   sum |= RegisterAliasingTracker(RegInfo, X86::DL).aliasedBits();
56 
57   ASSERT_THAT(RegClassTracker.aliasedBits(), sum);
58 }
59 
TEST_F(X86RegisterAliasingTest,TrackRegisterClassCache)60 TEST_F(X86RegisterAliasingTest, TrackRegisterClassCache) {
61   // Fetching twice the same tracker yields the same pointers.
62   const auto &RegInfo = State.getRegInfo();
63   const BitVector NoReservedReg(RegInfo.getNumRegs());
64   RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);
65   ASSERT_THAT(&Cache.getRegister(X86::AX), &Cache.getRegister(X86::AX));
66 
67   ASSERT_THAT(&Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID),
68               &Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID));
69 }
70 
71 } // namespace
72 } // namespace exegesis
73 } // namespace llvm
74