1; RUN: llvm-reduce --abort-on-invalid-reduction --delta-passes=basic-blocks --test FileCheck --test-arg --check-prefixes=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2; RUN: FileCheck %s < %t 3 4; Make sure an invalid reduction isn't produced due to leaving behind 5; invalid code in %bb8 after it becomes unreachable. 6 7; CHECK-INTERESTINGNESS: store i32 0, 8; CHECK-INTERESTINGNESS: store i32 1, 9; CHECK-INTERESTINGNESS: store i32 2, 10 11 12; CHECK: bb: 13; CHECK-NEXT: store i32 0, ptr addrspace(3) null, align 4 14 15; CHECK: bb6: ; preds = %bb8, %bb 16; CHECK-NEXT: store i32 1, ptr addrspace(3) null, align 4 17 18; CHECK: bb8: ; preds = %bb6 19; CHECK-NEXT: %tmp = phi ptr addrspace(5) [ null, %bb6 ] 20define amdgpu_kernel void @foo(i32 %arg) { 21bb: 22 store i32 0, ptr addrspace(3) null 23 br label %bb6 24 25bb6: ; preds = %bb10, %bb9, %bb8, %bb 26 store i32 1, ptr addrspace(3) null 27 switch i32 0, label %bb7 [ 28 i32 0, label %bb8 29 ] 30 31bb7: ; preds = %bb6 32 unreachable 33 34bb8: ; preds = %bb6 35 %tmp = phi ptr addrspace(5) [ null, %bb6 ] 36 store i32 2, ptr addrspace(5) %tmp 37 switch i32 %arg, label %bb6 [ 38 i32 0, label %bb10 39 i32 1, label %bb9 40 ] 41 42bb9: ; preds = %bb8 43 br label %bb6 44 45bb10: ; preds = %bb8 46 br label %bb6 47} 48