xref: /llvm-project/llvm/test/tools/llvm-reduce/mir/tracks-reg-liveness.mir (revision 56303223ac7652442fd4bb163b809141553f0067) 
1# REQUIRES: amdgpu-registered-target
2# RUN: llvm-reduce -simplify-mir --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log
3# RUN: FileCheck --check-prefix=RESULT %s < %t
4
5# CHECK-INTERESTINGNESS: V_MOV_B32_e32 $vgpr0
6# CHECK-INTERESTINGNESS: S_NOP 0
7
8# The block liveins list needs to be carried through even though this
9# tracksRegLiveness is false
10
11# RESULT: bb.0:
12# RESULT-NEXT: liveins: $vgpr0, $vgpr1_vgpr2
13# RESULT: %0:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec
14# RESULT-NEXT: S_NOP 0
15# RESULT-NEXT: S_ENDPGM 0, implicit %0, implicit %0
16
17---
18name: func
19tracksRegLiveness: false
20body:             |
21  bb.0:
22    liveins: $vgpr0, $vgpr1_vgpr2
23    S_WAITCNT 0
24    %0:vgpr_32 = V_MOV_B32_e32 $vgpr0, implicit $exec
25    %1:vgpr_32 = V_MOV_B32_e32 $vgpr1, implicit $exec
26    S_NOP 0
27    S_ENDPGM 0, implicit %0, implicit %1
28...
29
30