1# REQUIRES: amdgpu-registered-target 2# RUN: llvm-reduce -abort-on-invalid-reduction --delta-passes=instructions -mtriple=amdgcn-amd-amdhsa --test FileCheck --test-arg --check-prefix=CHECK-INTERESTINGNESS --test-arg %s --test-arg --input-file %s -o %t 2> %t.log 3# RUN: FileCheck --match-full-lines --check-prefix=RESULT %s < %t 4 5# CHECK-INTERESTINGNESS: %{{[0-9]+}}.sub0:vreg_64 = V_ADD_U32_e32 %{{[0-9]+}}.sub1, %{{[0-9]+}}.sub0, implicit $exec 6# CHECK-INTERESTINGNESS: %{{[0-9]+}}.sub0:vreg_64 = V_ADD_U32_e32 4, %{{[0-9]+}}.sub0, implicit $exec 7 8# RESULT: undef %{{[0-9]+}}.sub1:vreg_64 = IMPLICIT_DEF 9# RESULT-NEXT: %0.sub0:vreg_64 = V_ADD_U32_e32 %{{[0-9]+}}.sub1, %{{[0-9]+}}.sub0, implicit $exec 10# RESULT-NEXT: %1.sub0:vreg_64 = V_ADD_U32_e32 4, %{{[0-9]+}}.sub0, implicit $exec 11# RESULT-NEXT: S_ENDPGM 0, implicit %{{[0-9]+}}, implicit %{{[0-9]+}}.sub0 12--- 13name: f 14tracksRegLiveness: true 15body: | 16 bb.0: 17 S_WAITCNT 0 18 undef %0.sub1:vreg_64 = V_MOV_B32_e32 0, implicit $exec 19 %1.sub1:vreg_64 = V_ADD_U32_e32 2, %0.sub1, implicit $exec 20 %0.sub0:vreg_64 = V_ADD_U32_e32 %1.sub1, %0.sub0, implicit $exec 21 %1.sub0:vreg_64 = V_ADD_U32_e32 4, %0.sub0, implicit $exec 22 S_ENDPGM 0, implicit %1, implicit %0.sub0 23... 24