1*75cdab6dSDaniel Thornburgh# RUN: yaml2obj %s | llvm-objdump --no-print-imm-hex -d --mcpu=cortex-a8 - | FileCheck %s 255f1fbf0SSimon Tatham 355f1fbf0SSimon Tatham# Test that unrecognized instructions are skipped in a way that makes 455f1fbf0SSimon Tatham# sense for the Arm instruction set encoding. 555f1fbf0SSimon Tatham# 655f1fbf0SSimon Tatham# The first three instructions in this file are marked by the mapping 755f1fbf0SSimon Tatham# symbols as in Arm state, with the one in the middle unknown, and we 855f1fbf0SSimon Tatham# expect the disassembler to skip 4 bytes because that's the width of 955f1fbf0SSimon Tatham# any Arm instruction. 1055f1fbf0SSimon Tatham# 1155f1fbf0SSimon Tatham# At address 0xc there's a mapping symbol that says we're now in Thumb 1255f1fbf0SSimon Tatham# mode, and in that mode we include both a 16-bit and a 32-bit unknown 1355f1fbf0SSimon Tatham# Thumb instruction, which the disassembler will identify by the simple 1455f1fbf0SSimon Tatham# encoding criterion that tells you the instruction length without 1555f1fbf0SSimon Tatham# having to recognize it specifically. 1655f1fbf0SSimon Tatham# 1755f1fbf0SSimon Tatham# Finally we end with a single byte, to ensure nothing gets confused 1855f1fbf0SSimon Tatham# when the Thumb instruction stream doesn't contain enough data to 1955f1fbf0SSimon Tatham# even do that check. 2055f1fbf0SSimon Tatham 212b38f589SSimon Tatham# CHECK: 0: e3a00064 mov r0, #100 2255f1fbf0SSimon Tatham# CHECK-NEXT: 4: ffffffff <unknown> 232b38f589SSimon Tatham# CHECK-NEXT: 8: e0810312 add r0, r1, r2, lsl r3 2455f1fbf0SSimon Tatham 252b38f589SSimon Tatham# CHECK: c: 2064 movs r0, #100 262b38f589SSimon Tatham# CHECK-NEXT: e: b80e <unknown> 272b38f589SSimon Tatham# CHECK-NEXT: 10: 1840 adds r0, r0, r1 282b38f589SSimon Tatham# CHECK-NEXT: 12: f04f 0064 mov.w r0, #100 292b38f589SSimon Tatham# CHECK-NEXT: 16: ffee ddcc <unknown> 302b38f589SSimon Tatham# CHECK-NEXT: 1a: eb01 00c2 add.w r0, r1, r2, lsl #3 3155f1fbf0SSimon Tatham# CHECK-NEXT: 1e: 9a <unknown> 3255f1fbf0SSimon Tatham 3355f1fbf0SSimon Tatham--- !ELF 3455f1fbf0SSimon TathamFileHeader: 3555f1fbf0SSimon Tatham Class: ELFCLASS32 3655f1fbf0SSimon Tatham Data: ELFDATA2LSB 3755f1fbf0SSimon Tatham Type: ET_REL 3855f1fbf0SSimon Tatham Machine: EM_ARM 3955f1fbf0SSimon Tatham Flags: [ EF_ARM_EABI_VER5 ] 4055f1fbf0SSimon TathamSections: 4155f1fbf0SSimon Tatham - Name: .text 4255f1fbf0SSimon Tatham Type: SHT_PROGBITS 4355f1fbf0SSimon Tatham Flags: [ SHF_ALLOC, SHF_EXECINSTR ] 4455f1fbf0SSimon Tatham AddressAlign: 0x4 4555f1fbf0SSimon Tatham Content: 6400a0e3ffffffff120381e064200eb840184ff06400eeffccdd01ebc2009a 4655f1fbf0SSimon TathamSymbols: 4755f1fbf0SSimon Tatham - Name: '$a' 4855f1fbf0SSimon Tatham Section: .text 4955f1fbf0SSimon Tatham - Name: '$t' 5055f1fbf0SSimon Tatham Section: .text 5155f1fbf0SSimon Tatham Value: 0x0c 5255f1fbf0SSimon Tatham... 53