1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,SANDY 3# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,HASWELL 4# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,BDWELL 5# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,SKYLAKE 6# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,SKYLAKE 7# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,BARCELONA 8# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,BDVER2 9# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,BTVER2 10# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,ZNVER1 11# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,ZNVER2 12# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver3 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,ZNVER3 13# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver4 -iterations=1 -resource-pressure=false -instruction-info=false -timeline < %s | FileCheck %s -check-prefixes=ALL,ZNVER4 14 15vdivps %xmm0, %xmm1, %xmm1 16vaddps (%rax), %xmm1, %xmm1 17 18# ALL: Iterations: 1 19# ALL-NEXT: Instructions: 2 20 21# BARCELONA-NEXT: Total Cycles: 20 22# BARCELONA-NEXT: Total uOps: 3 23 24# BDVER2-NEXT: Total Cycles: 17 25# BDVER2-NEXT: Total uOps: 2 26 27# BDWELL-NEXT: Total Cycles: 17 28# BDWELL-NEXT: Total uOps: 3 29 30# BTVER2-NEXT: Total Cycles: 25 31# BTVER2-NEXT: Total uOps: 2 32 33# HASWELL-NEXT: Total Cycles: 19 34# HASWELL-NEXT: Total uOps: 3 35 36# SANDY-NEXT: Total Cycles: 20 37# SANDY-NEXT: Total uOps: 3 38 39# SKYLAKE-NEXT: Total Cycles: 18 40# SKYLAKE-NEXT: Total uOps: 3 41 42# ZNVER1-NEXT: Total Cycles: 15 43# ZNVER1-NEXT: Total uOps: 2 44 45# ZNVER2-NEXT: Total Cycles: 16 46# ZNVER2-NEXT: Total uOps: 2 47 48# ZNVER3-NEXT: Total Cycles: 17 49# ZNVER3-NEXT: Total uOps: 2 50 51# ZNVER4-NEXT: Total Cycles: 17 52# ZNVER4-NEXT: Total uOps: 2 53 54# BARCELONA: Dispatch Width: 4 55# BARCELONA-NEXT: uOps Per Cycle: 0.15 56# BARCELONA-NEXT: IPC: 0.10 57# BARCELONA-NEXT: Block RThroughput: 14.0 58 59# BDVER2: Dispatch Width: 4 60# BDVER2-NEXT: uOps Per Cycle: 0.12 61# BDVER2-NEXT: IPC: 0.12 62# BDVER2-NEXT: Block RThroughput: 5.0 63 64# BDWELL: Dispatch Width: 4 65# BDWELL-NEXT: uOps Per Cycle: 0.18 66# BDWELL-NEXT: IPC: 0.12 67# BDWELL-NEXT: Block RThroughput: 5.0 68 69# BTVER2: Dispatch Width: 2 70# BTVER2-NEXT: uOps Per Cycle: 0.08 71# BTVER2-NEXT: IPC: 0.08 72# BTVER2-NEXT: Block RThroughput: 19.0 73 74# HASWELL: Dispatch Width: 4 75# HASWELL-NEXT: uOps Per Cycle: 0.16 76# HASWELL-NEXT: IPC: 0.11 77# HASWELL-NEXT: Block RThroughput: 7.0 78 79# SANDY: Dispatch Width: 4 80# SANDY-NEXT: uOps Per Cycle: 0.15 81# SANDY-NEXT: IPC: 0.10 82# SANDY-NEXT: Block RThroughput: 14.0 83 84# SKYLAKE: Dispatch Width: 6 85# SKYLAKE-NEXT: uOps Per Cycle: 0.17 86# SKYLAKE-NEXT: IPC: 0.11 87# SKYLAKE-NEXT: Block RThroughput: 3.0 88 89# ZNVER1: Dispatch Width: 4 90# ZNVER1-NEXT: uOps Per Cycle: 0.13 91# ZNVER1-NEXT: IPC: 0.13 92# ZNVER1-NEXT: Block RThroughput: 3.0 93 94# ZNVER2: Dispatch Width: 4 95# ZNVER2-NEXT: uOps Per Cycle: 0.13 96# ZNVER2-NEXT: IPC: 0.13 97# ZNVER2-NEXT: Block RThroughput: 5.0 98 99# ZNVER3: Dispatch Width: 6 100# ZNVER3-NEXT: uOps Per Cycle: 0.12 101# ZNVER3-NEXT: IPC: 0.12 102# ZNVER3-NEXT: Block RThroughput: 3.0 103 104# ZNVER4: Dispatch Width: 6 105# ZNVER4-NEXT: uOps Per Cycle: 0.12 106# ZNVER4-NEXT: IPC: 0.12 107# ZNVER4-NEXT: Block RThroughput: 3.0 108 109# ALL: Timeline view: 110 111# BARCELONA-NEXT: 0123456789 112# BARCELONA-NEXT: Index 0123456789 113 114# BDVER2-NEXT: 0123456 115# BDVER2-NEXT: Index 0123456789 116 117# BDWELL-NEXT: 0123456 118# BDWELL-NEXT: Index 0123456789 119 120# BTVER2-NEXT: 0123456789 121# BTVER2-NEXT: Index 0123456789 01234 122 123# HASWELL-NEXT: 012345678 124# HASWELL-NEXT: Index 0123456789 125 126# SANDY-NEXT: 0123456789 127# SANDY-NEXT: Index 0123456789 128 129# SKYLAKE-NEXT: 01234567 130# SKYLAKE-NEXT: Index 0123456789 131 132# ZNVER1-NEXT: 01234 133# ZNVER1-NEXT: Index 0123456789 134 135# ZNVER2-NEXT: 012345 136# ZNVER2-NEXT: Index 0123456789 137 138# ZNVER3-NEXT: 0123456 139# ZNVER3-NEXT: Index 0123456789 140 141# ZNVER4-NEXT: 0123456 142# ZNVER4-NEXT: Index 0123456789 143 144# BARCELONA: [0,0] DeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 145# BARCELONA-NEXT: [0,1] D========eeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 146 147# BDVER2: [0,0] DeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 148# BDVER2-NEXT: [0,1] D====eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 149 150# BDWELL: [0,0] DeeeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 151# BDWELL-NEXT: [0,1] D======eeeeeeeeER vaddps (%rax), %xmm1, %xmm1 152 153# BTVER2: [0,0] DeeeeeeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 154# BTVER2-NEXT: [0,1] D==============eeeeeeeeER vaddps (%rax), %xmm1, %xmm1 155 156# HASWELL: [0,0] DeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 157# HASWELL-NEXT: [0,1] D=======eeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 158 159# SANDY: [0,0] DeeeeeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 160# SANDY-NEXT: [0,1] D========eeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 161 162# SKYLAKE: [0,0] DeeeeeeeeeeeER . . vdivps %xmm0, %xmm1, %xmm1 163# SKYLAKE-NEXT: [0,1] D=====eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 164 165# ZNVER1: [0,0] DeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 166# ZNVER1-NEXT: [0,1] D==eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 167 168# ZNVER2: [0,0] DeeeeeeeeeeER . vdivps %xmm0, %xmm1, %xmm1 169# ZNVER2-NEXT: [0,1] D===eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 170 171# ZNVER3: [0,0] DeeeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 172# ZNVER3-NEXT: [0,1] D====eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 173 174# ZNVER4: [0,0] DeeeeeeeeeeeER .. vdivps %xmm0, %xmm1, %xmm1 175# ZNVER4-NEXT: [0,1] D====eeeeeeeeeeER vaddps (%rax), %xmm1, %xmm1 176 177# ALL: Average Wait times (based on the timeline view): 178# ALL-NEXT: [0]: Executions 179# ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue 180# ALL-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 181# ALL-NEXT: [3]: Average time elapsed from WB until retire stage 182 183# ALL: [0] [1] [2] [3] 184# ALL-NEXT: 0. 1 1.0 1.0 0.0 vdivps %xmm0, %xmm1, %xmm1 185 186# BARCELONA-NEXT: 1. 1 9.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 187# BARCELONA-NEXT: 1 5.0 0.5 0.0 <total> 188 189# BDVER2-NEXT: 1. 1 5.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 190# BDVER2-NEXT: 1 3.0 0.5 0.0 <total> 191 192# BDWELL-NEXT: 1. 1 7.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 193# BDWELL-NEXT: 1 4.0 0.5 0.0 <total> 194 195# BTVER2-NEXT: 1. 1 15.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 196# BTVER2-NEXT: 1 8.0 0.5 0.0 <total> 197 198# HASWELL-NEXT: 1. 1 8.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 199# HASWELL-NEXT: 1 4.5 0.5 0.0 <total> 200 201# SANDY-NEXT: 1. 1 9.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 202# SANDY-NEXT: 1 5.0 0.5 0.0 <total> 203 204# SKYLAKE-NEXT: 1. 1 6.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 205# SKYLAKE-NEXT: 1 3.5 0.5 0.0 <total> 206 207# ZNVER1-NEXT: 1. 1 3.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 208# ZNVER1-NEXT: 1 2.0 0.5 0.0 <total> 209 210# ZNVER2-NEXT: 1. 1 4.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 211# ZNVER2-NEXT: 1 2.5 0.5 0.0 <total> 212 213# ZNVER3-NEXT: 1. 1 5.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 214# ZNVER3-NEXT: 1 3.0 0.5 0.0 <total> 215 216# ZNVER4-NEXT: 1. 1 5.0 0.0 0.0 vaddps (%rax), %xmm1, %xmm1 217# ZNVER4-NEXT: 1 3.0 0.5 0.0 <total> 218