1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=haswell -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,HASWELL 3# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=broadwell -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,BDWELL 4# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=skylake -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,SKYLAKE 5# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,SKYLAKE 6# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,BDVER2 7# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,BTVER2 8# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver1 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,ZNVER1 9# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -iterations=1 -timeline -resource-pressure=false < %s | FileCheck %s -check-prefixes=ALL,ZNVER2 10 11add %edi, %esi 12bextrl %esi, (%rdi), %eax 13 14# ALL: Iterations: 1 15# ALL-NEXT: Instructions: 2 16 17# BDVER2-NEXT: Total Cycles: 9 18# BDVER2-NEXT: Total uOps: 3 19 20# BDWELL-NEXT: Total Cycles: 10 21# BDWELL-NEXT: Total uOps: 4 22 23# BTVER2-NEXT: Total Cycles: 7 24# BTVER2-NEXT: Total uOps: 2 25 26# HASWELL-NEXT: Total Cycles: 10 27# HASWELL-NEXT: Total uOps: 4 28 29# SKYLAKE-NEXT: Total Cycles: 10 30# SKYLAKE-NEXT: Total uOps: 4 31 32# ZNVER1-NEXT: Total Cycles: 8 33# ZNVER1-NEXT: Total uOps: 3 34 35# ZNVER2-NEXT: Total Cycles: 8 36# ZNVER2-NEXT: Total uOps: 3 37 38# BDVER2: Dispatch Width: 4 39# BDVER2-NEXT: uOps Per Cycle: 0.33 40# BDVER2-NEXT: IPC: 0.22 41# BDVER2-NEXT: Block RThroughput: 2.0 42 43# BDWELL: Dispatch Width: 4 44# BDWELL-NEXT: uOps Per Cycle: 0.40 45# BDWELL-NEXT: IPC: 0.20 46# BDWELL-NEXT: Block RThroughput: 1.0 47 48# BTVER2: Dispatch Width: 2 49# BTVER2-NEXT: uOps Per Cycle: 0.29 50# BTVER2-NEXT: IPC: 0.29 51# BTVER2-NEXT: Block RThroughput: 1.0 52 53# HASWELL: Dispatch Width: 4 54# HASWELL-NEXT: uOps Per Cycle: 0.40 55# HASWELL-NEXT: IPC: 0.20 56# HASWELL-NEXT: Block RThroughput: 1.0 57 58# SKYLAKE: Dispatch Width: 6 59# SKYLAKE-NEXT: uOps Per Cycle: 0.40 60# SKYLAKE-NEXT: IPC: 0.20 61# SKYLAKE-NEXT: Block RThroughput: 0.7 62 63# ZNVER1: Dispatch Width: 4 64# ZNVER1-NEXT: uOps Per Cycle: 0.38 65# ZNVER1-NEXT: IPC: 0.25 66# ZNVER1-NEXT: Block RThroughput: 0.8 67 68# ZNVER2: Dispatch Width: 4 69# ZNVER2-NEXT: uOps Per Cycle: 0.38 70# ZNVER2-NEXT: IPC: 0.25 71# ZNVER2-NEXT: Block RThroughput: 0.8 72 73# ALL: Instruction Info: 74# ALL-NEXT: [1]: #uOps 75# ALL-NEXT: [2]: Latency 76# ALL-NEXT: [3]: RThroughput 77# ALL-NEXT: [4]: MayLoad 78# ALL-NEXT: [5]: MayStore 79# ALL-NEXT: [6]: HasSideEffects (U) 80 81# ALL: [1] [2] [3] [4] [5] [6] Instructions: 82 83# BDVER2-NEXT: 1 1 1.00 addl %edi, %esi 84# BDVER2-NEXT: 2 6 1.50 * bextrl %esi, (%rdi), %eax 85 86# BDWELL-NEXT: 1 1 0.25 addl %edi, %esi 87# BDWELL-NEXT: 3 7 0.50 * bextrl %esi, (%rdi), %eax 88 89# BTVER2-NEXT: 1 1 0.50 addl %edi, %esi 90# BTVER2-NEXT: 1 4 1.00 * bextrl %esi, (%rdi), %eax 91 92# HASWELL-NEXT: 1 1 0.25 addl %edi, %esi 93# HASWELL-NEXT: 3 7 0.50 * bextrl %esi, (%rdi), %eax 94 95# SKYLAKE-NEXT: 1 1 0.25 addl %edi, %esi 96# SKYLAKE-NEXT: 3 7 0.50 * bextrl %esi, (%rdi), %eax 97 98# ZNVER1-NEXT: 1 1 0.25 addl %edi, %esi 99# ZNVER1-NEXT: 2 5 0.50 * bextrl %esi, (%rdi), %eax 100 101# ZNVER2-NEXT: 1 1 0.25 addl %edi, %esi 102# ZNVER2-NEXT: 2 5 0.33 * bextrl %esi, (%rdi), %eax 103 104# ALL: Timeline view: 105 106# BDVER2-NEXT: Index 012345678 107# BDWELL-NEXT: Index 0123456789 108# BTVER2-NEXT: Index 0123456 109# HASWELL-NEXT: Index 0123456789 110# SKYLAKE-NEXT: Index 0123456789 111# ZNVER1-NEXT: Index 01234567 112# ZNVER2-NEXT: Index 01234567 113 114# BDVER2: [0,0] DeER . . addl %edi, %esi 115# BDVER2-NEXT: [0,1] DeeeeeeER bextrl %esi, (%rdi), %eax 116 117# BDWELL: [0,0] DeER . . addl %edi, %esi 118# BDWELL-NEXT: [0,1] DeeeeeeeER bextrl %esi, (%rdi), %eax 119 120# BTVER2: [0,0] DeER .. addl %edi, %esi 121# BTVER2-NEXT: [0,1] DeeeeER bextrl %esi, (%rdi), %eax 122 123# HASWELL: [0,0] DeER . . addl %edi, %esi 124# HASWELL-NEXT: [0,1] DeeeeeeeER bextrl %esi, (%rdi), %eax 125 126# SKYLAKE: [0,0] DeER . . addl %edi, %esi 127# SKYLAKE-NEXT: [0,1] DeeeeeeeER bextrl %esi, (%rdi), %eax 128 129# ZNVER1: [0,0] DeER . . addl %edi, %esi 130# ZNVER1-NEXT: [0,1] DeeeeeER bextrl %esi, (%rdi), %eax 131 132# ZNVER2: [0,0] DeER . . addl %edi, %esi 133# ZNVER2-NEXT: [0,1] DeeeeeER bextrl %esi, (%rdi), %eax 134 135# ALL: Average Wait times (based on the timeline view): 136# ALL-NEXT: [0]: Executions 137# ALL-NEXT: [1]: Average time spent waiting in a scheduler's queue 138# ALL-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 139# ALL-NEXT: [3]: Average time elapsed from WB until retire stage 140 141# ALL: [0] [1] [2] [3] 142# ALL-NEXT: 0. 1 1.0 1.0 0.0 addl %edi, %esi 143# ALL-NEXT: 1. 1 1.0 0.0 0.0 bextrl %esi, (%rdi), %eax 144# ALL-NEXT: 1 1.0 0.5 0.0 <total> 145