1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver3 -timeline -iterations=2 < %s | FileCheck %s 3 4# PR51495: If the two destination registers are the same, the destination will 5# contain teh high half of the multiplication result. 6 7# LLVM-MCA-BEGIN 8mulxl %eax, %eax, %eax 9# LLVM-MCA-END 10 11# LLVM-MCA-BEGIN 12mulxq %rax, %rax, %rax 13# LLVM-MCA-END 14 15# CHECK: [0] Code Region 16 17# CHECK: Iterations: 2 18# CHECK-NEXT: Instructions: 2 19# CHECK-NEXT: Total Cycles: 11 20# CHECK-NEXT: Total uOps: 4 21 22# CHECK: Dispatch Width: 6 23# CHECK-NEXT: uOps Per Cycle: 0.36 24# CHECK-NEXT: IPC: 0.18 25# CHECK-NEXT: Block RThroughput: 1.0 26 27# CHECK: Instruction Info: 28# CHECK-NEXT: [1]: #uOps 29# CHECK-NEXT: [2]: Latency 30# CHECK-NEXT: [3]: RThroughput 31# CHECK-NEXT: [4]: MayLoad 32# CHECK-NEXT: [5]: MayStore 33# CHECK-NEXT: [6]: HasSideEffects (U) 34 35# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 36# CHECK-NEXT: 2 4 1.00 mulxl %eax, %eax, %eax 37 38# CHECK: Resources: 39# CHECK-NEXT: [0] - Zn3AGU0 40# CHECK-NEXT: [1] - Zn3AGU1 41# CHECK-NEXT: [2] - Zn3AGU2 42# CHECK-NEXT: [3] - Zn3ALU0 43# CHECK-NEXT: [4] - Zn3ALU1 44# CHECK-NEXT: [5] - Zn3ALU2 45# CHECK-NEXT: [6] - Zn3ALU3 46# CHECK-NEXT: [7] - Zn3BRU1 47# CHECK-NEXT: [8] - Zn3FP0 48# CHECK-NEXT: [9] - Zn3FP1 49# CHECK-NEXT: [10] - Zn3FP2 50# CHECK-NEXT: [11] - Zn3FP3 51# CHECK-NEXT: [12.0] - Zn3FP45 52# CHECK-NEXT: [12.1] - Zn3FP45 53# CHECK-NEXT: [13] - Zn3FPSt 54# CHECK-NEXT: [14.0] - Zn3LSU 55# CHECK-NEXT: [14.1] - Zn3LSU 56# CHECK-NEXT: [14.2] - Zn3LSU 57# CHECK-NEXT: [15.0] - Zn3Load 58# CHECK-NEXT: [15.1] - Zn3Load 59# CHECK-NEXT: [15.2] - Zn3Load 60# CHECK-NEXT: [16.0] - Zn3Store 61# CHECK-NEXT: [16.1] - Zn3Store 62 63# CHECK: Resource pressure per iteration: 64# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] 65# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - - - - - - - - 66 67# CHECK: Resource pressure by instruction: 68# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions: 69# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - - - - - - - - mulxl %eax, %eax, %eax 70 71# CHECK: Timeline view: 72# CHECK-NEXT: 0 73# CHECK-NEXT: Index 0123456789 74 75# CHECK: [0,0] DeeeeER . mulxl %eax, %eax, %eax 76# CHECK-NEXT: [1,0] D====eeeeER mulxl %eax, %eax, %eax 77 78# CHECK: Average Wait times (based on the timeline view): 79# CHECK-NEXT: [0]: Executions 80# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 81# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 82# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 83 84# CHECK: [0] [1] [2] [3] 85# CHECK-NEXT: 0. 2 3.0 0.5 0.0 mulxl %eax, %eax, %eax 86 87# CHECK: [1] Code Region 88 89# CHECK: Iterations: 2 90# CHECK-NEXT: Instructions: 2 91# CHECK-NEXT: Total Cycles: 11 92# CHECK-NEXT: Total uOps: 4 93 94# CHECK: Dispatch Width: 6 95# CHECK-NEXT: uOps Per Cycle: 0.36 96# CHECK-NEXT: IPC: 0.18 97# CHECK-NEXT: Block RThroughput: 1.0 98 99# CHECK: Instruction Info: 100# CHECK-NEXT: [1]: #uOps 101# CHECK-NEXT: [2]: Latency 102# CHECK-NEXT: [3]: RThroughput 103# CHECK-NEXT: [4]: MayLoad 104# CHECK-NEXT: [5]: MayStore 105# CHECK-NEXT: [6]: HasSideEffects (U) 106 107# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 108# CHECK-NEXT: 2 4 1.00 mulxq %rax, %rax, %rax 109 110# CHECK: Resources: 111# CHECK-NEXT: [0] - Zn3AGU0 112# CHECK-NEXT: [1] - Zn3AGU1 113# CHECK-NEXT: [2] - Zn3AGU2 114# CHECK-NEXT: [3] - Zn3ALU0 115# CHECK-NEXT: [4] - Zn3ALU1 116# CHECK-NEXT: [5] - Zn3ALU2 117# CHECK-NEXT: [6] - Zn3ALU3 118# CHECK-NEXT: [7] - Zn3BRU1 119# CHECK-NEXT: [8] - Zn3FP0 120# CHECK-NEXT: [9] - Zn3FP1 121# CHECK-NEXT: [10] - Zn3FP2 122# CHECK-NEXT: [11] - Zn3FP3 123# CHECK-NEXT: [12.0] - Zn3FP45 124# CHECK-NEXT: [12.1] - Zn3FP45 125# CHECK-NEXT: [13] - Zn3FPSt 126# CHECK-NEXT: [14.0] - Zn3LSU 127# CHECK-NEXT: [14.1] - Zn3LSU 128# CHECK-NEXT: [14.2] - Zn3LSU 129# CHECK-NEXT: [15.0] - Zn3Load 130# CHECK-NEXT: [15.1] - Zn3Load 131# CHECK-NEXT: [15.2] - Zn3Load 132# CHECK-NEXT: [16.0] - Zn3Store 133# CHECK-NEXT: [16.1] - Zn3Store 134 135# CHECK: Resource pressure per iteration: 136# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] 137# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - - - - - - - - 138 139# CHECK: Resource pressure by instruction: 140# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions: 141# CHECK-NEXT: - - - - 1.00 - - - - - - - - - - - - - - - - - - mulxq %rax, %rax, %rax 142 143# CHECK: Timeline view: 144# CHECK-NEXT: 0 145# CHECK-NEXT: Index 0123456789 146 147# CHECK: [0,0] DeeeeER . mulxq %rax, %rax, %rax 148# CHECK-NEXT: [1,0] D====eeeeER mulxq %rax, %rax, %rax 149 150# CHECK: Average Wait times (based on the timeline view): 151# CHECK-NEXT: [0]: Executions 152# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 153# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 154# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 155 156# CHECK: [0] [1] [2] [3] 157# CHECK-NEXT: 0. 2 3.0 0.5 0.0 mulxq %rax, %rax, %rax 158