1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=znver2 -timeline -iterations=1 < %s | FileCheck %s 3 4# PR51495: WriteIMulH reports an incorrect latency for the RM variants of MULX. 5 6# LLVM-MCA-BEGIN 7mulxl (%rdi), %eax, %ecx 8add %eax, %eax 9# LLVM-MCA-END 10 11# LLVM-MCA-BEGIN 12mulxq (%rdi), %rax, %rcx 13add %rax, %rax 14# LLVM-MCA-END 15 16# CHECK: [0] Code Region 17 18# CHECK: Iterations: 1 19# CHECK-NEXT: Instructions: 2 20# CHECK-NEXT: Total Cycles: 11 21# CHECK-NEXT: Total uOps: 2 22 23# CHECK: Dispatch Width: 4 24# CHECK-NEXT: uOps Per Cycle: 0.18 25# CHECK-NEXT: IPC: 0.18 26# CHECK-NEXT: Block RThroughput: 2.0 27 28# CHECK: Instruction Info: 29# CHECK-NEXT: [1]: #uOps 30# CHECK-NEXT: [2]: Latency 31# CHECK-NEXT: [3]: RThroughput 32# CHECK-NEXT: [4]: MayLoad 33# CHECK-NEXT: [5]: MayStore 34# CHECK-NEXT: [6]: HasSideEffects (U) 35 36# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 37# CHECK-NEXT: 1 7 2.00 * mulxl (%rdi), %eax, %ecx 38# CHECK-NEXT: 1 1 0.25 addl %eax, %eax 39 40# CHECK: Resources: 41# CHECK-NEXT: [0] - Zn2AGU0 42# CHECK-NEXT: [1] - Zn2AGU1 43# CHECK-NEXT: [2] - Zn2AGU2 44# CHECK-NEXT: [3] - Zn2ALU0 45# CHECK-NEXT: [4] - Zn2ALU1 46# CHECK-NEXT: [5] - Zn2ALU2 47# CHECK-NEXT: [6] - Zn2ALU3 48# CHECK-NEXT: [7] - Zn2Divider 49# CHECK-NEXT: [8] - Zn2FPU0 50# CHECK-NEXT: [9] - Zn2FPU1 51# CHECK-NEXT: [10] - Zn2FPU2 52# CHECK-NEXT: [11] - Zn2FPU3 53# CHECK-NEXT: [12] - Zn2Multiplier 54 55# CHECK: Resource pressure per iteration: 56# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] 57# CHECK-NEXT: - - 1.00 - 1.00 - 1.00 - - - - - 2.00 58 59# CHECK: Resource pressure by instruction: 60# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: 61# CHECK-NEXT: - - 1.00 - 1.00 - - - - - - - 2.00 mulxl (%rdi), %eax, %ecx 62# CHECK-NEXT: - - - - - - 1.00 - - - - - - addl %eax, %eax 63 64# CHECK: Timeline view: 65# CHECK-NEXT: 0 66# CHECK-NEXT: Index 0123456789 67 68# CHECK: [0,0] DeeeeeeeER. mulxl (%rdi), %eax, %ecx 69# CHECK-NEXT: [0,1] D=======eER addl %eax, %eax 70 71# CHECK: Average Wait times (based on the timeline view): 72# CHECK-NEXT: [0]: Executions 73# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 74# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 75# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 76 77# CHECK: [0] [1] [2] [3] 78# CHECK-NEXT: 0. 1 1.0 1.0 0.0 mulxl (%rdi), %eax, %ecx 79# CHECK-NEXT: 1. 1 8.0 0.0 0.0 addl %eax, %eax 80# CHECK-NEXT: 1 4.5 0.5 0.0 <total> 81 82# CHECK: [1] Code Region 83 84# CHECK: Iterations: 1 85# CHECK-NEXT: Instructions: 2 86# CHECK-NEXT: Total Cycles: 11 87# CHECK-NEXT: Total uOps: 2 88 89# CHECK: Dispatch Width: 4 90# CHECK-NEXT: uOps Per Cycle: 0.18 91# CHECK-NEXT: IPC: 0.18 92# CHECK-NEXT: Block RThroughput: 2.0 93 94# CHECK: Instruction Info: 95# CHECK-NEXT: [1]: #uOps 96# CHECK-NEXT: [2]: Latency 97# CHECK-NEXT: [3]: RThroughput 98# CHECK-NEXT: [4]: MayLoad 99# CHECK-NEXT: [5]: MayStore 100# CHECK-NEXT: [6]: HasSideEffects (U) 101 102# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 103# CHECK-NEXT: 1 7 2.00 * mulxq (%rdi), %rax, %rcx 104# CHECK-NEXT: 1 1 0.25 addq %rax, %rax 105 106# CHECK: Resources: 107# CHECK-NEXT: [0] - Zn2AGU0 108# CHECK-NEXT: [1] - Zn2AGU1 109# CHECK-NEXT: [2] - Zn2AGU2 110# CHECK-NEXT: [3] - Zn2ALU0 111# CHECK-NEXT: [4] - Zn2ALU1 112# CHECK-NEXT: [5] - Zn2ALU2 113# CHECK-NEXT: [6] - Zn2ALU3 114# CHECK-NEXT: [7] - Zn2Divider 115# CHECK-NEXT: [8] - Zn2FPU0 116# CHECK-NEXT: [9] - Zn2FPU1 117# CHECK-NEXT: [10] - Zn2FPU2 118# CHECK-NEXT: [11] - Zn2FPU3 119# CHECK-NEXT: [12] - Zn2Multiplier 120 121# CHECK: Resource pressure per iteration: 122# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] 123# CHECK-NEXT: - - 1.00 - 1.00 - 1.00 - - - - - 2.00 124 125# CHECK: Resource pressure by instruction: 126# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] Instructions: 127# CHECK-NEXT: - - 1.00 - 1.00 - - - - - - - 2.00 mulxq (%rdi), %rax, %rcx 128# CHECK-NEXT: - - - - - - 1.00 - - - - - - addq %rax, %rax 129 130# CHECK: Timeline view: 131# CHECK-NEXT: 0 132# CHECK-NEXT: Index 0123456789 133 134# CHECK: [0,0] DeeeeeeeER. mulxq (%rdi), %rax, %rcx 135# CHECK-NEXT: [0,1] D=======eER addq %rax, %rax 136 137# CHECK: Average Wait times (based on the timeline view): 138# CHECK-NEXT: [0]: Executions 139# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 140# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 141# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 142 143# CHECK: [0] [1] [2] [3] 144# CHECK-NEXT: 0. 1 1.0 1.0 0.0 mulxq (%rdi), %rax, %rcx 145# CHECK-NEXT: 1. 1 8.0 0.0 0.0 addq %rax, %rax 146# CHECK-NEXT: 1 4.5 0.5 0.0 <total> 147