1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -resource-pressure=false -retire-stats -iterations=1 < %s | FileCheck %s 3 4 vsqrtps %xmm0, %xmm2 5 vaddps %xmm0, %xmm1, %xmm2 6 vaddps %xmm0, %xmm1, %xmm2 7 vaddps %xmm0, %xmm1, %xmm2 8 vaddps %xmm0, %xmm1, %xmm2 9 vaddps %xmm0, %xmm1, %xmm2 10 vaddps %xmm0, %xmm1, %xmm2 11 vaddps %xmm0, %xmm1, %xmm2 12 vaddps %xmm0, %xmm1, %xmm2 13 vaddps %xmm0, %xmm1, %xmm2 14 vaddps %xmm0, %xmm1, %xmm2 15 vaddps %xmm0, %xmm1, %xmm2 16 vaddps %xmm0, %xmm1, %xmm2 17 vaddps %xmm0, %xmm1, %xmm2 18 vaddps %xmm0, %xmm1, %xmm2 19 vaddps %xmm0, %xmm1, %xmm2 20 21# CHECK: Iterations: 1 22# CHECK-NEXT: Instructions: 16 23# CHECK-NEXT: Total Cycles: 31 24# CHECK-NEXT: Total uOps: 16 25 26# CHECK: Dispatch Width: 2 27# CHECK-NEXT: uOps Per Cycle: 0.52 28# CHECK-NEXT: IPC: 0.52 29# CHECK-NEXT: Block RThroughput: 21.0 30 31# CHECK: Instruction Info: 32# CHECK-NEXT: [1]: #uOps 33# CHECK-NEXT: [2]: Latency 34# CHECK-NEXT: [3]: RThroughput 35# CHECK-NEXT: [4]: MayLoad 36# CHECK-NEXT: [5]: MayStore 37# CHECK-NEXT: [6]: HasSideEffects (U) 38 39# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 40# CHECK-NEXT: 1 21 21.00 vsqrtps %xmm0, %xmm2 41# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 42# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 43# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 44# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 45# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 46# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 47# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 48# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 49# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 50# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 51# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 52# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 53# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 54# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 55# CHECK-NEXT: 1 3 1.00 vaddps %xmm0, %xmm1, %xmm2 56 57# CHECK: Retire Control Unit - number of cycles where we saw N instructions retired: 58# CHECK-NEXT: [# retired], [# cycles] 59# CHECK-NEXT: 0, 23 (74.2%) 60# CHECK-NEXT: 2, 8 (25.8%) 61 62# CHECK: Total ROB Entries: 64 63# CHECK-NEXT: Max Used ROB Entries: 16 ( 25.0% ) 64# CHECK-NEXT: Average Used ROB Entries per cy: 11 ( 17.2% ) 65