1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=arm-eabi -mcpu=cortex-a9 -iterations=100 < %s | FileCheck %s 3 4vadd.f32 s0, s2, s2 5 6# CHECK: Iterations: 100 7# CHECK-NEXT: Instructions: 100 8# CHECK-NEXT: Total Cycles: 105 9# CHECK-NEXT: Total uOps: 100 10 11# CHECK: Dispatch Width: 2 12# CHECK-NEXT: uOps Per Cycle: 0.95 13# CHECK-NEXT: IPC: 0.95 14# CHECK-NEXT: Block RThroughput: 1.0 15 16# CHECK: Instruction Info: 17# CHECK-NEXT: [1]: #uOps 18# CHECK-NEXT: [2]: Latency 19# CHECK-NEXT: [3]: RThroughput 20# CHECK-NEXT: [4]: MayLoad 21# CHECK-NEXT: [5]: MayStore 22# CHECK-NEXT: [6]: HasSideEffects (U) 23 24# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 25# CHECK-NEXT: 1 4 1.00 vadd.f32 s0, s2, s2 26 27# CHECK: Resources: 28# CHECK-NEXT: [0] - A9UnitAGU 29# CHECK-NEXT: [1.0] - A9UnitALU 30# CHECK-NEXT: [1.1] - A9UnitALU 31# CHECK-NEXT: [2] - A9UnitB 32# CHECK-NEXT: [3] - A9UnitFP 33# CHECK-NEXT: [4] - A9UnitLS 34# CHECK-NEXT: [5] - A9UnitMul 35 36# CHECK: Resource pressure per iteration: 37# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] 38# CHECK-NEXT: 1.00 - - - 1.00 - - 39 40# CHECK: Resource pressure by instruction: 41# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] Instructions: 42# CHECK-NEXT: 1.00 - - - 1.00 - - vadd.f32 s0, s2, s2 43